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wfjm |
/* $Id: main.c 472 2013-01-06 14:39:10Z mueller $ */
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wfjm |
/*
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wfjm |
* Copyright 2011-2013 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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wfjm |
* Code was forked from ixo-jtag.svn.sourceforge.net on 2011-07-17
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*
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* - original copyright and licence disclaimer --------------------------------
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* - Code that turns a Cypress FX2 USB Controller into an USB JTAG adapter
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* - Copyright (C) 2005..2007 Kolja Waschk, ixo.de
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* - This code is part of usbjtag. usbjtag is free software;
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*-----------------------------------------------------------------------------
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*
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* This program is free software; you may redistribute and/or modify it under
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* the terms of the GNU General Public License as published by the Free
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* Software Foundation, either version 2, or at your option any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for complete details.
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*
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*-----------------------------------------------------------------------------
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*
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* EZ-USB FX2 controller main program
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*
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* Revision History:
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*
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* Date Rev Version Comment
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* 2013-01-05 472 1.1.1 BUGFIX: explicitly set FIFOPINPOLAR=0
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* 2011-07-23 397 1.1 factor out usb_fifo_init() code
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* 2011-07-17 394 1.0 Initial version (from ixo-jtag/usb_jtag Rev 204)
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*
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*-----------------------------------------------------------------------------
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*/
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#include "isr.h"
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#include "timer.h"
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#include "delay.h"
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#include "fx2regs.h"
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#include "fx2utils.h"
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#include "usb_common.h"
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#include "usb_descriptors.h"
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#include "usb_requests.h"
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#include "syncdelay.h"
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#include "eeprom.h"
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#include "hardware.h"
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//-----------------------------------------------------------------------------
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// Define USE_MOD256_OUTBUFFER:
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// Saves about 256 bytes in code size, improves speed a little.
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// A further optimization could be not to use an extra output buffer at
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// all, but to write directly into EP1INBUF. Not implemented yet. When
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// downloading large amounts of data _to_ the target, there is no output
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// and thus the output buffer isn't used at all and doesn't slow down things.
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#define USE_MOD256_OUTBUFFER 1
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//-----------------------------------------------------------------------------
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// Global data
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typedef bit BOOL;
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#define FALSE 0
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#define TRUE 1
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static BOOL Running;
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static BOOL WriteOnly;
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static BYTE ClockBytes;
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static WORD Pending;
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70 |
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#ifdef USE_MOD256_OUTBUFFER
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static BYTE FirstDataInOutBuffer;
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static BYTE FirstFreeInOutBuffer;
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#else
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static WORD FirstDataInOutBuffer;
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static WORD FirstFreeInOutBuffer;
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#endif
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#ifdef USE_MOD256_OUTBUFFER
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/* Size of output buffer must be exactly 256 */
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#define OUTBUFFER_LEN 0x100
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/* Output buffer must begin at some address with lower 8 bits all zero */
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xdata at 0xE000 BYTE OutBuffer[OUTBUFFER_LEN];
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#else
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#define OUTBUFFER_LEN 0x200
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static xdata BYTE OutBuffer[OUTBUFFER_LEN];
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#endif
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//-----------------------------------------------------------------------------
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void usb_jtag_init(void) // Called once at startup
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{
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WORD tmp;
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Running = FALSE;
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ClockBytes = 0;
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Pending = 0;
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WriteOnly = TRUE;
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FirstDataInOutBuffer = 0;
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FirstFreeInOutBuffer = 0;
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ProgIO_Init();
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ProgIO_Enable();
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// Make Timer2 reload at 100 Hz to trigger Keepalive packets
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tmp = 65536 - ( 48000000 / 12 / 100 );
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RCAP2H = tmp >> 8;
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RCAP2L = tmp & 0xFF;
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CKCON = 0; // Default Clock
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T2CON = 0x04; // Auto-reload mode using internal clock, no baud clock.
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// Enable Autopointer
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EXTACC = 1; // Enable
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117 |
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APTR1FZ = 1; // Don't freeze
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APTR2FZ = 1; // Don't freeze
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}
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120 |
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void OutputByte(BYTE d)
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{
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#ifdef USE_MOD256_OUTBUFFER
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OutBuffer[FirstFreeInOutBuffer] = d;
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FirstFreeInOutBuffer = ( FirstFreeInOutBuffer + 1 ) & 0xFF;
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#else
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OutBuffer[FirstFreeInOutBuffer++] = d;
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if(FirstFreeInOutBuffer >= OUTBUFFER_LEN) FirstFreeInOutBuffer = 0;
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129 |
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#endif
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130 |
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Pending++;
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131 |
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}
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//-----------------------------------------------------------------------------
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// usb_jtag_activity does most of the work. It now happens to behave just like
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135 |
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// the combination of FT245BM and Altera-programmed EPM7064 CPLD in Altera's
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136 |
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// USB-Blaster. The CPLD knows two major modes: Bit banging mode and Byte
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// shift mode. It starts in Bit banging mode. While bytes are received
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// from the host on EP2OUT, each byte B of them is processed as follows:
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139 |
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//
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140 |
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// Please note: nCE, nCS, LED pins and DATAOUT actually aren't supported here.
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141 |
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// Support for these would be required for AS/PS mode and isn't too complicated,
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// but I haven't had the time yet.
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//
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// Bit banging mode:
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//
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// 1. Remember bit 6 (0x40) in B as the "Read bit".
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//
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// 2. If bit 7 (0x40) is set, switch to Byte shift mode for the coming
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// X bytes ( X := B & 0x3F ), and don't do anything else now.
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//
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151 |
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// 3. Otherwise, set the JTAG signals as follows:
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152 |
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// TCK/DCLK high if bit 0 was set (0x01), otherwise low
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153 |
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// TMS/nCONFIG high if bit 1 was set (0x02), otherwise low
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154 |
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// nCE high if bit 2 was set (0x04), otherwise low
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155 |
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// nCS high if bit 3 was set (0x08), otherwise low
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156 |
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// TDI/ASDI/DATA0 high if bit 4 was set (0x10), otherwise low
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157 |
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// Output Enable/LED active if bit 5 was set (0x20), otherwise low
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158 |
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//
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159 |
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// 4. If "Read bit" (0x40) was set, record the state of TDO(CONF_DONE) and
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160 |
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// DATAOUT(nSTATUS) pins and put it as a byte ((DATAOUT<<1)|TDO) in the
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161 |
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// output FIFO _to_ the host (the code here reads TDO only and assumes
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// DATAOUT=1)
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//
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164 |
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// Byte shift mode:
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//
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// 1. Load shift register with byte from host
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//
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// 2. Do 8 times (i.e. for each bit of the byte; implemented in shift.a51)
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// 2a) if nCS=1, set carry bit from TDO, else set carry bit from DATAOUT
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// 2b) Rotate shift register through carry bit
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// 2c) TDI := Carry bit
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172 |
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// 2d) Raise TCK, then lower TCK.
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//
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// 3. If "Read bit" was set when switching into byte shift mode,
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// record the shift register content and put it into the FIFO
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// _to_ the host.
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//
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178 |
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// Some more (minor) things to consider to emulate the FT245BM:
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//
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180 |
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// a) The FT245BM seems to transmit just packets of no more than 64 bytes
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// (which perfectly matches the USB spec). Each packet starts with
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182 |
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// two non-data bytes (I use 0x31,0x60 here). A USB sniffer on Windows
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183 |
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// might show a number of packets to you as if it was a large transfer
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184 |
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// because of the way that Windows understands it: it _is_ a large
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185 |
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// transfer until terminated with an USB packet smaller than 64 byte.
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//
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187 |
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// b) The Windows driver expects to get some data packets (with at least
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188 |
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// the two leading bytes 0x31,0x60) immediately after "resetting" the
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189 |
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// FT chip and then in regular intervals. Otherwise a blue screen may
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// appear... In the code below, I make sure that every 10ms there is
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// some packet.
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//
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// c) Vendor specific commands to configure the FT245 are mostly ignored
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// in my code. Only those for reading the EEPROM are processed. See
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// DR_GetStatus and DR_VendorCmd below for my implementation.
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//
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197 |
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// All other TD_ and DR_ functions remain as provided with CY3681.
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//
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199 |
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//-----------------------------------------------------------------------------
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200 |
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201 |
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void usb_jtag_activity(void) // Called repeatedly while the device is idle
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{
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203 |
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if(!Running) return;
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204 |
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205 |
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ProgIO_Poll();
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206 |
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207 |
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if(!(EP1INCS & bmEPBUSY)) {
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208 |
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if(Pending > 0) {
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209 |
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BYTE o, n;
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210 |
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211 |
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AUTOPTRH2 = MSB( EP1INBUF );
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AUTOPTRL2 = LSB( EP1INBUF );
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213 |
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214 |
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XAUTODAT2 = 0x31;
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215 |
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XAUTODAT2 = 0x60;
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216 |
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217 |
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if(Pending > 0x3E) { n = 0x3E; Pending -= n; }
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else { n = Pending; Pending = 0; };
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220 |
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o = n;
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221 |
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222 |
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#ifdef USE_MOD256_OUTBUFFER
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223 |
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APTR1H = MSB( OutBuffer );
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APTR1L = FirstDataInOutBuffer;
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225 |
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while(n--) {
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226 |
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XAUTODAT2 = XAUTODAT1;
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227 |
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APTR1H = MSB( OutBuffer ); // Stay within 256-Byte-Buffer
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228 |
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}
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229 |
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FirstDataInOutBuffer = APTR1L;
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230 |
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#else
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231 |
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APTR1H = MSB( &(OutBuffer[FirstDataInOutBuffer]) );
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232 |
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APTR1L = LSB( &(OutBuffer[FirstDataInOutBuffer]) );
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233 |
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while(n--) {
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234 |
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XAUTODAT2 = XAUTODAT1;
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235 |
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236 |
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if(++FirstDataInOutBuffer >= OUTBUFFER_LEN) {
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237 |
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FirstDataInOutBuffer = 0;
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238 |
|
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APTR1H = MSB( OutBuffer );
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239 |
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APTR1L = LSB( OutBuffer );
|
240 |
|
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}
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241 |
|
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}
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242 |
|
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#endif
|
243 |
|
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SYNCDELAY;
|
244 |
|
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EP1INBC = 2 + o;
|
245 |
|
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TF2 = 1; // Make sure there will be a short transfer soon
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246 |
|
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} else if(TF2) {
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247 |
|
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EP1INBUF[0] = 0x31;
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248 |
|
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EP1INBUF[1] = 0x60;
|
249 |
|
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SYNCDELAY;
|
250 |
|
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EP1INBC = 2;
|
251 |
|
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TF2 = 0;
|
252 |
|
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}
|
253 |
|
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}
|
254 |
|
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|
255 |
|
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if(!(EP2468STAT & bmEP2EMPTY) && (Pending < OUTBUFFER_LEN-0x3F)) {
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256 |
|
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//BYTE i, n = EP2BCL; // bugfix by Sune Mai (Oct 2008,
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257 |
|
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// https://sourceforge.net/projects/urjtag/forums/forum/682993/topic/2312452)
|
258 |
|
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WORD i, n = EP2BCL|EP2BCH<<8;
|
259 |
|
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|
260 |
|
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APTR1H = MSB( EP2FIFOBUF );
|
261 |
|
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APTR1L = LSB( EP2FIFOBUF );
|
262 |
|
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|
263 |
|
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for(i=0;i<n;) {
|
264 |
|
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if(ClockBytes > 0) {
|
265 |
|
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//BYTE m; // bugfix by Sune Mai, see above
|
266 |
|
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WORD m;
|
267 |
|
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|
268 |
|
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m = n-i;
|
269 |
|
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if(ClockBytes < m) m = ClockBytes;
|
270 |
|
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ClockBytes -= m;
|
271 |
|
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i += m;
|
272 |
|
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|
273 |
|
|
/* Shift out 8 bits from d */
|
274 |
|
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|
275 |
|
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if(WriteOnly) { /* Shift out 8 bits from d */
|
276 |
|
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while(m--) ProgIO_ShiftOut(XAUTODAT1);
|
277 |
|
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} else { /* Shift in 8 bits at the other end */
|
278 |
|
|
while(m--) OutputByte(ProgIO_ShiftInOut(XAUTODAT1));
|
279 |
|
|
}
|
280 |
|
|
} else {
|
281 |
|
|
BYTE d = XAUTODAT1;
|
282 |
|
|
WriteOnly = (d & bmBIT6) ? FALSE : TRUE;
|
283 |
|
|
|
284 |
|
|
if(d & bmBIT7) {
|
285 |
|
|
/* Prepare byte transfer, do nothing else yet */
|
286 |
|
|
|
287 |
|
|
ClockBytes = d & 0x3F;
|
288 |
|
|
} else {
|
289 |
|
|
if(WriteOnly)
|
290 |
|
|
ProgIO_Set_State(d);
|
291 |
|
|
else
|
292 |
|
|
OutputByte(ProgIO_Set_Get_State(d));
|
293 |
|
|
}
|
294 |
|
|
i++;
|
295 |
|
|
}
|
296 |
|
|
}
|
297 |
|
|
|
298 |
|
|
SYNCDELAY;
|
299 |
|
|
EP2BCL = 0x80; // Re-arm endpoint 2
|
300 |
|
|
};
|
301 |
|
|
}
|
302 |
|
|
|
303 |
|
|
//-----------------------------------------------------------------------------
|
304 |
|
|
// Handler for Vendor Requests (
|
305 |
|
|
//-----------------------------------------------------------------------------
|
306 |
|
|
|
307 |
|
|
unsigned char app_vendor_cmd(void)
|
308 |
|
|
{
|
309 |
|
|
// OUT requests. Pretend we handle them all...
|
310 |
|
|
|
311 |
|
|
if ((bRequestType & bmRT_DIR_MASK) == bmRT_DIR_OUT) {
|
312 |
|
|
if(bRequest == RQ_GET_STATUS) {
|
313 |
|
|
Running = 1;
|
314 |
|
|
}
|
315 |
|
|
return 1;
|
316 |
|
|
}
|
317 |
|
|
|
318 |
|
|
// IN requests.
|
319 |
|
|
|
320 |
|
|
if(bRequest == 0x90) {
|
321 |
|
|
BYTE addr = (wIndexL<<1) & 0x7F;
|
322 |
|
|
EP0BUF[0] = eeprom[addr];
|
323 |
|
|
EP0BUF[1] = eeprom[addr+1];
|
324 |
|
|
} else {
|
325 |
|
|
// dummy data
|
326 |
|
|
EP0BUF[0] = 0x36;
|
327 |
|
|
EP0BUF[1] = 0x83;
|
328 |
|
|
}
|
329 |
|
|
|
330 |
|
|
EP0BCH = 0;
|
331 |
|
|
EP0BCL = (wLengthL<2) ? wLengthL : 2; // Arm endpoint with # bytes to transfer
|
332 |
|
|
|
333 |
|
|
return 1;
|
334 |
|
|
}
|
335 |
|
|
|
336 |
|
|
//-----------------------------------------------------------------------------
|
337 |
|
|
|
338 |
|
|
static void main_loop(void)
|
339 |
|
|
{
|
340 |
|
|
while(1) {
|
341 |
|
|
if(usb_setup_packet_avail()) usb_handle_setup_packet();
|
342 |
|
|
usb_jtag_activity();
|
343 |
|
|
}
|
344 |
|
|
}
|
345 |
|
|
|
346 |
|
|
//-----------------------------------------------------------------------------
|
347 |
|
|
|
348 |
|
|
extern void usb_fifo_init(void);
|
349 |
|
|
|
350 |
|
|
void main(void)
|
351 |
|
|
{
|
352 |
|
|
EA = 0; // disable all interrupts
|
353 |
18 |
wfjm |
|
354 |
|
|
// Digilent nexys3 and atlys boards change FIFOPINPOLAR such that
|
355 |
|
|
// EE and FF are active high. In nexys2 boards they are active low
|
356 |
|
|
// All config regs should be set (even when power on defaults are
|
357 |
|
|
// use, but this one especially....
|
358 |
|
|
FIFOPINPOLAR = 0;
|
359 |
17 |
wfjm |
|
360 |
|
|
usb_jtag_init();
|
361 |
|
|
usb_fifo_init();
|
362 |
|
|
eeprom_init();
|
363 |
|
|
setup_autovectors ();
|
364 |
|
|
usb_install_handlers ();
|
365 |
|
|
|
366 |
|
|
|
367 |
|
|
EA = 1; // enable interrupts
|
368 |
|
|
|
369 |
|
|
fx2_renumerate(); // simulates disconnect / reconnect
|
370 |
|
|
|
371 |
|
|
main_loop();
|
372 |
|
|
}
|
373 |
|
|
|
374 |
|
|
|
375 |
|
|
|
376 |
|
|
|