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[/] [w11/] [tags/] [w11a_V0.6/] [tools/] [src/] [librw11/] [Rw11Cpu.cpp] - Blame information for rev 19

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// $Id: Rw11Cpu.cpp 504 2013-04-13 15:37:24Z mueller $
//
// Copyright 2013- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
//
// This program is free software; you may redistribute and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation, either version 2, or at your option any later version.
//
// This program is distributed in the hope that it will be useful, but
// WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
// or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
// for complete details.
// 
// Revision History: 
// Date         Rev Version  Comment
// 2013-04-12   504   1.0    Initial version
// 2013-01-27   478   0.1    First draft
// ---------------------------------------------------------------------------
 
/*!
  \file
  \version $Id: Rw11Cpu.cpp 504 2013-04-13 15:37:24Z mueller $
  \brief   Implemenation of Rw11Cpu.
*/
#include <stdlib.h>
#include <fcntl.h>
#include <errno.h>
 
#include <vector>
#include <map>
#include <algorithm>
 
#include "boost/date_time/posix_time/posix_time_types.hpp"
 
#include "librtools/Rexception.hpp"
#include "librtools/RlogMsg.hpp"
#include "librtools/RosFill.hpp"
#include "librtools/RosPrintf.hpp"
#include "librtools/RosPrintBvi.hpp"
#include "Rw11Cntl.hpp"
 
#include "Rw11Cpu.hpp"
 
using namespace std;
 
/*!
  \class Retro::Rw11Cpu
  \brief FIXME_docs
*/
 
// all method definitions in namespace Retro
namespace Retro {
 
//------------------------------------------+-----------------------------------
// constants definitions
 
const uint16_t  Rw11Cpu::kCp_addr_conf;
const uint16_t  Rw11Cpu::kCp_addr_cntl;
const uint16_t  Rw11Cpu::kCp_addr_stat;
const uint16_t  Rw11Cpu::kCp_addr_psw;
const uint16_t  Rw11Cpu::kCp_addr_al;
const uint16_t  Rw11Cpu::kCp_addr_ah;
const uint16_t  Rw11Cpu::kCp_addr_mem;
const uint16_t  Rw11Cpu::kCp_addr_memi;
const uint16_t  Rw11Cpu::kCp_addr_r0;
const uint16_t  Rw11Cpu::kCp_addr_pc;
const uint16_t  Rw11Cpu::kCp_addr_ibrb;
const uint16_t  Rw11Cpu::kCp_addr_ibr;
 
const uint16_t  Rw11Cpu::kCp_func_noop;
const uint16_t  Rw11Cpu::kCp_func_start;
const uint16_t  Rw11Cpu::kCp_func_stop;
const uint16_t  Rw11Cpu::kCp_func_cont;
const uint16_t  Rw11Cpu::kCp_func_step;
const uint16_t  Rw11Cpu::kCp_func_reset;
 
const uint16_t  Rw11Cpu::kCp_stat_m_cpurust;
const uint16_t  Rw11Cpu::kCp_stat_v_cpurust;
const uint16_t  Rw11Cpu::kCp_stat_b_cpurust;
const uint16_t  Rw11Cpu::kCp_stat_m_cpuhalt;
const uint16_t  Rw11Cpu::kCp_stat_m_cpugo;
const uint16_t  Rw11Cpu::kCp_stat_m_cmdmerr;
const uint16_t  Rw11Cpu::kCp_stat_m_cmderr;
 
const uint16_t  Rw11Cpu::kCp_cpurust_init;
const uint16_t  Rw11Cpu::kCp_cpurust_halt;
const uint16_t  Rw11Cpu::kCp_cpurust_reset;
const uint16_t  Rw11Cpu::kCp_cpurust_stop;
const uint16_t  Rw11Cpu::kCp_cpurust_step;
const uint16_t  Rw11Cpu::kCp_cpurust_susp;
const uint16_t  Rw11Cpu::kCp_cpurust_runs;
const uint16_t  Rw11Cpu::kCp_cpurust_vecfet;
const uint16_t  Rw11Cpu::kCp_cpurust_recrsv;
const uint16_t  Rw11Cpu::kCp_cpurust_sfail;
const uint16_t  Rw11Cpu::kCp_cpurust_vfail;
 
//------------------------------------------+-----------------------------------
//! Constructor
 
Rw11Cpu::Rw11Cpu(const std::string& type)
  : fpW11(0),
    fType(type),
    fIndex(0),
    fBase(0),
    fCpuGo(0),
    fCpuStat(0),
    fCpuGoMutex(),
    fCpuGoCond(),
    fCntlMap(),
    fStats()
{}
 
//------------------------------------------+-----------------------------------
//! Destructor
 
Rw11Cpu::~Rw11Cpu()
{}
 
//------------------------------------------+-----------------------------------
//! FIXME_docs
 
void Rw11Cpu::Setup(Rw11* pw11)
{
  fpW11 = pw11;
  // command base: 'cn.', where n is cpu index
  string cbase = "c";
  cbase += '0'+Index();
  cbase += '.';
  Connect().AddrMapInsert(cbase+"conf", Base()+kCp_addr_conf);
  Connect().AddrMapInsert(cbase+"cntl", Base()+kCp_addr_cntl);
  Connect().AddrMapInsert(cbase+"stat", Base()+kCp_addr_stat);
  Connect().AddrMapInsert(cbase+"psw" , Base()+kCp_addr_psw);
  Connect().AddrMapInsert(cbase+"al"  , Base()+kCp_addr_al);
  Connect().AddrMapInsert(cbase+"ah"  , Base()+kCp_addr_ah);
  Connect().AddrMapInsert(cbase+"mem" , Base()+kCp_addr_mem);
  Connect().AddrMapInsert(cbase+"memi", Base()+kCp_addr_memi);
  Connect().AddrMapInsert(cbase+"r0"  , Base()+kCp_addr_r0);
  Connect().AddrMapInsert(cbase+"r1"  , Base()+kCp_addr_r0+1);
  Connect().AddrMapInsert(cbase+"r2"  , Base()+kCp_addr_r0+2);
  Connect().AddrMapInsert(cbase+"r3"  , Base()+kCp_addr_r0+3);
  Connect().AddrMapInsert(cbase+"r4"  , Base()+kCp_addr_r0+4);
  Connect().AddrMapInsert(cbase+"r5"  , Base()+kCp_addr_r0+5);
  Connect().AddrMapInsert(cbase+"sp"  , Base()+kCp_addr_r0+6);
  Connect().AddrMapInsert(cbase+"pc"  , Base()+kCp_addr_r0+7);
  Connect().AddrMapInsert(cbase+"ibrb", Base()+kCp_addr_ibrb);
  // create names for ib window, line c0.ib00, c0.ib02,.., c0.ib76
  for (int i=0; i<32; i++) {
    string rname = cbase + "ib";
    rname += '0' + ((i>>2)&07);
    rname += '0' + ((i<<1)&07);
    Connect().AddrMapInsert(rname , Base()+kCp_addr_ibr+i);
  }
  return;
}
 
//------------------------------------------+-----------------------------------
//! FIXME_docs
 
void Rw11Cpu::AddCntl(const boost::shared_ptr<Rw11Cntl>& spcntl)
{
  if (!spcntl)
    throw Rexception("Rw11Cpu::AddCntl","Bad args: spcntl == 0");
 
  string name(spcntl->Name());
  if (fCntlMap.find(name) != fCntlMap.end())
    throw Rexception("Rw11Cpu::AddCntl",
                     "Bad state: duplicate controller name");;
 
  fCntlMap.insert(cmap_val_t(name, spcntl));
  spcntl->SetCpu(this);
  return;
}
 
//------------------------------------------+-----------------------------------
//! FIXME_docs
 
bool Rw11Cpu::TestCntl(const std::string& name) const
{
  return fCntlMap.find(name) != fCntlMap.end();
}
 
//------------------------------------------+-----------------------------------
//! FIXME_docs
 
void Rw11Cpu::ListCntl(std::vector<std::string>& list) const
{
  list.clear();
  for (cmap_cit_t it=fCntlMap.begin(); it!=fCntlMap.end(); it++) {
    list.push_back((it->second)->Name());
  }
  return;
}
 
//------------------------------------------+-----------------------------------
//! FIXME_docs
 
Rw11Cntl& Rw11Cpu::Cntl(const std::string& name) const
{
  cmap_cit_t it=fCntlMap.find(name);
  if (it == fCntlMap.end())
    throw Rexception("Rw11Cpu::Cntl()",
                     "Bad args: controller name '" + name + "' unknown");
  return *(it->second);
}
 
//------------------------------------------+-----------------------------------
//! FIXME_docs
 
void Rw11Cpu::Start()
{
  for (cmap_cit_t it=fCntlMap.begin(); it!=fCntlMap.end(); it++) {
    Rw11Cntl& cntl(*(it->second));
    cntl.Probe();
    if (cntl.ProbeStatus().Found() && cntl.Enable()) {
      cntl.Start();
    }
  }
  return;
}
 
 
//------------------------------------------+-----------------------------------
//! FIXME_docs
 
std::string Rw11Cpu::NextCntlName(const std::string& base) const
{
  for (char let='a'; let<='z'; let++) {
    string name = base + let;
    if (fCntlMap.find(name) == fCntlMap.end()) return name;
  }
  throw Rexception("Rw11Cpu::NextCntlName",
                   "Bad args: all controller letters used for '" + base + "'");
  return "";
}
 
//------------------------------------------+-----------------------------------
//! FIXME_docs
 
int Rw11Cpu::AddIbrb(RlinkCommandList& clist, uint16_t ibaddr)
{
  return clist.AddWreg(fBase+kCp_addr_ibrb, ibaddr & ~(077));
}
 
//------------------------------------------+-----------------------------------
//! FIXME_docs
 
int Rw11Cpu::AddRibr(RlinkCommandList& clist, uint16_t ibaddr)
{
  uint16_t ibroff = (ibaddr & 077)/2;
  return clist.AddRreg(fBase+kCp_addr_ibr + ibroff);
}
 
//------------------------------------------+-----------------------------------
//! FIXME_docs
 
int Rw11Cpu::AddWibr(RlinkCommandList& clist, uint16_t ibaddr, uint16_t data)
{
  uint16_t ibroff = (ibaddr & 077)/2;
  return clist.AddWreg(fBase+kCp_addr_ibr + ibroff, data);
}
 
//------------------------------------------+-----------------------------------
//! FIXME_docs
 
bool Rw11Cpu::MemRead(uint16_t addr, std::vector<uint16_t>& data,
                      size_t nword, RerrMsg& emsg)
{
  data.resize(nword);
  size_t ndone = 0;
  while (nword>ndone) {
    size_t nblk = min(size_t(256), nword-ndone);
    RlinkCommandList clist;
    clist.AddWreg(fBase+kCp_addr_al, addr+2*ndone);
    clist.AddRblk(fBase+kCp_addr_memi, data.data()+ndone, nblk);
    if (!Server().Exec(clist, emsg)) return false;
    ndone += nblk;
  }
  return true;
}
 
//------------------------------------------+-----------------------------------
//! FIXME_docs
 
bool Rw11Cpu::MemWrite(uint16_t addr, const std::vector<uint16_t>& data,
                       RerrMsg& emsg)
{
  size_t nword = data.size();
  size_t ndone = 0;
  while (nword>ndone) {
    size_t nblk = min(size_t(256), nword-ndone);
    RlinkCommandList clist;
    clist.AddWreg(fBase+kCp_addr_al, addr+2*ndone);
    clist.AddWblk(fBase+kCp_addr_memi, data.data()+ndone, nblk);
    if (!Server().Exec(clist, emsg)) return false;
    ndone += nblk;
  }
  return true;
}
 
//------------------------------------------+-----------------------------------
//! FIXME_docs
 
bool Rw11Cpu::ProbeCntl(Rw11Probe& dsc)
{
  if (!(dsc.fProbeInt | dsc.fProbeRem) || dsc.fAddr == 0)
    throw Rexception("Rw11Cpu::Probe",
                     "Bad args: fAddr == 0 or fProbeInt|fProbeRem == false");
 
  if (!dsc.fProbeDone) {
    RlinkCommandList clist;
    int iib = -1;
    int irb = -1;
    if (dsc.fProbeInt) {
      clist.AddWreg(fBase+kCp_addr_al,  dsc.fAddr);
      iib = clist.AddRreg(fBase+kCp_addr_mem);
      clist.LastExpect(new RlinkCommandExpect(0,0xff)); // disable stat checking
    }
    if (dsc.fProbeRem) {
      AddIbrb(clist, dsc.fAddr);
      irb = AddRibr(clist, dsc.fAddr);
      clist.LastExpect(new RlinkCommandExpect(0,0xff)); // disable stat checking
    }
 
    Server().Exec(clist);
    // FIXME_code: handle errors
 
    if (dsc.fProbeInt) {
      dsc.fFoundInt = (clist[iib].Status() & (RlinkCommand::kStat_M_RbNak |
                                              RlinkCommand::kStat_M_RbErr)) ==0;
    }
    if (dsc.fProbeRem) {
      dsc.fFoundRem = (clist[irb].Status() & (RlinkCommand::kStat_M_RbNak |
                                              RlinkCommand::kStat_M_RbErr)) ==0;
    }
    dsc.fProbeDone = true;
  }
 
  return dsc.Found();
}
 
//------------------------------------------+-----------------------------------
//! FIXME_docs
 
// absolute binary format described in notes_ptape.txt
 
bool Rw11Cpu::LoadAbs(const std::string& fname, RerrMsg& emsg, bool trace)
{
  int fd = open(fname.c_str(), O_RDONLY);
 
  if (fd < 0) {
    emsg.InitErrno("Rw11Cpu::LoadAbs()", string("open() for '") + fname +
                   string("' failed: "), errno);
    return false;
  }
 
  enum states {
    s_chr0,
    s_chr1,
    s_cntlow,
    s_cnthgh,
    s_adrlow,
    s_adrhgh,
    s_data,
    s_chksum
  };
 
  typedef std::map<uint16_t, uint16_t> obmap_t;
  typedef obmap_t::iterator         obmap_it_t;
  typedef obmap_t::const_iterator   obmap_cit_t;
  typedef obmap_t::value_type       obmap_val_t;
 
  obmap_t oddbyte;                          // odd byte cache
 
  vector<uint16_t> data;
  data.reserve(256);
 
  int chrnum = -1;                          // char number in block
  int blknum = 0;                           // block number
  int bytcnt = 0;                           // byte count
  uint16_t ldaddr = 0;                      // load address
  uint8_t chksum = 0;                       // check sum
  uint16_t addr = 0;                        // current address
  uint16_t word = 0;                        // current word
 
  bool ok = false;
  bool go = true;
  enum states state = s_chr0;
 
  while (go) {
    uint8_t byte;
    int irc = read(fd, &byte, 1);
    if (irc == 0) {
      if (state == s_chr0) {
        ok = true;
      } else {
        emsg.Init("Rw11Cpu::LoadAbs()", "unexpected EOF");
      }
      break;
    } else if (irc < 0) {
      emsg.InitErrno("Rw11Cpu::LoadAbs()", "read() failed: ", errno);
      break;
    }
 
    chrnum += 1;
    chksum += byte;
 
    //cout << "+++1 " << blknum << "," << chrnum << " s=" << state << " : " 
    //     << RosPrintBvi(byte,8) << endl;
 
    switch (state) {
    case s_chr0:
      if (byte == 0) {
        chrnum = -1;
        state = s_chr0;
      } else if (byte == 1) {
        state = s_chr1;
      } else {
        emsg.InitPrintf("Rw11Cpu::LoadAbs()",
                        "unexpected start-of-block %3.3o", byte);
        go = false;
      }
      break;
 
    case s_chr1:
      if (byte == 0) {
        state = s_cntlow;
      } else {
        emsg.InitPrintf("Rw11Cpu::LoadAbs()",
                        "unexpected 2nd char %3.3o", byte);
        go = false;
      }
      break;
 
    case s_cntlow:
      bytcnt = byte;
      state  = s_cnthgh;
      break;
 
    case s_cnthgh:
      bytcnt |= uint16_t(byte) << 8;
      state  = s_adrlow;
      break;
 
    case s_adrlow:
      ldaddr = byte;
      state = s_adrhgh;
      break;
 
    case s_adrhgh:
      ldaddr |= uint16_t(byte) << 8;
      addr = ldaddr;
      word = 0;
      if ((addr & 0x01) == 1 && bytcnt > 6) {
        obmap_cit_t it = oddbyte.find(addr);
        if (it != oddbyte.end()) {
          word = it->second;
        } else {
          if (trace) {
            RlogMsg lmsg(LogFile());
            lmsg << "LoadAbs-W: no low byte data for " << RosPrintBvi(addr,8);
          }
        }
      }
 
      if (trace) {
        RlogMsg lmsg(Connect().LogFile());
        lmsg << "LoadAbs-I: block " << RosPrintf(blknum,"d",3)
             << ", length " << RosPrintf(bytcnt-6,"d",5)
             << " byte, address " << RosPrintBvi(ldaddr,8)
             << ":" << RosPrintBvi(uint16_t(ldaddr+(bytcnt-6)-1),8);
      }
      state = (bytcnt == 6) ? s_chksum : s_data;
      break;
 
    case s_data:
      if ((addr & 0x01) == 0) {             // even (low) byte
        word = byte;
      } else {                              // odd (high) byte
        word |= uint16_t(byte) << 8;
        data.push_back(word);
      }
      addr += 1;
      if (chrnum == bytcnt-1) state = s_chksum;
      break;
 
    case s_chksum:
      if (chksum != 0) {
        emsg.InitPrintf("Rw11Cpu::LoadAbs()", "check sum error %3.3o", chksum);
        go = false;
      } else if (bytcnt == 6) {
        if (trace) {
          RlogMsg lmsg(Connect().LogFile());
          lmsg << "LoadAbs-I: start address " << RosPrintBvi(ldaddr,8);
        }
        go = false;
        ok = true;
      } else {
        if ((addr & 0x01) == 1) {           // high byte not yet seen
          data.push_back(word);             // zero fill high byte
          oddbyte.insert(obmap_val_t(addr,word)); // store even byte for later
        }
 
        //cout << "+++2 " << RosPrintBvi(ldaddr,8) 
        //     << " " << data.size() << endl;
 
        if (!MemWrite(ldaddr, data, emsg)) {
          go = false;
        }
        data.clear();
      }
      chrnum = -1;
      blknum += 1;
      state = s_chr0;
      break;
 
    } // switch(state)
  } // while(go)
 
  close(fd);
 
  return ok;
}
 
//------------------------------------------+-----------------------------------
//! FIXME_docs
 
bool Rw11Cpu::Boot(const std::string& uname, RerrMsg& emsg)
{
  string cname;
  size_t uind=0;
  for (size_t i=0; i<uname.length(); i++) {
    char c = uname[i];
    if (c >= '0' && c <= '9') {
      string unum = cname.substr(i);
      uind = atoi(unum.c_str());
      break;
    } else {
      cname.push_back(c);
    }
  }
 
  if (!TestCntl(cname)) {
    emsg.Init("Rw11Cpu::Boot", string("controller '") + cname +
              string("' not known"));
    return false;
  }
 
  // FIXME_code: unit number not checked. Cntl doesn't even know about ...
 
  Rw11Cntl& cntl = Cntl(cname);
 
  vector<uint16_t> code;
  uint16_t aload = 0;
  uint16_t astart = 0;
 
  if (!cntl.BootCode(uind, code, aload, astart) || code.size()==0) {
    emsg.Init("Rw11Cpu::Boot", string("boot not supported for controller '")
              + cname + string("'"));
    return false;
  }
 
  if (!MemWrite(aload, code, emsg)) return false;
 
  RlinkCommandList clist;
  clist.AddWreg(fBase+kCp_addr_pc, astart);
  clist.AddWreg(fBase+kCp_addr_cntl, kCp_func_start);
  SetCpuGoUp();
  if (!Server().Exec(clist, emsg)) return false;
 
  return true;
}
 
//------------------------------------------+-----------------------------------
//! FIXME_docs
 
void Rw11Cpu::SetCpuGoUp()
{
  boost::lock_guard<boost::mutex> lock(fCpuGoMutex);
  fCpuGo   = true;
  fCpuStat = 0;
  fCpuGoCond.notify_all();
  return;
}
 
//------------------------------------------+-----------------------------------
//! FIXME_docs
 
void Rw11Cpu::SetCpuGoDown(uint16_t stat)
{
  if ((stat & kCp_stat_m_cpugo) == 0) {
    boost::lock_guard<boost::mutex> lock(fCpuGoMutex);
    fCpuGo   = false;
    fCpuStat = stat;
    fCpuGoCond.notify_all();
  }
  return;
}
 
//------------------------------------------+-----------------------------------
//! FIXME_docs
 
double Rw11Cpu::WaitCpuGoDown(double tout)
{
  boost::system_time t0(boost::get_system_time());
  boost::system_time timeout(boost::posix_time::max_date_time);
  if (tout > 0.)
    timeout = t0 + boost::posix_time::microseconds((long)1E6 * tout);
  boost::unique_lock<boost::mutex> lock(fCpuGoMutex);
  while (fCpuGo) {
    if (!fCpuGoCond.timed_wait(lock, timeout)) return -1.;
  }
  boost::posix_time::time_duration dt = boost::get_system_time() - t0;
  return double(dt.ticks()) / dt.ticks_per_second();
}
 
//------------------------------------------+-----------------------------------
//! FIXME_docs
 
void Rw11Cpu::W11AttnHandler()
{
  RlinkCommandList clist;
  clist.AddRreg(fBase+kCp_addr_stat);
  if (Server().Exec(clist))
    SetCpuGoDown(clist[0].Data());
  return;
}
 
//------------------------------------------+-----------------------------------
//! FIXME_docs
 
void Rw11Cpu::Dump(std::ostream& os, int ind, const char* text) const
{
  RosFill bl(ind);
  os << bl << (text?text:"--") << "Rw11Cpu @ " << this << endl;
 
  os << bl << "  fpW11:           " << fpW11 << endl;
  os << bl << "  fType:           " << fType << endl;
  os << bl << "  fIndex:          " << fIndex << endl;
  os << bl << "  fBase:           " << RosPrintf(fBase,"$x0",4) << endl;
  os << bl << "  fCpuGo:          " << fCpuGo << endl;
  os << bl << "  fCpuStat:        " << RosPrintf(fCpuStat,"$x0",4) << endl;
  os << bl << "  fCntlMap:        " << endl;
  for (cmap_cit_t it=fCntlMap.begin(); it!=fCntlMap.end(); it++) {
    os << bl << "    " << RosPrintf((it->first).c_str(), "-s",8)
       << " : " << it->second << endl;
  }
  fStats.Dump(os, ind+2, "fStats: ");
  return;
}
 
} // end namespace Retro

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[/] [w11/] [tags/] [w11a_V0.6/] [tools/] [src/] [librw11/] [Rw11Cpu.cpp] - Blame information for rev 19

Line No.	Rev	Author	Line
1	19	wfjm	`// $Id: Rw11Cpu.cpp 504 2013-04-13 15:37:24Z mueller $`
2			`//`
3			`// Copyright 2013- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>`
4			`//`
5			`// This program is free software; you may redistribute and/or modify it under`
6			`// the terms of the GNU General Public License as published by the Free`
7			`// Software Foundation, either version 2, or at your option any later version.`
8			`//`
9			`// This program is distributed in the hope that it will be useful, but`
10			`// WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY`
11			`// or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License`
12			`// for complete details.`
13			`//`
14			`// Revision History:`
15			`// Date Rev Version Comment`
16			`// 2013-04-12 504 1.0 Initial version`
17			`// 2013-01-27 478 0.1 First draft`
18			`// ---------------------------------------------------------------------------`
19
20			`/*!`
21			`\file`
22			`\version $Id: Rw11Cpu.cpp 504 2013-04-13 15:37:24Z mueller $`
23			`\brief Implemenation of Rw11Cpu.`
24			`*/`
25			`#include <stdlib.h>`
26			`#include <fcntl.h>`
27			`#include <errno.h>`
28
29			`#include <vector>`
30			`#include <map>`
31			`#include <algorithm>`
32
33			`#include "boost/date_time/posix_time/posix_time_types.hpp"`
34
35			`#include "librtools/Rexception.hpp"`
36			`#include "librtools/RlogMsg.hpp"`
37			`#include "librtools/RosFill.hpp"`
38			`#include "librtools/RosPrintf.hpp"`
39			`#include "librtools/RosPrintBvi.hpp"`
40			`#include "Rw11Cntl.hpp"`
41
42			`#include "Rw11Cpu.hpp"`
43
44			`using namespace std;`
45
46			`/*!`
47			`\class Retro::Rw11Cpu`
48			`\brief FIXME_docs`
49			`*/`
50
51			`// all method definitions in namespace Retro`
52			`namespace Retro {`
53
54			`//------------------------------------------+-----------------------------------`
55			`// constants definitions`
56
57			`const uint16_t Rw11Cpu::kCp_addr_conf;`
58			`const uint16_t Rw11Cpu::kCp_addr_cntl;`
59			`const uint16_t Rw11Cpu::kCp_addr_stat;`
60			`const uint16_t Rw11Cpu::kCp_addr_psw;`
61			`const uint16_t Rw11Cpu::kCp_addr_al;`
62			`const uint16_t Rw11Cpu::kCp_addr_ah;`
63			`const uint16_t Rw11Cpu::kCp_addr_mem;`
64			`const uint16_t Rw11Cpu::kCp_addr_memi;`
65			`const uint16_t Rw11Cpu::kCp_addr_r0;`
66			`const uint16_t Rw11Cpu::kCp_addr_pc;`
67			`const uint16_t Rw11Cpu::kCp_addr_ibrb;`
68			`const uint16_t Rw11Cpu::kCp_addr_ibr;`
69
70			`const uint16_t Rw11Cpu::kCp_func_noop;`
71			`const uint16_t Rw11Cpu::kCp_func_start;`
72			`const uint16_t Rw11Cpu::kCp_func_stop;`
73			`const uint16_t Rw11Cpu::kCp_func_cont;`
74			`const uint16_t Rw11Cpu::kCp_func_step;`
75			`const uint16_t Rw11Cpu::kCp_func_reset;`
76
77			`const uint16_t Rw11Cpu::kCp_stat_m_cpurust;`
78			`const uint16_t Rw11Cpu::kCp_stat_v_cpurust;`
79			`const uint16_t Rw11Cpu::kCp_stat_b_cpurust;`
80			`const uint16_t Rw11Cpu::kCp_stat_m_cpuhalt;`
81			`const uint16_t Rw11Cpu::kCp_stat_m_cpugo;`
82			`const uint16_t Rw11Cpu::kCp_stat_m_cmdmerr;`
83			`const uint16_t Rw11Cpu::kCp_stat_m_cmderr;`
84
85			`const uint16_t Rw11Cpu::kCp_cpurust_init;`
86			`const uint16_t Rw11Cpu::kCp_cpurust_halt;`
87			`const uint16_t Rw11Cpu::kCp_cpurust_reset;`
88			`const uint16_t Rw11Cpu::kCp_cpurust_stop;`
89			`const uint16_t Rw11Cpu::kCp_cpurust_step;`
90			`const uint16_t Rw11Cpu::kCp_cpurust_susp;`
91			`const uint16_t Rw11Cpu::kCp_cpurust_runs;`
92			`const uint16_t Rw11Cpu::kCp_cpurust_vecfet;`
93			`const uint16_t Rw11Cpu::kCp_cpurust_recrsv;`
94			`const uint16_t Rw11Cpu::kCp_cpurust_sfail;`
95			`const uint16_t Rw11Cpu::kCp_cpurust_vfail;`
96
97			`//------------------------------------------+-----------------------------------`
98			`//! Constructor`
99
100			`Rw11Cpu::Rw11Cpu(const std::string& type)`
101			`: fpW11(0),`
102			`fType(type),`
103			`fIndex(0),`
104			`fBase(0),`
105			`fCpuGo(0),`
106			`fCpuStat(0),`
107			`fCpuGoMutex(),`
108			`fCpuGoCond(),`
109			`fCntlMap(),`
110			`fStats()`
111			`{}`
112
113			`//------------------------------------------+-----------------------------------`
114			`//! Destructor`
115
116			`Rw11Cpu::~Rw11Cpu()`
117			`{}`
118
119			`//------------------------------------------+-----------------------------------`
120			`//! FIXME_docs`
121
122			`void Rw11Cpu::Setup(Rw11* pw11)`
123			`{`
124			`fpW11 = pw11;`
125			`// command base: 'cn.', where n is cpu index`
126			`string cbase = "c";`
127			`cbase += '0'+Index();`
128			`cbase += '.';`
129			`Connect().AddrMapInsert(cbase+"conf", Base()+kCp_addr_conf);`
130			`Connect().AddrMapInsert(cbase+"cntl", Base()+kCp_addr_cntl);`
131			`Connect().AddrMapInsert(cbase+"stat", Base()+kCp_addr_stat);`
132			`Connect().AddrMapInsert(cbase+"psw" , Base()+kCp_addr_psw);`
133			`Connect().AddrMapInsert(cbase+"al" , Base()+kCp_addr_al);`
134			`Connect().AddrMapInsert(cbase+"ah" , Base()+kCp_addr_ah);`
135			`Connect().AddrMapInsert(cbase+"mem" , Base()+kCp_addr_mem);`
136			`Connect().AddrMapInsert(cbase+"memi", Base()+kCp_addr_memi);`
137			`Connect().AddrMapInsert(cbase+"r0" , Base()+kCp_addr_r0);`
138			`Connect().AddrMapInsert(cbase+"r1" , Base()+kCp_addr_r0+1);`
139			`Connect().AddrMapInsert(cbase+"r2" , Base()+kCp_addr_r0+2);`
140			`Connect().AddrMapInsert(cbase+"r3" , Base()+kCp_addr_r0+3);`
141			`Connect().AddrMapInsert(cbase+"r4" , Base()+kCp_addr_r0+4);`
142			`Connect().AddrMapInsert(cbase+"r5" , Base()+kCp_addr_r0+5);`
143			`Connect().AddrMapInsert(cbase+"sp" , Base()+kCp_addr_r0+6);`
144			`Connect().AddrMapInsert(cbase+"pc" , Base()+kCp_addr_r0+7);`
145			`Connect().AddrMapInsert(cbase+"ibrb", Base()+kCp_addr_ibrb);`
146			`// create names for ib window, line c0.ib00, c0.ib02,.., c0.ib76`
147			`for (int i=0; i<32; i++) {`
148			`string rname = cbase + "ib";`
149			`rname += '0' + ((i>>2)&07);`
150			`rname += '0' + ((i<<1)&07);`
151			`Connect().AddrMapInsert(rname , Base()+kCp_addr_ibr+i);`
152			`}`
153			`return;`
154			`}`
155
156			`//------------------------------------------+-----------------------------------`
157			`//! FIXME_docs`
158
159			`void Rw11Cpu::AddCntl(const boost::shared_ptr<Rw11Cntl>& spcntl)`
160			`{`
161			`if (!spcntl)`
162			`throw Rexception("Rw11Cpu::AddCntl","Bad args: spcntl == 0");`
163
164			`string name(spcntl->Name());`
165			`if (fCntlMap.find(name) != fCntlMap.end())`
166			`throw Rexception("Rw11Cpu::AddCntl",`
167			`"Bad state: duplicate controller name");;`
168
169			`fCntlMap.insert(cmap_val_t(name, spcntl));`
170			`spcntl->SetCpu(this);`
171			`return;`
172			`}`
173
174			`//------------------------------------------+-----------------------------------`
175			`//! FIXME_docs`
176
177			`bool Rw11Cpu::TestCntl(const std::string& name) const`
178			`{`
179			`return fCntlMap.find(name) != fCntlMap.end();`
180			`}`
181
182			`//------------------------------------------+-----------------------------------`
183			`//! FIXME_docs`
184
185			`void Rw11Cpu::ListCntl(std::vector<std::string>& list) const`
186			`{`
187			`list.clear();`
188			`for (cmap_cit_t it=fCntlMap.begin(); it!=fCntlMap.end(); it++) {`
189			`list.push_back((it->second)->Name());`
190			`}`
191			`return;`
192			`}`
193
194			`//------------------------------------------+-----------------------------------`
195			`//! FIXME_docs`
196
197			`Rw11Cntl& Rw11Cpu::Cntl(const std::string& name) const`
198			`{`
199			`cmap_cit_t it=fCntlMap.find(name);`
200			`if (it == fCntlMap.end())`
201			`throw Rexception("Rw11Cpu::Cntl()",`
202			`"Bad args: controller name '" + name + "' unknown");`
203			`return *(it->second);`
204			`}`
205
206			`//------------------------------------------+-----------------------------------`
207			`//! FIXME_docs`
208
209			`void Rw11Cpu::Start()`
210			`{`
211			`for (cmap_cit_t it=fCntlMap.begin(); it!=fCntlMap.end(); it++) {`
212			`Rw11Cntl& cntl(*(it->second));`
213			`cntl.Probe();`
214			`if (cntl.ProbeStatus().Found() && cntl.Enable()) {`
215			`cntl.Start();`
216			`}`
217			`}`
218			`return;`
219			`}`
220
221
222			`//------------------------------------------+-----------------------------------`
223			`//! FIXME_docs`
224
225			`std::string Rw11Cpu::NextCntlName(const std::string& base) const`
226			`{`
227			`for (char let='a'; let<='z'; let++) {`
228			`string name = base + let;`
229			`if (fCntlMap.find(name) == fCntlMap.end()) return name;`
230			`}`
231			`throw Rexception("Rw11Cpu::NextCntlName",`
232			`"Bad args: all controller letters used for '" + base + "'");`
233			`return "";`
234			`}`
235
236			`//------------------------------------------+-----------------------------------`
237			`//! FIXME_docs`
238
239			`int Rw11Cpu::AddIbrb(RlinkCommandList& clist, uint16_t ibaddr)`
240			`{`
241			`return clist.AddWreg(fBase+kCp_addr_ibrb, ibaddr & ~(077));`
242			`}`
243
244			`//------------------------------------------+-----------------------------------`
245			`//! FIXME_docs`
246
247			`int Rw11Cpu::AddRibr(RlinkCommandList& clist, uint16_t ibaddr)`
248			`{`
249			`uint16_t ibroff = (ibaddr & 077)/2;`
250			`return clist.AddRreg(fBase+kCp_addr_ibr + ibroff);`
251			`}`
252
253			`//------------------------------------------+-----------------------------------`
254			`//! FIXME_docs`
255
256			`int Rw11Cpu::AddWibr(RlinkCommandList& clist, uint16_t ibaddr, uint16_t data)`
257			`{`
258			`uint16_t ibroff = (ibaddr & 077)/2;`
259			`return clist.AddWreg(fBase+kCp_addr_ibr + ibroff, data);`
260			`}`
261
262			`//------------------------------------------+-----------------------------------`
263			`//! FIXME_docs`
264
265			`bool Rw11Cpu::MemRead(uint16_t addr, std::vector<uint16_t>& data,`
266			`size_t nword, RerrMsg& emsg)`
267			`{`
268			`data.resize(nword);`
269			`size_t ndone = 0;`
270			`while (nword>ndone) {`
271			`size_t nblk = min(size_t(256), nword-ndone);`
272			`RlinkCommandList clist;`
273			`clist.AddWreg(fBase+kCp_addr_al, addr+2*ndone);`
274			`clist.AddRblk(fBase+kCp_addr_memi, data.data()+ndone, nblk);`
275			`if (!Server().Exec(clist, emsg)) return false;`
276			`ndone += nblk;`
277			`}`
278			`return true;`
279			`}`
280
281			`//------------------------------------------+-----------------------------------`
282			`//! FIXME_docs`
283
284			`bool Rw11Cpu::MemWrite(uint16_t addr, const std::vector<uint16_t>& data,`
285			`RerrMsg& emsg)`
286			`{`
287			`size_t nword = data.size();`
288			`size_t ndone = 0;`
289			`while (nword>ndone) {`
290			`size_t nblk = min(size_t(256), nword-ndone);`
291			`RlinkCommandList clist;`
292			`clist.AddWreg(fBase+kCp_addr_al, addr+2*ndone);`
293			`clist.AddWblk(fBase+kCp_addr_memi, data.data()+ndone, nblk);`
294			`if (!Server().Exec(clist, emsg)) return false;`
295			`ndone += nblk;`
296			`}`
297			`return true;`
298			`}`
299
300			`//------------------------------------------+-----------------------------------`
301			`//! FIXME_docs`
302
303			`bool Rw11Cpu::ProbeCntl(Rw11Probe& dsc)`
304			`{`
305			`if (!(dsc.fProbeInt \| dsc.fProbeRem) \|\| dsc.fAddr == 0)`
306			`throw Rexception("Rw11Cpu::Probe",`
307			`"Bad args: fAddr == 0 or fProbeInt\|fProbeRem == false");`
308
309			`if (!dsc.fProbeDone) {`
310			`RlinkCommandList clist;`
311			`int iib = -1;`
312			`int irb = -1;`
313			`if (dsc.fProbeInt) {`
314			`clist.AddWreg(fBase+kCp_addr_al, dsc.fAddr);`
315			`iib = clist.AddRreg(fBase+kCp_addr_mem);`
316			`clist.LastExpect(new RlinkCommandExpect(0,0xff)); // disable stat checking`
317			`}`
318			`if (dsc.fProbeRem) {`
319			`AddIbrb(clist, dsc.fAddr);`
320			`irb = AddRibr(clist, dsc.fAddr);`
321			`clist.LastExpect(new RlinkCommandExpect(0,0xff)); // disable stat checking`
322			`}`
323
324			`Server().Exec(clist);`
325			`// FIXME_code: handle errors`
326
327			`if (dsc.fProbeInt) {`
328			`dsc.fFoundInt = (clist[iib].Status() & (RlinkCommand::kStat_M_RbNak \|`
329			`RlinkCommand::kStat_M_RbErr)) ==0;`
330			`}`
331			`if (dsc.fProbeRem) {`
332			`dsc.fFoundRem = (clist[irb].Status() & (RlinkCommand::kStat_M_RbNak \|`
333			`RlinkCommand::kStat_M_RbErr)) ==0;`
334			`}`
335			`dsc.fProbeDone = true;`
336			`}`
337
338			`return dsc.Found();`
339			`}`
340
341			`//------------------------------------------+-----------------------------------`
342			`//! FIXME_docs`
343
344			`// absolute binary format described in notes_ptape.txt`
345
346			`bool Rw11Cpu::LoadAbs(const std::string& fname, RerrMsg& emsg, bool trace)`
347			`{`
348			`int fd = open(fname.c_str(), O_RDONLY);`
349
350			`if (fd < 0) {`
351			`emsg.InitErrno("Rw11Cpu::LoadAbs()", string("open() for '") + fname +`
352			`string("' failed: "), errno);`
353			`return false;`
354			`}`
355
356			`enum states {`
357			`s_chr0,`
358			`s_chr1,`
359			`s_cntlow,`
360			`s_cnthgh,`
361			`s_adrlow,`
362			`s_adrhgh,`
363			`s_data,`
364			`s_chksum`
365			`};`
366
367			`typedef std::map<uint16_t, uint16_t> obmap_t;`
368			`typedef obmap_t::iterator obmap_it_t;`
369			`typedef obmap_t::const_iterator obmap_cit_t;`
370			`typedef obmap_t::value_type obmap_val_t;`
371
372			`obmap_t oddbyte; // odd byte cache`
373
374			`vector<uint16_t> data;`
375			`data.reserve(256);`
376
377			`int chrnum = -1; // char number in block`
378			`int blknum = 0; // block number`
379			`int bytcnt = 0; // byte count`
380			`uint16_t ldaddr = 0; // load address`
381			`uint8_t chksum = 0; // check sum`
382			`uint16_t addr = 0; // current address`
383			`uint16_t word = 0; // current word`
384
385			`bool ok = false;`
386			`bool go = true;`
387			`enum states state = s_chr0;`
388
389			`while (go) {`
390			`uint8_t byte;`
391			`int irc = read(fd, &byte, 1);`
392			`if (irc == 0) {`
393			`if (state == s_chr0) {`
394			`ok = true;`
395			`} else {`
396			`emsg.Init("Rw11Cpu::LoadAbs()", "unexpected EOF");`
397			`}`
398			`break;`
399			`} else if (irc < 0) {`
400			`emsg.InitErrno("Rw11Cpu::LoadAbs()", "read() failed: ", errno);`
401			`break;`
402			`}`
403
404			`chrnum += 1;`
405			`chksum += byte;`
406
407			`//cout << "+++1 " << blknum << "," << chrnum << " s=" << state << " : "`
408			`// << RosPrintBvi(byte,8) << endl;`
409
410			`switch (state) {`
411			`case s_chr0:`
412			`if (byte == 0) {`
413			`chrnum = -1;`
414			`state = s_chr0;`
415			`} else if (byte == 1) {`
416			`state = s_chr1;`
417			`} else {`
418			`emsg.InitPrintf("Rw11Cpu::LoadAbs()",`
419			`"unexpected start-of-block %3.3o", byte);`
420			`go = false;`
421			`}`
422			`break;`
423
424			`case s_chr1:`
425			`if (byte == 0) {`
426			`state = s_cntlow;`
427			`} else {`
428			`emsg.InitPrintf("Rw11Cpu::LoadAbs()",`
429			`"unexpected 2nd char %3.3o", byte);`
430			`go = false;`
431			`}`
432			`break;`
433
434			`case s_cntlow:`
435			`bytcnt = byte;`
436			`state = s_cnthgh;`
437			`break;`
438
439			`case s_cnthgh:`
440			`bytcnt \|= uint16_t(byte) << 8;`
441			`state = s_adrlow;`
442			`break;`
443
444			`case s_adrlow:`
445			`ldaddr = byte;`
446			`state = s_adrhgh;`
447			`break;`
448
449			`case s_adrhgh:`
450			`ldaddr \|= uint16_t(byte) << 8;`
451			`addr = ldaddr;`
452			`word = 0;`
453			`if ((addr & 0x01) == 1 && bytcnt > 6) {`
454			`obmap_cit_t it = oddbyte.find(addr);`
455			`if (it != oddbyte.end()) {`
456			`word = it->second;`
457			`} else {`
458			`if (trace) {`
459			`RlogMsg lmsg(LogFile());`
460			`lmsg << "LoadAbs-W: no low byte data for " << RosPrintBvi(addr,8);`
461			`}`
462			`}`
463			`}`
464
465			`if (trace) {`
466			`RlogMsg lmsg(Connect().LogFile());`
467			`lmsg << "LoadAbs-I: block " << RosPrintf(blknum,"d",3)`
468			`<< ", length " << RosPrintf(bytcnt-6,"d",5)`
469			`<< " byte, address " << RosPrintBvi(ldaddr,8)`
470			`<< ":" << RosPrintBvi(uint16_t(ldaddr+(bytcnt-6)-1),8);`
471			`}`
472			`state = (bytcnt == 6) ? s_chksum : s_data;`
473			`break;`
474
475			`case s_data:`
476			`if ((addr & 0x01) == 0) { // even (low) byte`
477			`word = byte;`
478			`} else { // odd (high) byte`
479			`word \|= uint16_t(byte) << 8;`
480			`data.push_back(word);`
481			`}`
482			`addr += 1;`
483			`if (chrnum == bytcnt-1) state = s_chksum;`
484			`break;`
485
486			`case s_chksum:`
487			`if (chksum != 0) {`
488			`emsg.InitPrintf("Rw11Cpu::LoadAbs()", "check sum error %3.3o", chksum);`
489			`go = false;`
490			`} else if (bytcnt == 6) {`
491			`if (trace) {`
492			`RlogMsg lmsg(Connect().LogFile());`
493			`lmsg << "LoadAbs-I: start address " << RosPrintBvi(ldaddr,8);`
494			`}`
495			`go = false;`
496			`ok = true;`
497			`} else {`
498			`if ((addr & 0x01) == 1) { // high byte not yet seen`
499			`data.push_back(word); // zero fill high byte`
500			`oddbyte.insert(obmap_val_t(addr,word)); // store even byte for later`
501			`}`
502
503			`//cout << "+++2 " << RosPrintBvi(ldaddr,8)`
504			`// << " " << data.size() << endl;`
505
506			`if (!MemWrite(ldaddr, data, emsg)) {`
507			`go = false;`
508			`}`
509			`data.clear();`
510			`}`
511			`chrnum = -1;`
512			`blknum += 1;`
513			`state = s_chr0;`
514			`break;`
515
516			`} // switch(state)`
517			`} // while(go)`
518
519			`close(fd);`
520
521			`return ok;`
522			`}`
523
524			`//------------------------------------------+-----------------------------------`
525			`//! FIXME_docs`
526
527			`bool Rw11Cpu::Boot(const std::string& uname, RerrMsg& emsg)`
528			`{`
529			`string cname;`
530			`size_t uind=0;`
531			`for (size_t i=0; i<uname.length(); i++) {`
532			`char c = uname[i];`
533			`if (c >= '0' && c <= '9') {`
534			`string unum = cname.substr(i);`
535			`uind = atoi(unum.c_str());`
536			`break;`
537			`} else {`
538			`cname.push_back(c);`
539			`}`
540			`}`
541
542			`if (!TestCntl(cname)) {`
543			`emsg.Init("Rw11Cpu::Boot", string("controller '") + cname +`
544			`string("' not known"));`
545			`return false;`
546			`}`
547
548			`// FIXME_code: unit number not checked. Cntl doesn't even know about ...`
549
550			`Rw11Cntl& cntl = Cntl(cname);`
551
552			`vector<uint16_t> code;`
553			`uint16_t aload = 0;`
554			`uint16_t astart = 0;`
555
556			`if (!cntl.BootCode(uind, code, aload, astart) \|\| code.size()==0) {`
557			`emsg.Init("Rw11Cpu::Boot", string("boot not supported for controller '")`
558			`+ cname + string("'"));`
559			`return false;`
560			`}`
561
562			`if (!MemWrite(aload, code, emsg)) return false;`
563
564			`RlinkCommandList clist;`
565			`clist.AddWreg(fBase+kCp_addr_pc, astart);`
566			`clist.AddWreg(fBase+kCp_addr_cntl, kCp_func_start);`
567			`SetCpuGoUp();`
568			`if (!Server().Exec(clist, emsg)) return false;`
569
570			`return true;`
571			`}`
572
573			`//------------------------------------------+-----------------------------------`
574			`//! FIXME_docs`
575
576			`void Rw11Cpu::SetCpuGoUp()`
577			`{`
578			`boost::lock_guard<boost::mutex> lock(fCpuGoMutex);`
579			`fCpuGo = true;`
580			`fCpuStat = 0;`
581			`fCpuGoCond.notify_all();`
582			`return;`
583			`}`
584
585			`//------------------------------------------+-----------------------------------`
586			`//! FIXME_docs`
587
588			`void Rw11Cpu::SetCpuGoDown(uint16_t stat)`
589			`{`
590			`if ((stat & kCp_stat_m_cpugo) == 0) {`
591			`boost::lock_guard<boost::mutex> lock(fCpuGoMutex);`
592			`fCpuGo = false;`
593			`fCpuStat = stat;`
594			`fCpuGoCond.notify_all();`
595			`}`
596			`return;`
597			`}`
598
599			`//------------------------------------------+-----------------------------------`
600			`//! FIXME_docs`
601
602			`double Rw11Cpu::WaitCpuGoDown(double tout)`
603			`{`
604			`boost::system_time t0(boost::get_system_time());`
605			`boost::system_time timeout(boost::posix_time::max_date_time);`
606			`if (tout > 0.)`
607			`timeout = t0 + boost::posix_time::microseconds((long)1E6 * tout);`
608			`boost::unique_lock<boost::mutex> lock(fCpuGoMutex);`
609			`while (fCpuGo) {`
610			`if (!fCpuGoCond.timed_wait(lock, timeout)) return -1.;`
611			`}`
612			`boost::posix_time::time_duration dt = boost::get_system_time() - t0;`
613			`return double(dt.ticks()) / dt.ticks_per_second();`
614			`}`
615
616			`//------------------------------------------+-----------------------------------`
617			`//! FIXME_docs`
618
619			`void Rw11Cpu::W11AttnHandler()`
620			`{`
621			`RlinkCommandList clist;`
622			`clist.AddRreg(fBase+kCp_addr_stat);`
623			`if (Server().Exec(clist))`
624			`SetCpuGoDown(clist[0].Data());`
625			`return;`
626			`}`
627
628			`//------------------------------------------+-----------------------------------`
629			`//! FIXME_docs`
630
631			`void Rw11Cpu::Dump(std::ostream& os, int ind, const char* text) const`
632			`{`
633			`RosFill bl(ind);`
634			`os << bl << (text?text:"--") << "Rw11Cpu @ " << this << endl;`
635
636			`os << bl << " fpW11: " << fpW11 << endl;`
637			`os << bl << " fType: " << fType << endl;`
638			`os << bl << " fIndex: " << fIndex << endl;`
639			`os << bl << " fBase: " << RosPrintf(fBase,"$x0",4) << endl;`
640			`os << bl << " fCpuGo: " << fCpuGo << endl;`
641			`os << bl << " fCpuStat: " << RosPrintf(fCpuStat,"$x0",4) << endl;`
642			`os << bl << " fCntlMap: " << endl;`
643			`for (cmap_cit_t it=fCntlMap.begin(); it!=fCntlMap.end(); it++) {`
644			`os << bl << " " << RosPrintf((it->first).c_str(), "-s",8)`
645			`<< " : " << it->second << endl;`
646			`}`
647			`fStats.Dump(os, ind+2, "fStats: ");`
648			`return;`
649			`}`
650
651			`} // end namespace Retro`