OpenCores
URL https://opencores.org/ocsvn/w11/w11/trunk

Subversion Repositories w11

[/] [w11/] [tags/] [w11a_V0.6/] [tools/] [src/] [librwxxtpp/] [RtclRw11Cpu.cpp] - Blame information for rev 24

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 22 wfjm 
// $Id: RtclRw11Cpu.cpp 552 2014-03-02 23:02:00Z mueller $
2 19 wfjm 
//
3 22 wfjm 
// Copyright 2013-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
4 19 wfjm 
//
5 
// This program is free software; you may redistribute and/or modify it under
6 
// the terms of the GNU General Public License as published by the Free
7 
// Software Foundation, either version 2, or at your option any later version.
8 
//
9 
// This program is distributed in the hope that it will be useful, but
10 
// WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
11 
// or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
12 
// for complete details.
13 
//
14 
// Revision History:
15 
// Date         Rev Version  Comment
16 22 wfjm 
// 2014-03-02   552   1.0.3  M_cp: add -ral and -rah options (addr reg readback)
17 
// 2013-05-19   521   1.0.2  M_cp: merge -wibrb|-wibrbbe again; add -wa
18 20 wfjm 
// 2013-04-26   511   1.0.1  add M_show
19 19 wfjm 
// 2013-04-02   502   1.0    Initial version
20 
// 2013-02-02   480   0.1    First draft
21 
// ---------------------------------------------------------------------------
22 
 
23 
/*!
24 
  \file
25 22 wfjm 
  \version $Id: RtclRw11Cpu.cpp 552 2014-03-02 23:02:00Z mueller $
26 19 wfjm 
  \brief   Implemenation of RtclRw11Cpu.
27 
*/
28 
 
29 
#include <unistd.h>
30 
#include <errno.h>
31 
#include <stdio.h>
32 
#include <stdlib.h>
33 
#include <sys/wait.h>
34 
 
35 
#include <vector>
36 
#include <memory>
37 
#include <sstream>
38 
 
39 
#include "boost/bind.hpp"
40 20 wfjm 
#include "boost/thread/locks.hpp"
41 19 wfjm 
 
42 
#include "librtools/RerrMsg.hpp"
43 
#include "librtools/RlogMsg.hpp"
44 
#include "librtools/RosPrintf.hpp"
45 
#include "librtools/RosPrintBvi.hpp"
46 
#include "librtcltools/Rtcl.hpp"
47 
#include "librtcltools/RtclStats.hpp"
48 
#include "librtcltools/RtclOPtr.hpp"
49 
#include "librtcltools/RtclNameSet.hpp"
50 
#include "librlink/RlinkCommandList.hpp"
51 
 
52 
#include "RtclRw11.hpp"
53 
 
54 
#include "RtclRw11CntlFactory.hpp"
55 
#include "librw11/Rw11Cntl.hpp"
56 
 
57 
#include "RtclRw11Cpu.hpp"
58 
 
59 
using namespace std;
60 
 
61 
/*!
62 
  \class Retro::RtclRw11Cpu
63 
  \brief FIXME_docs
64 
*/
65 
 
66 
// all method definitions in namespace Retro
67 
namespace Retro {
68 
 
69 
//------------------------------------------+-----------------------------------
70 
//! Default constructor
71 
 
72 
RtclRw11Cpu::RtclRw11Cpu(const std::string& type)
73 
  : RtclProxyBase(type),
74 
    fGets()
75 
{
76 
  AddMeth("add",      boost::bind(&RtclRw11Cpu::M_add,     this, _1));
77 
  AddMeth("cp",       boost::bind(&RtclRw11Cpu::M_cp,      this, _1));
78 
  AddMeth("wtcpu",    boost::bind(&RtclRw11Cpu::M_wtcpu,   this, _1));
79 
  AddMeth("deposit",  boost::bind(&RtclRw11Cpu::M_deposit, this, _1));
80 
  AddMeth("examine",  boost::bind(&RtclRw11Cpu::M_examine, this, _1));
81 
  AddMeth("lsmem",    boost::bind(&RtclRw11Cpu::M_lsmem,   this, _1));
82 
  AddMeth("ldabs",    boost::bind(&RtclRw11Cpu::M_ldabs,   this, _1));
83 
  AddMeth("ldasm",    boost::bind(&RtclRw11Cpu::M_ldasm,   this, _1));
84 
  AddMeth("boot",     boost::bind(&RtclRw11Cpu::M_boot,    this, _1));
85 
  AddMeth("get",      boost::bind(&RtclRw11Cpu::M_get,     this, _1));
86 
  AddMeth("set",      boost::bind(&RtclRw11Cpu::M_set,     this, _1));
87 
  AddMeth("stats",    boost::bind(&RtclRw11Cpu::M_stats,   this, _1));
88 20 wfjm 
  AddMeth("show",     boost::bind(&RtclRw11Cpu::M_show,    this, _1));
89 19 wfjm 
  AddMeth("dump",     boost::bind(&RtclRw11Cpu::M_dump,    this, _1));
90 
  AddMeth("$default", boost::bind(&RtclRw11Cpu::M_default, this, _1));
91 
}
92 
 
93 
//------------------------------------------+-----------------------------------
94 
//! Destructor
95 
 
96 
RtclRw11Cpu::~RtclRw11Cpu()
97 
{}
98 
 
99 
//------------------------------------------+-----------------------------------
100 
//! FIXME_docs
101 
 
102 
int RtclRw11Cpu::M_add(RtclArgs& args)
103 
{
104 
  return RtclRw11CntlFactory(args, *this);
105 
}
106 
 
107 
//------------------------------------------+-----------------------------------
108 
//! FIXME_docs
109 
 
110 
int RtclRw11Cpu::M_cp(RtclArgs& args)
111 
{
112 
  static RtclNameSet optset("-rr|-rr0|-rr1|-rr2|-rr3|-rr4|-rr5|-rr6|-rr7|"
113 
                            "-wr|-wr0|-wr1|-wr2|-wr3|-wr4|-wr5|-wr6|-wr7|"
114 
                            "-rsp|-rpc|-wsp|-wpc|"
115 
                            "-rps|-wps|"
116 22 wfjm 
                            "-ral|-rah|-wal|-wah|-wa|"
117 
                            "-rm|-rmi|-wm|-wmi|-brm|-bwm|"
118 19 wfjm 
                            "-stapc|-start|-stop|-continue|-step|-reset|"
119 22 wfjm 
                            "-ribrb|-wibrb|-ribr|-wibr|"
120 19 wfjm 
                            "-rconf|-rstat|"
121 
                            "-edata|-estat|-estatdef"
122 
                            );
123 
 
124 
  Tcl_Interp* interp = args.Interp();
125 
 
126 
  RlinkCommandList clist;
127 
  string opt;
128 
  uint16_t base = Obj().Base();
129 
 
130 
  vector<string> vardata;
131 
  vector<string> varstat;
132 
 
133 
  uint8_t estatdef_val = 0x00;
134 
  uint8_t estatdef_msk = 0xff;
135 
 
136 
  bool setcpugo = false;
137 
 
138 
  while (args.NextOpt(opt, optset)) {
139 
    size_t lsize = clist.Size();
140 
 
141 
    // map register read/write
142 
    if (opt == "-rsp") opt = "-rr6";
143 
    if (opt == "-rpc") opt = "-rr7";
144 
    if (opt == "-wsp") opt = "-wr6";
145 
    if (opt == "-wpc") opt = "-wr7";
146 
 
147 
    int regnum = 0;
148 
    if (opt.substr(0,3) == "-rr" || opt.substr(0,3) == "-wr" ) {
149 
      if (opt.length() == 3) {
150 
        if (!args.GetArg("regnum", regnum, 0, 7)) return kERR;
151 
      } else {
152 
        regnum = opt[3] - '0';
153 
        regnum &= 0x7;                      // to be sure...
154 
      }
155 
      opt = opt.substr(0,3);
156 
    }
157 
 
158 
    if        (opt == "-rr") {              // -rr* ?varData ?varStat --------
159 
      if (!GetVarName(args, "??varData", lsize, vardata)) return kERR;
160 
      if (!GetVarName(args, "??varStat", lsize, varstat)) return kERR;
161 
      clist.AddRreg(base + Rw11Cpu::kCp_addr_r0 + regnum);
162 
 
163 
    } else if (opt == "-wr") {              // -wr* data ?varStat ------------
164 
      uint16_t data;
165 
      if (!args.GetArg("data", data)) return kERR;
166 
      if (!GetVarName(args, "??varStat", lsize, varstat)) return kERR;
167 
      clist.AddWreg(base + Rw11Cpu::kCp_addr_r0 + regnum, data);
168 
 
169 
    } else if (opt == "-rps") {             // -rps ?varData ?varStat --------
170 
      if (!GetVarName(args, "??varData", lsize, vardata)) return kERR;
171 
      if (!GetVarName(args, "??varStat", lsize, varstat)) return kERR;
172 
      clist.AddRreg(base + Rw11Cpu::kCp_addr_psw);
173 
 
174 
    } else if (opt == "-wps") {             // -wps data ?varStat ------------
175 
      uint16_t data;
176 
      if (!args.GetArg("data", data)) return kERR;
177 
      if (!GetVarName(args, "??varStat", lsize, varstat)) return kERR;
178 
      clist.AddWreg(base + Rw11Cpu::kCp_addr_psw, data);
179 
 
180 22 wfjm 
    } else if (opt == "-ral") {             // -ral ?varData ?varStat --------
181 
      if (!GetVarName(args, "??varData", lsize, vardata)) return kERR;
182 
      if (!GetVarName(args, "??varStat", lsize, varstat)) return kERR;
183 
      clist.AddRreg(base + Rw11Cpu::kCp_addr_al);
184 
 
185 
    } else if (opt == "-rah") {             // -rah ?varData ?varStat --------
186 
      if (!GetVarName(args, "??varData", lsize, vardata)) return kERR;
187 
      if (!GetVarName(args, "??varStat", lsize, varstat)) return kERR;
188 
      clist.AddRreg(base + Rw11Cpu::kCp_addr_ah);
189 
 
190 19 wfjm 
    } else if (opt == "-wal") {             // -wal data ?varStat ------------
191 
      uint16_t data;
192 
      if (!args.GetArg("al", data)) return kERR;
193 
      if (!GetVarName(args, "??varStat", lsize, varstat)) return kERR;
194 
      clist.AddWreg(base + Rw11Cpu::kCp_addr_al, data);
195 
 
196 
    } else if (opt == "-wah") {             // -wah data ?varStat ------------
197 
      uint16_t data;
198 
      if (!args.GetArg("ah", data)) return kERR;
199 
      if (!GetVarName(args, "??varStat", lsize, varstat)) return kERR;
200 
      clist.AddWreg(base + Rw11Cpu::kCp_addr_ah, data);
201 
 
202 22 wfjm 
    } else if (opt == "-wa") {              // -wa addr ?varStat [-p22 -ubm]--
203 
      uint32_t addr;
204 
      if (!args.GetArg("addr", addr, 017777776)) return kERR;
205 
      if (!GetVarName(args, "??varStat", lsize, varstat)) return kERR;
206 
      uint16_t al = addr;
207 
      uint16_t ah = (addr>>16);
208 
      static RtclNameSet suboptset("-p22|-ubm");
209 
      string subopt;
210 
      while (args.NextSubOpt(subopt, suboptset)>=0) { // loop for sub-options
211 
        if (!args.OptValid()) return kERR;
212 
        if (subopt == "-p22") {             // -p22
213 
          ah |= Rw11Cpu::kCp_ah_m_22bit;
214 
        } else if (subopt == "-ubm") {      // -ubm
215 
          ah |= Rw11Cpu::kCp_ah_m_ubmap;
216 
        }
217 
      }
218 
      clist.AddWreg(base + Rw11Cpu::kCp_addr_al, al);
219 
      if (ah!=0) clist.AddWreg(base + Rw11Cpu::kCp_addr_ah, ah);
220 
 
221 19 wfjm 
    } else if (opt == "-rm" ||              // -rm(i) ?varData ?varStat ------
222 
               opt == "-rmi") {
223 
      uint16_t addr = opt=="-rm" ? Rw11Cpu::kCp_addr_mem : Rw11Cpu::kCp_addr_memi;
224 
      if (!GetVarName(args, "??varData", lsize, vardata)) return kERR;
225 
      if (!GetVarName(args, "??varStat", lsize, varstat)) return kERR;
226 
      clist.AddRreg(base + addr);
227 
 
228 
    } else if (opt == "-wm" ||              // -wm(i) data ?varStat -
229 
               opt == "-wmi") {
230 
      uint16_t addr = opt=="-wm" ? Rw11Cpu::kCp_addr_mem :
231 
                                   Rw11Cpu::kCp_addr_memi;
232 
      uint16_t data;
233 
      if (!args.GetArg("data", data)) return kERR;
234 
      if (!GetVarName(args, "??varStat", lsize, varstat)) return kERR;
235 
      clist.AddWreg(base + addr, data);
236 
 
237 
    } else if (opt == "-brm") {             // -brm size ?varData ?varStat ---
238 
      int32_t bsize;
239 
      if (!args.GetArg("bsize", bsize, 1, 256)) return kERR;
240 
      if (!GetVarName(args, "??varData", lsize, vardata)) return kERR;
241 
      if (!GetVarName(args, "??varStat", lsize, varstat)) return kERR;
242 
      clist.AddRblk(base + Rw11Cpu::kCp_addr_memi, (size_t) bsize);
243 
 
244 
    } else if (opt == "-bwm") {             // -bwm block ?varStat -----------
245 
      vector<uint16_t> block;
246 
      if (!args.GetArg("data", block, 1, 256)) return kERR;
247 
      if (!GetVarName(args, "??varStat", lsize, varstat)) return kERR;
248 
      clist.AddWblk(base + Rw11Cpu::kCp_addr_memi, block);
249 
 
250 
    } else if (opt == "-stapc") {           // -stapc addr ?varStat ----------
251 
      uint16_t data;
252 
      if (!args.GetArg("data", data)) return kERR;
253 
      if (!GetVarName(args, "??varStat", lsize+1, varstat)) return kERR;
254 
      clist.AddWreg(base + Rw11Cpu::kCp_addr_pc, data);
255 
      clist.AddWreg(base + Rw11Cpu::kCp_addr_cntl, Rw11Cpu::kCp_func_start);
256 
      setcpugo = true;
257 
 
258 
    } else if (opt == "-start") {           // -start ?varStat ---------------
259 
      if (!GetVarName(args, "??varStat", lsize, varstat)) return kERR;
260 
      clist.AddWreg(base + Rw11Cpu::kCp_addr_cntl, Rw11Cpu::kCp_func_start);
261 
      setcpugo = true;
262 
 
263 
    } else if (opt == "-stop") {            // -stop ?varStat ----------------
264 
      if (!GetVarName(args, "??varStat", lsize, varstat)) return kERR;
265 
      clist.AddWreg(base + Rw11Cpu::kCp_addr_cntl, Rw11Cpu::kCp_func_stop);
266 
 
267 
    } else if (opt == "-continue") {        // -continue ?varStat ------------
268 
      if (!GetVarName(args, "??varStat", lsize, varstat)) return kERR;
269 
      clist.AddWreg(base + Rw11Cpu::kCp_addr_cntl, Rw11Cpu::kCp_func_cont);
270 
      setcpugo = true;
271 
 
272 
    } else if (opt == "-step") {            // -step ?varStat ----------------
273 
      if (!GetVarName(args, "??varStat", lsize, varstat)) return kERR;
274 
      clist.AddWreg(base + Rw11Cpu::kCp_addr_cntl, Rw11Cpu::kCp_func_step);
275 
 
276 
    } else if (opt == "-reset") {           // -reset ?varStat ---------------
277 
      if (!GetVarName(args, "??varStat", lsize, varstat)) return kERR;
278 
      clist.AddWreg(base + Rw11Cpu::kCp_addr_cntl, Rw11Cpu::kCp_func_reset);
279 
 
280 
    } else if (opt == "-ribrb") {           // -ribrb ?varData ?varStat ------
281 
      if (!GetVarName(args, "??varData", lsize, vardata)) return kERR;
282 
      if (!GetVarName(args, "??varStat", lsize, varstat)) return kERR;
283 
      clist.AddRreg(base + Rw11Cpu::kCp_addr_ibrb);
284 
 
285 22 wfjm 
    } else if (opt == "-wibrb") {           // -wibrb base ?varStat [-be be] -
286 19 wfjm 
      uint16_t data;
287 
      if (!args.GetArg("base", data)) return kERR;
288 
      if (!GetVarName(args, "??varStat", lsize, varstat)) return kERR;
289 
 
290 22 wfjm 
      data &= 0177700;                      // clear byte enables
291 
      static RtclNameSet suboptset("-be");
292 
      string subopt;
293 
      while (args.NextSubOpt(subopt, suboptset)>=0) { // loop for sub-options
294 
        if (!args.OptValid()) return kERR;
295 
        if (subopt == "-be") {                // -be be
296 
          uint16_t be;
297 
          if (!args.GetArg("be", be, 0x3)) return kERR;
298 
          if (be == 0) be = 0x3;                  // map be 0 -> be 3
299 
          data |= be;                             // set byte enables
300 
        }
301 
      }
302 19 wfjm 
      clist.AddWreg(base + Rw11Cpu::kCp_addr_ibrb, data);
303 
 
304 
    } else if (opt == "-ribr") {           // -ribr off ?varData ?varStat ----
305 
      uint16_t off;
306 
      if (!args.GetArg("off",  off, 63)) return kERR;
307 
      if (!GetVarName(args, "??varData", lsize, vardata)) return kERR;
308 
      if (!GetVarName(args, "??varStat", lsize, varstat)) return kERR;
309 
      clist.AddRreg(base + Rw11Cpu::kCp_addr_ibr + off/2);
310 
 
311 22 wfjm 
    } else if (opt == "-wibr") {           // -wibr off data ?varStat --------
312 19 wfjm 
      uint16_t off;
313 
      uint16_t data;
314 
      if (!args.GetArg("off",  off, 63)) return kERR;
315 
      if (!args.GetArg("data", data)) return kERR;
316 
      if (!GetVarName(args, "??varStat", lsize, varstat)) return kERR;
317 
      clist.AddWreg(base + Rw11Cpu::kCp_addr_ibr + off/2, data);
318 
 
319 
    } else if (opt == "-rconf") {           // -rconf ?varData ?varStat ------
320 
      if (!GetVarName(args, "??varData", lsize, vardata)) return kERR;
321 
      if (!GetVarName(args, "??varStat", lsize, varstat)) return kERR;
322 
      clist.AddRreg(base + Rw11Cpu::kCp_addr_conf);
323 
 
324 
    } else if (opt == "-rstat") {           // -rstat ?varData ?varStat ------
325 
      if (!GetVarName(args, "??varData", lsize, vardata)) return kERR;
326 
      if (!GetVarName(args, "??varStat", lsize, varstat)) return kERR;
327 
      clist.AddRreg(base + Rw11Cpu::kCp_addr_stat);
328 
 
329 
    } else if (opt == "-edata") {           // -edata data ?mask --------------
330 
      if (lsize == 0)
331 
        return args.Quit("-E: -edata not allowed on empty command list");
332 
      if (clist[lsize-1].Expect()==0) {
333 
        clist.LastExpect(new RlinkCommandExpect());
334 
      }
335 
      if (clist[lsize-1].Command() == RlinkCommand::kCmdRblk) {
336 
        vector<uint16_t> data;
337 
        vector<uint16_t> mask;
338 
        size_t bsize = clist[lsize-1].BlockSize();
339 
        if (!args.GetArg("data", data, 0, bsize)) return kERR;
340 
        if (!args.GetArg("??mask", mask, 0, bsize)) return kERR;
341 
        clist[lsize-1].Expect()->SetBlock(data, mask);
342 
      } else {
343 
        uint16_t data=0;
344 
        uint16_t mask=0;
345 
        if (!args.GetArg("data", data)) return kERR;
346 
        if (!args.GetArg("??mask", mask)) return kERR;
347 
        clist[lsize-1].Expect()->SetData(data, mask);
348 
      }
349 
 
350 
    } else if (opt == "-estat") {           // -estat ?stat ?mask -------------
351 
      if (lsize == 0)
352 
        return args.Quit("-E: -estat not allowed on empty command list");
353 
      uint8_t stat=0;
354 
      uint8_t mask=0;
355 
      if (!args.GetArg("??stat", stat)) return kERR;
356 
      if (!args.GetArg("??mask", mask)) return kERR;
357 
      if (args.NOptMiss() == 2)  mask = 0xff;
358 
      if (clist[lsize-1].Expect()==0) {
359 
        clist.LastExpect(new RlinkCommandExpect());
360 
      }
361 
      clist[lsize-1].Expect()->SetStatus(stat, mask);
362 
 
363 
    } else if (opt == "-estatdef") {        // -estatdef ?stat ?mask -----------
364 
      uint8_t stat=0;
365 
      uint8_t mask=0;
366 
      if (!args.GetArg("??stat", stat)) return kERR;
367 
      if (!args.GetArg("??mask", mask)) return kERR;
368 
      if (args.NOptMiss() == 2)  mask = 0xff;
369 
      estatdef_val = stat;
370 
      estatdef_msk = mask;
371 
 
372 
    }
373 
 
374 
    if (lsize != clist.Size()) {            // cmd added to clist (ind=lsize!)
375 
      if (estatdef_msk != 0xff) {           // estatdef defined
376 
        if (clist[lsize].Expect()==0) {
377 
          clist.LastExpect(new RlinkCommandExpect());
378 
        }
379 
        clist[lsize].Expect()->SetStatus(estatdef_val, estatdef_msk);
380 
      }
381 
    }
382 
 
383 
  }
384 
 
385 
  if (!args.AllDone()) return kERR;
386 
  if (clist.Size() == 0) return kOK;
387 
 
388 
  // signal cpugo up before clist executed to prevent races
389 
  if (setcpugo) Obj().SetCpuGoUp();
390 
 
391 
  RerrMsg emsg;
392 
  // this one intentionally on Connect() to allow mixing of rlc + w11 commands
393 
  // FIXME_code: is this a good idea ??
394 
  if (!Connect().Exec(clist, emsg)) return args.Quit(emsg);
395 
 
396 
  for (size_t icmd=0; icmd<clist.Size(); icmd++) {
397 
    RlinkCommand& cmd = clist[icmd];
398 
 
399 
    if (icmd<vardata.size() && !vardata[icmd].empty()) {
400 
      RtclOPtr pres;
401 
      vector<uint16_t> retstat;
402 
      RtclOPtr pele;
403 
      switch (cmd.Command()) {
404 
        case RlinkCommand::kCmdRreg:
405 
          pres = Tcl_NewIntObj((int)cmd.Data());
406 
          break;
407 
 
408 
        case RlinkCommand::kCmdRblk:
409 
          pres = Rtcl::NewListIntObj(cmd.Block());
410 
          break;
411 
      }
412 
      if(!Rtcl::SetVar(interp, vardata[icmd], pres)) return kERR;
413 
    }
414 
 
415 
    if (icmd<varstat.size() && !varstat[icmd].empty()) {
416 22 wfjm 
      RtclOPtr pres(Tcl_NewIntObj((int)cmd.Status()));
417 19 wfjm 
      if (!Rtcl::SetVar(interp, varstat[icmd], pres)) return kERR;
418 
    }
419 
  }
420 
 
421 
  return kOK;
422 
}
423 
 
424 
//------------------------------------------+-----------------------------------
425 
//! FIXME_docs
426 
 
427 
int RtclRw11Cpu::M_wtcpu(RtclArgs& args)
428 
{
429 
  static RtclNameSet optset("-reset");
430 
 
431 
  string opt;
432 
  bool reset = false;
433 
  double tout;
434 
 
435 
  while (args.NextOpt(opt, optset)) {
436 
    if (opt == "-reset") reset = true;
437 
  }
438 
  if (!args.GetArg("tout", tout, 0.001)) return kERR;
439 
  if (!args.AllDone()) return kERR;
440 
 
441 
  double twait = -1;
442 
 
443 
  if (!Server().IsActive()) {               // server is not active
444 
    RerrMsg emsg;
445 
    twait = Connect().WaitAttn(tout, emsg);
446 
    if (twait == -2.) {                     // wait failed, quit
447 
      return args.Quit(emsg);
448 
    }
449 
    if (twait >= 0.) {                      // wait succeeded
450 
      RlinkCommandList clist;                 // get and discard attn pattern
451 
      clist.AddAttn();
452 
      if (!Connect().Exec(clist, emsg)) return args.Quit(emsg);
453 
    }
454 
 
455 
  } else {                                  // server is active
456 
    twait = Obj().WaitCpuGoDown(tout);
457 
  }
458 
 
459 
  if (twait < 0.) {                         // timeout
460 
    if (Connect().GetLogOpts().printlevel >= 1) {
461 
      RlogMsg lmsg(Connect().LogFile());
462 
      lmsg << "-- wtcpu to=" << RosPrintf(tout, "f", 0,3) << " FAIL timeout";
463 
    }
464 
    Connect().Context().IncErrorCount();
465 
    if (reset) {                            // reset requested
466 
      uint16_t base = Obj().Base();
467 
      RlinkCommandList clist;
468 
      clist.AddWreg(base + Rw11Cpu::kCp_addr_cntl, Rw11Cpu::kCp_func_stop);
469 
      RerrMsg emsg;
470 
      if (!Connect().Exec(clist, emsg)) return args.Quit(emsg);
471 
    }
472 
  } else {                                  // no timeout
473 
    if (Connect().GetLogOpts().printlevel >= 3) {
474 
      RlogMsg lmsg(Connect().LogFile());
475 
      lmsg << "-- wtcpu to=" << RosPrintf(tout, "f", 0,3)
476 
           << "  T=" << RosPrintf(twait, "f", 0,3)
477 
           << "  OK";
478 
    }
479 
  }
480 
 
481 
  args.SetResult(twait);
482 
  return kOK;
483 
}
484 
 
485 
//------------------------------------------+-----------------------------------
486 
//! FIXME_docs
487 
 
488 
int RtclRw11Cpu::M_deposit(RtclArgs& args)
489 
{
490 
  uint16_t  addr;
491 
  vector<uint16_t> data;
492 
  if (!args.GetArg("addr", addr)) return kERR;
493 
  if (!args.GetArg("data", data, 1)) return kERR;
494 
  if (!args.AllDone()) return kERR;
495 
 
496 
  RerrMsg emsg;
497 
  // FIXME_code: handle memory read/write error
498 
  if (!Obj().MemWrite(addr, data, emsg)) return args.Quit(emsg);
499 
 
500 
  return kOK;
501 
}
502 
 
503 
//------------------------------------------+-----------------------------------
504 
//! FIXME_docs
505 
 
506 
int RtclRw11Cpu::M_examine(RtclArgs& args)
507 
{
508 
  uint16_t  addr;
509 
  if (!args.GetArg("addr", addr)) return kERR;
510 
  if (!args.AllDone()) return kERR;
511 
 
512 
  RerrMsg emsg;
513 
  vector<uint16_t> data;
514 
  // FIXME_code: handle memory read/write error
515 
  if (!Obj().MemRead(addr, data, 1, emsg)) return args.Quit(emsg);
516 
 
517 
  args.SetResult(Rtcl::NewListIntObj(data));
518 
 
519 
  return kOK;
520 
}
521 
 
522 
//------------------------------------------+-----------------------------------
523 
//! FIXME_docs
524 
 
525 
int RtclRw11Cpu::M_lsmem(RtclArgs& args)
526 
{
527 
  uint16_t  abeg;
528 
  if (!args.GetArg("abeg", abeg)) return kERR;
529 
  uint16_t  aend = abeg;
530 
  if (!args.GetArg("?aend", aend, 0xffff, abeg)) return kERR;
531 
  if (!args.AllDone()) return kERR;
532 
 
533 
  RerrMsg emsg;
534 
  vector<uint16_t> data;
535 
  size_t nword = 1+(aend-abeg)/2;
536 
  // FIXME_code: handle memory read/write error
537 
  if (!Obj().MemRead(abeg, data, nword, emsg)) return args.Quit(emsg);
538 
 
539 
  ostringstream sos;
540 
  for (size_t i=0; i<nword; i++) {
541 
    sos << RosPrintBvi(uint16_t(abeg+i*2), 8)
542 
        << " : " <<  RosPrintBvi(data[i], 8) << endl;
543 
  }
544 
 
545 
  args.SetResult(sos);
546 
 
547 
  return kOK;
548 
}
549 
 
550 
//------------------------------------------+-----------------------------------
551 
//! FIXME_docs
552 
 
553 
int RtclRw11Cpu::M_ldabs(RtclArgs& args)
554 
{
555 
  string file;
556 
  if (!args.GetArg("file", file)) return kERR;
557 
  if (!args.AllDone()) return kERR;
558 
  RerrMsg emsg;
559 
  // FIXME_code: handle memory read/write error
560 
  if (!Obj().LoadAbs(file, emsg, true)) return args.Quit(emsg);
561 
  return kOK;
562 
}
563 
 
564 
//------------------------------------------+-----------------------------------
565 
//! FIXME_docs
566 
 
567 
int RtclRw11Cpu::M_ldasm(RtclArgs& args)
568 
{
569 
  static RtclNameSet optset("-lst|-sym|-opt|-file");
570 
  Tcl_Interp* interp = args.Interp();
571 
 
572 
  string varlst;
573 
  string varsym;
574 
  string asmopt;
575 
  string file;
576 
  string code;
577 
 
578 
  string opt;
579 
  while (args.NextOpt(opt, optset)) {
580 
    if (opt == "-lst") {
581 
      if (!args.GetArg("??varLst", varlst)) return kERR;
582 
    } else if (opt == "-sym") {
583 
      if (!args.GetArg("??varSym", varsym)) return kERR;
584 
    } else if (opt == "-opt") {
585 
      // don't use ?? because the argument will look like an option...
586 
      if (!args.GetArg("opts", asmopt)) return kERR;
587 
    } else if (opt == "-file") {
588 
      if (!args.GetArg("??file", file)) return kERR;
589 
    }
590 
  }
591 
 
592 
  if (file.length() == 0) {
593 
    if (!args.GetArg("code", code)) return kERR;
594 
  }
595 
  if (!args.AllDone()) return kERR;
596 
 
597 
  // delete sym array, otherwise old entries are preserved
598 
  if (varsym.length())
599 
    Tcl_UnsetVar(interp, varsym.c_str(), 0);
600 
 
601 
  int pipe_tcl2asm[2];                      // [0] read, [1] write end
602 
  int pipe_asm2tcl[2];
603 
 
604 
  if (::pipe(pipe_tcl2asm) < 0)
605 
    return args.Quit(RerrMsg("RtclRw11Cpu::M_ldasm" ,
606 
                             "1st pipe() failed: ", errno));
607 
  if (::pipe(pipe_asm2tcl) < 0)
608 
    return args.Quit(RerrMsg("RtclRw11Cpu::M_ldasm" ,
609 
                             "2nd pipe() failed: ", errno));
610 
 
611 
  pid_t pid = ::fork();
612 
  if (pid == (pid_t) 0) {                   // in child here
613 
    vector<const char*> argv;
614 
    vector<string>      opts;
615 
 
616 
    argv.push_back("asm-11");
617 
    if (varlst.length()>0) argv.push_back("--olst=-");
618 
    argv.push_back("--ocof=-");
619 
    if (asmopt.length()) {
620 
      istringstream optstream(asmopt);
621 
      string tok;
622 
      while (optstream >> tok) {
623 
        opts.push_back(tok);
624 
        argv.push_back(opts[opts.size()-1].c_str());
625 
      }
626 
    }
627 
    if (file.length()) {
628 
      argv.push_back(file.c_str());
629 
    } else {
630 
      argv.push_back("-");
631 
    }
632 
    argv.push_back(NULL);
633 
 
634 
    ::dup2(pipe_tcl2asm[0], STDIN_FILENO);
635 
    ::dup2(pipe_asm2tcl[1], STDOUT_FILENO);
636 
    ::dup2(STDOUT_FILENO, STDERR_FILENO);
637 
    ::close(pipe_tcl2asm[1]);
638 
    ::close(pipe_asm2tcl[0]);
639 
    ::execvp("asm-11", (char* const*) argv.data());
640 
    ::perror("execvp() for asm-11 failed");
641 
    ::exit(EXIT_FAILURE);
642 
 
643 
  } else {                                  // in parent here
644 
    ::close(pipe_tcl2asm[0]);
645 
    ::close(pipe_asm2tcl[1]);
646 
    if (pid < (pid_t) 0)
647 
      return args.Quit(RerrMsg("RtclRw11Cpu::M_ldasm" ,
648 
                               "fork() failed: ", errno));
649 
  }
650 
 
651 
  // if first line empty, drop it (created often by using {)
652 
  if (code.length() && code[0] == '\n') code = code.substr(1);
653 
 
654 
  istringstream ostream(code);
655 
  string oline;
656 
  while (std::getline(ostream, oline)) {
657 
    oline += '\n';
658 
    //cout << "+++1:" << oline;
659 
    if (::write(pipe_tcl2asm[1], oline.data(), oline.length()) < 0) break;
660 
  }
661 
  ::close(pipe_tcl2asm[1]);
662 
 
663 
  FILE* fp = ::fdopen(pipe_asm2tcl[0], "r");
664 
  if (fp == NULL) {
665 
    ::close(pipe_asm2tcl[0]);
666 
    return args.Quit(RerrMsg("RtclRw11Cpu::M_ldasm" ,
667 
                             "fdopen() failed: ", errno));
668 
  }
669 
 
670 
  vector<string> ilines;
671 
  while(true) {
672 
    char* pline = NULL;
673 
    size_t nchar;
674 
    if (::getline(&pline, &nchar, fp) < 0) break;
675 
    //cout << "+++2:" << pline;
676 
    string line(pline);
677 
    if (line.length() && line[line.length()-1] =='\n')
678 
      line.resize(line.length()-1);
679 
    ilines.push_back(line);
680 
    ::free(pline);
681 
  }
682 
  ::fclose(fp);
683 
  ::close(pipe_asm2tcl[0]);
684 
 
685 
  int wstat;
686 
  int wexit = -1;
687 
  waitpid(pid, &wstat, 0);
688 
  if (WIFEXITED(wstat)) wexit = WEXITSTATUS(wstat);
689 
 
690 
  bool insym = false;
691 
  bool indat = false;
692 
  char dtyp = ' ';
693 
 
694 
  ostringstream los;                        // list stream
695 
  ostringstream eos;                        // error stream
696 
  bool lstbodyseen = false;
697 
 
698 
  typedef map<uint16_t, uint16_t>  cmap_t;
699 
  typedef cmap_t::iterator         cmap_it_t;
700 
  typedef cmap_t::value_type       cmap_val_t;
701 
 
702 
  cmap_t   cmap;
703 
  uint16_t dot = 0;
704 
 
705 
  for (size_t i=0; i<ilines.size(); i++) {
706 
    string& line = ilines[i];
707 
    if (line == "sym {") {
708 
      insym = true;
709 
      continue;
710 
    } else if (line == "dat {") {
711 
      indat = true;
712 
      continue;
713 
    } else if (dtyp == ' ' && line == "}") {
714 
      insym = false;
715 
      indat = false;
716 
      continue;
717 
    }
718 
 
719 
    // handle symbol table
720 
    if (insym) {
721 
      if (varsym.length() == 0) continue;
722 
      size_t dpos = line.find(" => ");
723 
      if (dpos != std::string::npos) {
724 
        string key = line.substr(0,dpos);
725 
        string val= line.substr(dpos+4);
726 
        if (!Tcl_SetVar2Ex(interp, varsym.c_str(), key.c_str(),
727 22 wfjm 
                           Tcl_NewIntObj((int)::strtol(val.c_str(),NULL,8)),
728 19 wfjm 
                           TCL_LEAVE_ERR_MSG)) return kERR;
729 
      } else {
730 
        return args.Quit(string("bad sym spec: ") + line);
731 
      }
732 
 
733 
    // handle data part
734 
    } else if (indat) {
735 
      if (dtyp == ' ') {
736 
        if (line.length() != 10)
737 
          return args.Quit(string("bad dat spec: ") + line);
738 
        dtyp = line[0];
739 22 wfjm 
        dot  = (uint16_t)::strtol(line.c_str()+2,NULL,8);
740 19 wfjm 
      } else if (line[0] == '}') {
741 
        dtyp = ' ';
742 
      } else {
743 
        istringstream datstream(line);
744 
        string dat;
745 
        while (datstream >> dat) {
746 
          //cout << "+++1 " << dtyp << ":" << dat << endl;
747 22 wfjm 
          uint16_t val = (uint16_t)::strtol(dat.c_str(),NULL,8);
748 19 wfjm 
          if (dtyp == 'w') {
749 
            cmap[dot] = val;
750 
            dot += 2;
751 
          } else {
752 
            uint16_t tmp = cmap[dot&0xfffe];
753 
            if (dot & 01) {
754 
              tmp = (val&0xff)<<8 | (tmp&0xff); // odd (high) byte
755 
            } else {
756 
              tmp = (tmp&0xff00)  | (val&0xff); // even (low) byte
757 
            }
758 
            cmap[dot&0xfffe] = tmp;
759 
            dot += 1;
760 
          }
761 
        }
762 
      }
763 
 
764 
    // handle listing part (everything not sym{} or dat{}
765 
    } else {
766 
      los << line << endl;
767 
      // put lines into error stream if
768 
      //  1. before 'Input file list:' and not starting with '--'
769 
      //  2. after  'Input file list:' and starting with uppercase letter
770 
      if (line == "; Input file list:") lstbodyseen = true;
771 
      bool etake = false;
772 
      if (lstbodyseen) {
773 
        if (line.length() && (line[0]>'A' && line[0]<'Z')) etake = true;
774 
      } else {
775 
        if (line.substr(0,2) != "--") etake = true;
776 
      }
777 
      if (line.substr(0,6) == "asm-11") etake = true;
778 
      if (etake) eos << line << endl;
779 
    }
780 
  }
781 
 
782 
  if (varlst.length()) {
783 
    if (!Rtcl::SetVar(interp, varlst, Rtcl::NewLinesObj(los))) return kERR;
784 
  }
785 
 
786 
  // now, finally, iterate of cmap and write code to memory
787 
 
788 
  vector<uint16_t> block;
789 
  uint16_t base = 0;
790 
  dot = 0;
791 
  RerrMsg emsg;
792 
 
793 
  for (cmap_it_t it=cmap.begin(); it!=cmap.end(); it++) {
794 
    //cout << "+++2 mem[" << RosPrintf(it->first, "o0", 6)
795 
    //     << "]=" << RosPrintf(it->second, "o0", 6) << endl;
796 
    if (dot != it->first || block.size() == 256) {
797 
      if (block.size()) {
798 
        if (!Obj().MemWrite(base, block, emsg)) return args.Quit(emsg);
799 
        block.clear();
800 
      }
801 
      base = dot = it->first;
802 
    }
803 
    block.push_back(it->second);
804 
    dot += 2;
805 
  }
806 
 
807 
  if (block.size()) {
808 
    if (!Obj().MemWrite(base, block, emsg)) return args.Quit(emsg);
809 
    block.clear();
810 
  }
811 
 
812 
  if (wexit != 0) {
813 
    args.AppendResultLines("asm-11 compilation failed with:");
814 
    args.AppendResultLines(eos);
815 
    return kERR;
816 
  }
817 
 
818 
  return kOK;
819 
}
820 
 
821 
//------------------------------------------+-----------------------------------
822 
//! FIXME_docs
823 
 
824 
int RtclRw11Cpu::M_boot(RtclArgs& args)
825 
{
826 
  string uname;
827 
  if (!args.GetArg("uname", uname)) return kERR;
828 
  if (!args.AllDone()) return kERR;
829 
  RerrMsg emsg;
830 
  if (!Obj().Boot(uname, emsg)) return args.Quit(emsg);
831 
  return kOK;
832 
}
833 
 
834 
//------------------------------------------+-----------------------------------
835 
//! FIXME_docs
836 
 
837 
int RtclRw11Cpu::M_get(RtclArgs& args)
838 
{
839 
  // synchronize with server thread
840 
  boost::lock_guard<RlinkConnect> lock(Obj().Connect());
841 
  return fGets.M_get(args);
842 
}
843 
 
844 
//------------------------------------------+-----------------------------------
845 
//! FIXME_docs
846 
 
847 
int RtclRw11Cpu::M_set(RtclArgs& args)
848 
{
849 
  // synchronize with server thread
850 
  boost::lock_guard<RlinkConnect> lock(Obj().Connect());
851 
  return fSets.M_set(args);
852 
}
853 
 
854 
//------------------------------------------+-----------------------------------
855 
//! FIXME_docs
856 
 
857 20 wfjm 
int RtclRw11Cpu::M_show(RtclArgs& args)
858 
{
859 21 wfjm 
  static RtclNameSet optset("-pcps|-r0ps|-mmu|-ubmap"
860 20 wfjm 
                            );
861 
 
862 
  string opt;
863 
  uint16_t base = Obj().Base();
864 
  ostringstream sos;
865 
  RerrMsg emsg;
866 
 
867 
  const char* mode[4]  = {"k","s","?","u"};
868 
  const char* rust[16] = {"init",     "HALTed",   "reset",   "stopped",
869 
                          "stepped",  "suspend",  "0110",    "..run..",
870 
                          "F:vecfet", "F:redstk", "1010",    "1011",
871 
                          "F:seq",    "F:vmbox" , "1101",    "1111"};
872 
 
873 
  while (args.NextOpt(opt, optset)) {
874 21 wfjm 
    if (opt == "-pcps" || opt == "-r0ps") {
875 20 wfjm 
      RlinkCommandList clist;
876 
      size_t i_pc   = clist.AddRreg(base + Rw11Cpu::kCp_addr_pc);
877 
      size_t i_psw  = clist.AddRreg(base + Rw11Cpu::kCp_addr_psw);
878 
      size_t i_stat = clist.AddRreg(base + Rw11Cpu::kCp_addr_stat);
879 
      if (!Server().Exec(clist, emsg)) return args.Quit(emsg);
880 
      uint16_t psw  = clist[i_psw].Data();
881 
      uint16_t stat = clist[i_stat].Data();
882 
      uint16_t psw_cm    = (psw>>14) & 003;
883 
      uint16_t psw_pm    = (psw>>12) & 003;
884 
      uint16_t psw_set   = (psw>>11) & 001;
885 
      uint16_t psw_pri   = (psw>>5)  & 007;
886 
      uint16_t psw_tbit  = (psw>>4)  & 001;
887 
      uint16_t psw_nzvc  = (psw)     & 017;
888 
      uint16_t stat_rust = (stat>>4) & 017;
889 21 wfjm 
      uint16_t regs[8];
890 
      regs[7] = clist[i_pc].Data();
891 
      bool r0ps = opt == "-r0ps";
892 
 
893 
      if (r0ps) {
894 
        clist.Clear();
895 
        for (size_t i=0; i<7; i++) clist.AddRreg(base + Rw11Cpu::kCp_addr_r0+i);
896 
        if (!Server().Exec(clist, emsg)) return args.Quit(emsg);
897 
        for (size_t i=0; i<7; i++) regs[i] = clist[i].Data();
898 
      }
899 
 
900 
      if (r0ps)  sos << "Processor registers and status:" << endl;
901 
      if (!r0ps) sos << "  PC: " << RosPrintBvi(regs[7],8);
902 
      sos << "  PS: " << RosPrintBvi(psw,8)
903 20 wfjm 
          << " cm,pm=" << mode[psw_cm] << "," << mode[psw_pm]
904 
          << " s,p,t=" << psw_set << "," << psw_pri << "," << psw_tbit
905 
          << " NZVC=" << RosPrintBvi(psw_nzvc,2,4)
906 21 wfjm 
          << "  rust: " << RosPrintBvi(stat_rust,8,4) << " " << rust[stat_rust]
907 20 wfjm 
          << endl;
908 
 
909 21 wfjm 
      if (r0ps) {
910 
        sos << "  R0: " << RosPrintBvi(regs[0],8)
911 
            << "  R1: " << RosPrintBvi(regs[1],8)
912 
            << "  R2: " << RosPrintBvi(regs[2],8)
913 
            << "  R3: " << RosPrintBvi(regs[3],8) << endl;
914 
        sos << "  R4: " << RosPrintBvi(regs[4],8)
915 
            << "  R5: " << RosPrintBvi(regs[5],8)
916 
            << "  SP: " << RosPrintBvi(regs[6],8)
917 
            << "  PC: " << RosPrintBvi(regs[7],8) << endl;
918 
      }
919 
 
920 20 wfjm 
    } else if (opt == "-r0r5") {
921 
      RlinkCommandList clist;
922 
      for (size_t i=0; i<6; i++) clist.AddRreg(base + Rw11Cpu::kCp_addr_r0+i);
923 
      if (!Server().Exec(clist, emsg)) return args.Quit(emsg);
924 
      sos << "R0-R5:";
925 
      for (size_t i=0; i<6; i++) sos << "  " << RosPrintBvi(clist[i].Data(),8);
926 
      sos << endl;
927 
 
928 
    } else if (opt == "-mmu") {
929 
      uint16_t mmr[4];
930 
      uint16_t asr[3][32];
931 
      const char* pmode[3] = {"km","sm","um"};
932 
      const char* acf[8] = {"nres ",
933 
                            "r -r ",
934 
                            "r    ",
935 
                            "011  ",
936 
                            "rw-rw",
937 
                            "rw- w",
938 
                            "rw   ",
939 
                            "111  "};
940 
      {
941 
        boost::lock_guard<RlinkConnect> lock(Connect());
942 
        RlinkCommandList clist;
943 
        clist.AddWreg(base + Rw11Cpu::kCp_addr_al, 0177572);
944 
        clist.AddRblk(base + Rw11Cpu::kCp_addr_memi, mmr, 3);
945 
        clist.AddWreg(base + Rw11Cpu::kCp_addr_al, 0172516);
946 
        clist.AddRblk(base + Rw11Cpu::kCp_addr_memi, mmr+3, 1);
947 
        if (!Server().Exec(clist, emsg)) return args.Quit(emsg);
948 
        clist.Clear();
949 
        clist.AddWreg(base + Rw11Cpu::kCp_addr_al, 0172300);
950 
        clist.AddRblk(base + Rw11Cpu::kCp_addr_memi, asr[0], 32);
951 
        clist.AddWreg(base + Rw11Cpu::kCp_addr_al, 0172200);
952 
        clist.AddRblk(base + Rw11Cpu::kCp_addr_memi, asr[1], 32);
953 
        clist.AddWreg(base + Rw11Cpu::kCp_addr_al, 0177600);
954 
        clist.AddRblk(base + Rw11Cpu::kCp_addr_memi, asr[2], 32);
955 
        if (!Server().Exec(clist, emsg)) return args.Quit(emsg);
956 
      }
957 
      uint16_t mmr1_0_reg = (mmr[1]    ) & 07;
958 
       int16_t mmr1_0_val = (mmr[1]>> 3) & 37;
959 
      uint16_t mmr1_1_reg = (mmr[1]>> 8) & 07;
960 
       int16_t mmr1_1_val = (mmr[1]>>11) & 37;
961 
      uint16_t mmr3_ubmap = (mmr[3]>> 5) & 01;
962 
      uint16_t mmr3_22bit = (mmr[3]>> 4) & 01;
963 
      uint16_t mmr3_d_km  = (mmr[3]>> 2) & 01;
964 
      uint16_t mmr3_d_sm  = (mmr[3]>> 1) & 01;
965 
      uint16_t mmr3_d_um  = (mmr[3]    ) & 01;
966 
      sos << "mmu:" << endl;
967 
      sos << "mmr0=" << RosPrintBvi(mmr[0],8) << endl;
968 
      if (mmr1_0_val & 020) mmr1_0_val |= 0177740;
969 
      if (mmr1_1_val & 020) mmr1_1_val |= 0177740;
970 
      sos << "mmr1=" << RosPrintBvi(mmr[1],8);
971 
      if (mmr1_0_val) sos << "  r" << mmr1_0_reg
972 
                          << ":" << RosPrintf(mmr1_0_val,"d",3);
973 
      if (mmr1_1_val) sos << "  r" << mmr1_1_reg
974 
                          << ":" << RosPrintf(mmr1_1_val,"d",3);
975 
      sos << endl;
976 
      sos << "mmr2=" << RosPrintBvi(mmr[2],8) << endl;
977 
      sos << "mmr3=" << RosPrintBvi(mmr[3],8)
978 
          << "  ubmap=" << mmr3_ubmap
979 
          << "  22bit=" << mmr3_22bit
980 
          << "  d-space k,s,u=" << mmr3_d_km
981 
          << "," << mmr3_d_sm << "," << mmr3_d_um << endl;
982 
      for (size_t m=0; m<3; m++) {
983 
        sos << pmode[m] << "   "
984 
            << " I pdr slf aw d acf     I par"
985 
            << "    "
986 
            << " D pdr slf aw d acf     D par" << endl;
987 
        for (size_t i=0; i<=7; i++) {
988 
          sos << "   " << i << " ";
989 
          for (size_t s=0; s<=1; s++) {
990 
            if (s!=0) sos << "    ";
991 
            uint16_t pdr = asr[m][i   +8*s];
992 
            uint16_t par = asr[m][i+16+8*s];
993 
            uint16_t pdr_slf = (pdr>>8) & 0177;
994 
            uint16_t pdr_a   = (pdr>>7) & 01;
995 
            uint16_t pdr_w   = (pdr>>6) & 01;
996 
            uint16_t pdr_e   = (pdr>>3) & 01;
997 
            uint16_t pdr_acf = (pdr)    & 07;
998 
            sos<< RosPrintBvi(pdr,8)
999 
               << " " << RosPrintf(pdr_slf,"d",3)
1000 
               << " " << pdr_a << pdr_w
1001 
               << " " << (pdr_e ? "d" : "u")
1002 
               << " " << acf[pdr_acf]
1003 
               << "  " << RosPrintBvi(par,8);
1004 
          }
1005 
          sos << endl;
1006 
        }
1007 
      }
1008 
 
1009 
    } else if (opt == "-ubmap") {
1010 
      uint16_t ubmap[64];
1011 
      RlinkCommandList clist;
1012 
      clist.AddWreg(base + Rw11Cpu::kCp_addr_al, 0170200);
1013 
      clist.AddRblk(base + Rw11Cpu::kCp_addr_memi, ubmap, 64);
1014 
      if (!Server().Exec(clist, emsg)) return args.Quit(emsg);
1015 
      sos << "unibus map:" << endl;
1016 
      for (size_t i = 0; i<=7; i++) {
1017 
        for (size_t j = 0; j <= 030; j+=010) {
1018 
          size_t k = 2*(i+j);
1019 
          uint32_t data = uint32_t(ubmap[k]) | (uint32_t(ubmap[k+1]))<<16;
1020 
          if (j!=0) sos << "  ";
1021 21 wfjm 
          sos << RosPrintBvi(uint32_t(j+i),8,5) << " "
1022 20 wfjm 
              << RosPrintBvi(data,8,22);
1023 
        }
1024 
        sos << endl;
1025 
      }
1026 
    }
1027 
  }
1028 
 
1029 
  if (!args.AllDone()) return kERR;
1030 
  args.SetResult(sos);
1031 
 
1032 
  return kOK;
1033 
}
1034 
 
1035 
//------------------------------------------+-----------------------------------
1036 
//! FIXME_docs
1037 
 
1038 19 wfjm 
int RtclRw11Cpu::M_stats(RtclArgs& args)
1039 
{
1040 
  RtclStats::Context cntx;
1041 
  if (!RtclStats::GetArgs(args, cntx)) return kERR;
1042 
  if (!RtclStats::Collect(args, cntx, Obj().Stats())) return kERR;
1043 
  return kOK;
1044 
}
1045 
 
1046 
//------------------------------------------+-----------------------------------
1047 
//! FIXME_docs
1048 
 
1049 
int RtclRw11Cpu::M_dump(RtclArgs& args)
1050 
{
1051 
  if (!args.AllDone()) return kERR;
1052 
 
1053 
  ostringstream sos;
1054 
  Obj().Dump(sos, 0);
1055 
  args.SetResult(sos);
1056 
  return kOK;
1057 
}
1058 
 
1059 
//------------------------------------------+-----------------------------------
1060 
//! FIXME_docs
1061 
 
1062 
int RtclRw11Cpu::M_default(RtclArgs& args)
1063 
{
1064 
  if (!args.AllDone()) return kERR;
1065 
  ostringstream sos;
1066 
 
1067 
  vector<string> cntlnames;
1068 
  Obj().ListCntl(cntlnames);
1069 
 
1070 
  sos << "name type ibbase lam" << endl;
1071 
 
1072 
  for (size_t i=0; i<cntlnames.size(); i++) {
1073 
    Rw11Cntl& cntl(Obj().Cntl(cntlnames[i]));
1074 
    sos << RosPrintf(cntl.Name().c_str(),"-s",4)
1075 
        << " " << RosPrintf(cntl.Type().c_str(),"-s",4)
1076 
        << " " << RosPrintf(cntl.Base(),"o",6)
1077 
        << " " << RosPrintf(cntl.Lam(),"d",3)
1078 
        << endl;
1079 
  }
1080 
 
1081 
  args.AppendResultLines(sos);
1082 
  return kOK;
1083 
}
1084 
 
1085 
//------------------------------------------+-----------------------------------
1086 
//! FIXME_docs
1087 
 
1088 
void RtclRw11Cpu::SetupGetSet()
1089 
{
1090 
  Rw11Cpu* pobj = &Obj();
1091 
  fGets.Add<const string&>("type",  boost::bind(&Rw11Cpu::Type, pobj));
1092 
  fGets.Add<size_t>       ("index", boost::bind(&Rw11Cpu::Index, pobj));
1093 
  fGets.Add<uint16_t>     ("base",  boost::bind(&Rw11Cpu::Base, pobj));
1094 
  return;
1095 
}
1096 
 
1097 
//------------------------------------------+-----------------------------------
1098 
//! FIXME_docs
1099 
 
1100 
bool RtclRw11Cpu::GetVarName(RtclArgs& args, const char* argname,
1101 
                             size_t nind,
1102 
                             std::vector<std::string>& varname)
1103 
{
1104 
  while (varname.size() < nind+1) varname.push_back(string());
1105 
  string name;
1106 
  if (!args.GetArg(argname, name)) return false;
1107 
  if (name.length()) {                      // if variable defined
1108 
    char c = name[0];
1109 
    if (isdigit(c) || c=='+' || c=='-' ) {  // check for mistaken number
1110 
      args.AppendResult("-E: invalid variable name '", name.c_str(),
1111 
                        "': looks like a number", NULL);
1112 
      return false;
1113 
    }
1114 
  }
1115 
 
1116 
  varname[nind] = name;
1117 
  return true;
1118 
}
1119 
 
1120 
} // end namespace Retro

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.