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[/] [w11/] [tags/] [w11a_V0.61/] [tools/] [tbench/] [test_w11a_srcr_word_flow.tcl] - Blame information for rev 40

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1 25 wfjm 
# $Id: test_w11a_srcr_word_flow.tcl 575 2014-07-27 20:55:41Z mueller $
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#
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# Copyright 2013- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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# License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
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#
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# Revision History:
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# Date         Rev Version  Comment
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# 2014-07-27   575   1.0.2  drop tout value from asmwait, reply on asmwait_tout
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# 2014-03-01   552   1.0.1  check sp
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# 2013-03-31   502   1.0    Initial version
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#
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# Test srcr flow with mov ...,rx instructions for word access
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#
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# ----------------------------------------------------------------------------
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rlc log "test_w11a_srcr_word_flow: test srcr flow for word with mov ...,rx"
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rlc log "  r0 (mode=0)"
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# code register pre/post conditions beyond defaults
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#   r0   01234   -> ..same
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#   r1           -> 01234
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#   r2           -> #stack
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#   r3           -> #start
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$cpu ldasm -lst lst -sym sym {
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        . = 1000
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stack:
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start:  mov     r0,r1
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        mov     sp,r2
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        mov     pc,r3
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lpc:    halt
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stop:
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}
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rw11::asmrun  $cpu sym [list r0 01234]
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rw11::asmwait $cpu sym
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rw11::asmtreg $cpu [list r0 01234 \
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                          r1 01234 \
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                          r2 $sym(stack) \
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                          r3 $sym(lpc) \
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                          r4 0 \
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                          r5 0 \
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                          sp $sym(stack) ]
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# ----------------------------------------------------------------------------
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rlc log "  (r0),(r0)+,-(r0) (mode=1,2,4)"
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# code register pre/post conditions beyond defaults
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#   r0   #data   -> ..same
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#   r1           -> 01001
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#   r2           -> 01001
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#   r3           -> 01002
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#   r4           -> 01002
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#   r5           -> 01001
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$cpu ldasm -lst lst -sym sym {
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        . = 1000
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start:  mov     (r0),r1
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        mov     (r0)+,r2
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        mov     (r0)+,r3
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        mov     -(r0),r4
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        mov     -(r0),r5
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        halt
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stop:
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;
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data:   .word   1001
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        .word   1002
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}
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rw11::asmrun  $cpu sym [list r0 $sym(data)]
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rw11::asmwait $cpu sym
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rw11::asmtreg $cpu [list r0 $sym(data) \
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                         r1 001001 \
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                         r2 001001 \
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                         r3 001002 \
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                         r4 001002 \
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                         r5 001001 ]
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# ----------------------------------------------------------------------------
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rlc log "  @(r0)+,@-(r0)  (mode=3,5)"
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# code register pre/post conditions beyond defaults
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#   r0   #pdata  -> ..same
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#   r1           -> 02001
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#   r2           -> 02002
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#   r3           -> #pdata+4
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#   r4           -> 02002
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#   r5           -> 02001
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$cpu ldasm -lst lst -sym sym {
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        . = 1000
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start:  mov     @(r0)+,r1
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        mov     @(r0)+,r2
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        mov     r0,r3
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        mov     @-(r0),r4
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        mov     @-(r0),r5
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        halt
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stop:
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;
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pdata:  .word   data0
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        .word   data1
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data0:  .word   2001
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        .word   0
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data1:  .word   2002
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}
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rw11::asmrun  $cpu sym [list r0 $sym(pdata)]
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rw11::asmwait $cpu sym
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rw11::asmtreg $cpu [list r0 $sym(pdata) \
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                         r1 002001 \
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                         r2 002002 \
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                         r3 [expr {$sym(pdata)+4}] \
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                         r4 002002 \
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                         r5 002001 ]
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# ----------------------------------------------------------------------------
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rlc log "  nn(r0),@nn(r0)  (mode=6,7)"
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# code register pre/post conditions beyond defaults
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#   r0   #data   -> ..same
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#   r1           -> 03001
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#   r2           -> 03002
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#   r3           -> 03003
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#   r4           -> 03004
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$cpu ldasm -lst lst -sym sym {
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        . = 1000
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start:  mov     2(r0),r1
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        mov     @4(r0),r2
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        mov     6(r0),r3
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        mov     @10(r0),r4
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        halt
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stop:
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;
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data:   .word   177777
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        .word   003001
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        .word   data0
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        .word   003003
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        .word   data1
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data0:  .word   003002
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data1:  .word   003004
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}
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rw11::asmrun  $cpu sym [list r0 $sym(data)]
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rw11::asmwait $cpu sym
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rw11::asmtreg $cpu [list r0 $sym(data) \
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                         r1 003001 \
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                         r2 003002 \
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                         r3 003003 \
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                         r4 003004 \
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                         r5 0 ]
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# ----------------------------------------------------------------------------
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rlc log "  #nn,@#nn,var,@var  (mode=27,37,67,77)"
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# code register pre/post conditions beyond defaults
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#   r1           -> 04001
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#   r2           -> 04002
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#   r3           -> 04003
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#   r4           -> 04004
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$cpu ldasm -lst lst -sym sym {
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        . = 1000
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start:  mov     #004001,r1
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        mov     @#data2,r2
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        mov     data3,r3
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        mov     @pdata4,r4
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        halt
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stop:
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;
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pdata4: .word   data4
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data2:  .word   004002
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data3:  .word   004003
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data4:  .word   004004
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}
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174 20 wfjm 
rw11::asmrun  $cpu sym {}
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rw11::asmwait $cpu sym
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rw11::asmtreg $cpu [list r0 0 \
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                         r1 004001 \
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                         r2 004002 \
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                         r3 004003 \
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                         r4 004004 \
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                         r5 0 ]

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