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[/] [w11/] [tags/] [w11a_V0.7/] [rtl/] [bplib/] [nexys3/] [nexys3_pins.ucf] - Blame information for rev 36

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1 15 wfjm 
## $Id: nexys3_pins.ucf 432 2011-11-25 20:16:28Z mueller $
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##
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## Pin locks for Nexys 3 core functionality
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##  - USB UART
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##  - human I/O (switches, buttons, leds, display)
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##  - cram
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##
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## Revision History:
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## Date         Rev Version  Comment
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## 2011-11-23   432   1.0.2  add PPCM controls
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## 2011-10-10   413   1.0.1  new BTN sequence: clockwise(U-R-D-L) - middle
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## 2011-07-04   388   1.0    Initial version
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##
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## Note: default is DRIVE=12 | SLEW=SLOW
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##
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## Assume that VCCB0 is jumpered for 2.5 V (for VHDCI LVDS usage)
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##
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## clocks -- in bank 2 -------------------------------------------------------
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NET "I_CLK100"  LOC = "v10"  | IOSTANDARD=LVCMOS33;
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##
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## USB UART Interface -- in bank 1--------------------------------------------
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##   I_RXD   -> signal MCU_RX -> TXD pin of FT232R
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##   O_TXD   -> signal MCU_TX -> RXD pin of FT232R
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##   I_CTS_N ?? signal RTS    -> RTS pin of FT232R (only on J14)
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##   O_RTS_N ?? signal CTS    -> CTS pin of FT232R (only on J14)
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NET "I_RXD"     LOC = "n17" | IOSTANDARD=LVCMOS33;
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NET "O_TXD"     LOC = "n18" | IOSTANDARD=LVCMOS33 | DRIVE=12 | SLEW=SLOW;
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##
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## switches -- in bank 2 -----------------------------------------------------
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NET "I_SWI<0>"  LOC = "t10" | IOSTANDARD=LVCMOS33;
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NET "I_SWI<1>"  LOC = "t9"  | IOSTANDARD=LVCMOS33;
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NET "I_SWI<2>"  LOC = "v9"  | IOSTANDARD=LVCMOS33;
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NET "I_SWI<3>"  LOC = "m8"  | IOSTANDARD=LVCMOS33;
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NET "I_SWI<4>"  LOC = "n8"  | IOSTANDARD=LVCMOS33;
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NET "I_SWI<5>"  LOC = "u8"  | IOSTANDARD=LVCMOS33;
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NET "I_SWI<6>"  LOC = "v8"  | IOSTANDARD=LVCMOS33;
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NET "I_SWI<7>"  LOC = "t5"  | IOSTANDARD=LVCMOS33;
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##
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## buttons -- in bank 0-------------------------------------------------------
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##   sequence: clockwise(U-R-D-L) - middle
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NET "I_BTN<0>"  LOC = "a8"  | IOSTANDARD=LVCMOS25;      # BTNU
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NET "I_BTN<1>"  LOC = "d9"  | IOSTANDARD=LVCMOS25;      # BTNR
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NET "I_BTN<2>"  LOC = "c9"  | IOSTANDARD=LVCMOS25;      # BTND
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NET "I_BTN<3>"  LOC = "c4"  | IOSTANDARD=LVCMOS25;      # BTNL
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NET "I_BTN<4>"  LOC = "b8"  | IOSTANDARD=LVCMOS25;      # BTNS
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##
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## LEDs -- in bank 2 ---------------------------------------------------------
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NET "O_LED<0>"  LOC = "u16" | IOSTANDARD=LVCMOS33;
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NET "O_LED<1>"  LOC = "v16" | IOSTANDARD=LVCMOS33;
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NET "O_LED<2>"  LOC = "u15" | IOSTANDARD=LVCMOS33;
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NET "O_LED<3>"  LOC = "v15" | IOSTANDARD=LVCMOS33;
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NET "O_LED<4>"  LOC = "m11" | IOSTANDARD=LVCMOS33;
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NET "O_LED<5>"  LOC = "n11" | IOSTANDARD=LVCMOS33;
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NET "O_LED<6>"  LOC = "r11" | IOSTANDARD=LVCMOS33;
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NET "O_LED<7>"  LOC = "t11" | IOSTANDARD=LVCMOS33;
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NET "O_LED<*>" DRIVE=12 | SLEW=SLOW;
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##
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## 7 segment display -- in bank 1 --------------------------------------------
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NET "O_ANO_N<0>"  LOC = "n16" | IOSTANDARD=LVCMOS33;
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NET "O_ANO_N<1>"  LOC = "n15" | IOSTANDARD=LVCMOS33;
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NET "O_ANO_N<2>"  LOC = "p18" | IOSTANDARD=LVCMOS33;
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NET "O_ANO_N<3>"  LOC = "p17" | IOSTANDARD=LVCMOS33;
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NET "O_ANO_N<*>" DRIVE=12 | SLEW=SLOW;
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##
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NET "O_SEG_N<0>"  LOC = "t17" | IOSTANDARD=LVCMOS33;    # CA
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NET "O_SEG_N<1>"  LOC = "t18" | IOSTANDARD=LVCMOS33;    # CB
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NET "O_SEG_N<2>"  LOC = "u17" | IOSTANDARD=LVCMOS33;    # CC
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NET "O_SEG_N<3>"  LOC = "u18" | IOSTANDARD=LVCMOS33;    # CD
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NET "O_SEG_N<4>"  LOC = "m14" | IOSTANDARD=LVCMOS33;    # CE
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NET "O_SEG_N<5>"  LOC = "n14" | IOSTANDARD=LVCMOS33;    # CF
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NET "O_SEG_N<6>"  LOC = "l14" | IOSTANDARD=LVCMOS33;    # CG
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NET "O_SEG_N<7>"  LOC = "m13" | IOSTANDARD=LVCMOS33;    # DP
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NET "O_SEG_N<*>" DRIVE=12 | SLEW=SLOW;
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##
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## CRAM -- in bank 2 (data) and 1 (addr) -------------------------------------
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NET "O_MEM_CE_N"     LOC = "l15" | IOSTANDARD=LVCMOS33 | DRIVE=12 | SLEW=FAST;
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NET "O_MEM_WE_N"     LOC = "m16" | IOSTANDARD=LVCMOS33 | DRIVE=12 | SLEW=FAST;
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NET "O_MEM_OE_N"     LOC = "l18" | IOSTANDARD=LVCMOS33 | DRIVE=12 | SLEW=FAST;
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##
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NET "O_MEM_BE_N<0>"  LOC = "k16" | IOSTANDARD=LVCMOS33;
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NET "O_MEM_BE_N<1>"  LOC = "k15" | IOSTANDARD=LVCMOS33;
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NET "O_MEM_BE_N<*>" DRIVE=12 | SLEW=FAST;
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##
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NET "O_MEM_ADV_N"    LOC = "h18" | IOSTANDARD=LVCMOS33 | DRIVE=12 | SLEW=FAST;
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NET "O_MEM_CLK"      LOC = "r10" | IOSTANDARD=LVCMOS33 | DRIVE=12 | SLEW=FAST;
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NET "O_MEM_CRE"      LOC = "m18" | IOSTANDARD=LVCMOS33 | DRIVE=12 | SLEW=FAST;
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NET "I_MEM_WAIT"     LOC = "v4"  | IOSTANDARD=LVCMOS33 | PULLDOWN;
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##
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NET "O_MEM_ADDR<0>"   LOC = "k18" | IOSTANDARD=LVCMOS33;
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NET "O_MEM_ADDR<1>"   LOC = "k17" | IOSTANDARD=LVCMOS33;
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NET "O_MEM_ADDR<2>"   LOC = "j18" | IOSTANDARD=LVCMOS33;
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NET "O_MEM_ADDR<3>"   LOC = "j16" | IOSTANDARD=LVCMOS33;
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NET "O_MEM_ADDR<4>"   LOC = "g18" | IOSTANDARD=LVCMOS33;
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NET "O_MEM_ADDR<5>"   LOC = "g16" | IOSTANDARD=LVCMOS33;
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NET "O_MEM_ADDR<6>"   LOC = "h16" | IOSTANDARD=LVCMOS33;
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NET "O_MEM_ADDR<7>"   LOC = "h15" | IOSTANDARD=LVCMOS33;
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NET "O_MEM_ADDR<8>"   LOC = "h14" | IOSTANDARD=LVCMOS33;
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NET "O_MEM_ADDR<9>"   LOC = "h13" | IOSTANDARD=LVCMOS33;
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NET "O_MEM_ADDR<10>"  LOC = "f18" | IOSTANDARD=LVCMOS33;
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NET "O_MEM_ADDR<11>"  LOC = "f17" | IOSTANDARD=LVCMOS33;
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NET "O_MEM_ADDR<12>"  LOC = "k13" | IOSTANDARD=LVCMOS33;
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NET "O_MEM_ADDR<13>"  LOC = "k12" | IOSTANDARD=LVCMOS33;
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NET "O_MEM_ADDR<14>"  LOC = "e18" | IOSTANDARD=LVCMOS33;
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NET "O_MEM_ADDR<15>"  LOC = "e16" | IOSTANDARD=LVCMOS33;
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NET "O_MEM_ADDR<16>"  LOC = "g13" | IOSTANDARD=LVCMOS33;
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NET "O_MEM_ADDR<17>"  LOC = "h12" | IOSTANDARD=LVCMOS33;
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NET "O_MEM_ADDR<18>"  LOC = "d18" | IOSTANDARD=LVCMOS33;
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NET "O_MEM_ADDR<19>"  LOC = "d17" | IOSTANDARD=LVCMOS33;
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NET "O_MEM_ADDR<20>"  LOC = "g14" | IOSTANDARD=LVCMOS33;
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NET "O_MEM_ADDR<21>"  LOC = "f14" | IOSTANDARD=LVCMOS33;
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NET "O_MEM_ADDR<22>"  LOC = "c18" | IOSTANDARD=LVCMOS33;
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NET "O_MEM_ADDR<*>" DRIVE=6 | SLEW=FAST;
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##
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NET "IO_MEM_DATA<0>"  LOC = "r13" | IOSTANDARD=LVCMOS33;
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NET "IO_MEM_DATA<1>"  LOC = "t14" | IOSTANDARD=LVCMOS33;
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NET "IO_MEM_DATA<2>"  LOC = "v14" | IOSTANDARD=LVCMOS33;
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NET "IO_MEM_DATA<3>"  LOC = "u5"  | IOSTANDARD=LVCMOS33;
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NET "IO_MEM_DATA<4>"  LOC = "v5"  | IOSTANDARD=LVCMOS33;
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NET "IO_MEM_DATA<5>"  LOC = "r3"  | IOSTANDARD=LVCMOS33;
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NET "IO_MEM_DATA<6>"  LOC = "t3"  | IOSTANDARD=LVCMOS33;
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NET "IO_MEM_DATA<7>"  LOC = "r5"  | IOSTANDARD=LVCMOS33;
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NET "IO_MEM_DATA<8>"  LOC = "n5"  | IOSTANDARD=LVCMOS33;
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NET "IO_MEM_DATA<9>"  LOC = "p6"  | IOSTANDARD=LVCMOS33;
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NET "IO_MEM_DATA<10>" LOC = "p12" | IOSTANDARD=LVCMOS33;
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NET "IO_MEM_DATA<11>" LOC = "u13" | IOSTANDARD=LVCMOS33;
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NET "IO_MEM_DATA<12>" LOC = "v13" | IOSTANDARD=LVCMOS33;
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NET "IO_MEM_DATA<13>" LOC = "u10" | IOSTANDARD=LVCMOS33;
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NET "IO_MEM_DATA<14>" LOC = "r8"  | IOSTANDARD=LVCMOS33;
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NET "IO_MEM_DATA<15>" LOC = "t8"  | IOSTANDARD=LVCMOS33;
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NET "IO_MEM_DATA<*>" DRIVE=6 | SLEW=SLOW | KEEPER;
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##
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## PPCM -- parallel PCM memory -----------------------------------------------
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NET "O_PPCM_CE_N"     LOC = "l17" | IOSTANDARD=LVCMOS33 | DRIVE=6 | SLEW=SLOW;
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NET "O_PPCM_RST_N"    LOC = "t4"  | IOSTANDARD=LVCMOS33 | DRIVE=6 | SLEW=SLOW;
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##

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