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FLOWTYPE = FPGA_SYNTHESIS;

#

# $Id: syn_7a_speed.opt 540 2013-10-13 18:42:50Z mueller $

#

#  Revision History:

# Date         Rev Version  Comment

# 2013-10-13   540   1.2    use -shreg_min_size=3

# 2013-09-21   534   1.0    Initial version (cloned from imp_s6_speed.opt)

#

# Derived from ISE xst_mixed.opt

#

# ----------------------------------------------------------------------------

# Options for XST

#

Program xst

-ifn _xst.scr;            # input XST script file

-ofn _xst.log;            # output XST log file

-intstyle xflow;                  # Message Reporting Style

#

# ParamFile lists the XST Properties that can be set by the user.

#

ParamFile: _xst.scr

"run";

#

# Global Synthesis Options

#

"-ifn ";             # Input/Project File Name

"-ifmt mixed";                    # Input Format (Verilog and VHDL)

"-ofn ";                  # Output File Name

"-ofmt ngc";                      # Output File Format

"-top $top_entity";               # Top Design Name

"-p ";                  # Target Device

"-opt_mode SPEED";                # Optimization Criteria # AREA or SPEED

"-opt_level 2";                   # Optimization Effort Criteria: 2=High

"-shreg_min_size 3";              # default is 2 !!

"-uc .xcf";               # Constraint File name

#

# The following are HDL Options

#

End ParamFile

End Program xst

#