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-- $Id: pdp11_munit.vhd 641 2015-02-01 22:12:15Z mueller $
--
-- Copyright 2006-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
-- This program is free software; you may redistribute and/or modify it under
-- the terms of the GNU General Public License as published by the Free
-- Software Foundation, either version 2, or at your option any later version.
--
-- This program is distributed in the hope that it will be useful, but
-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
-- or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
-- for complete details.
--
------------------------------------------------------------------------------
-- Module Name:    pdp11_munit - syn
-- Description:    pdp11: mul/div unit for data (munit)
--
-- Dependencies:   -
-- Test bench:     tb/tb_pdp11_core (implicit)
-- Target Devices: generic
-- Tool versions:  ise 8.2-14.7; viv 2014.4; ghdl 0.18-0.31
--
-- Synthesized (xst):
-- Date         Rev  ise         Target      flop lutl lutm slic t peri
-- 2014-07-12   569 14.7 131013  xc6slx16-2    30  154    0   46 s  6.8
-- 2014-07-11   568 14.7 131013  xc6slx16-2    28  123    0   47 s  5.6
--
-- Revision History: 
-- Date         Rev Version  Comment
-- 2014-08-10   581   1.2.4  rename NEXT_ to N_; use c_cc_f_*
-- 2014-08-05   578   1.2.3  fix proc_div sensitivity list
-- 2014-08-03   577   1.2.2  use DTMP_POS rather signed(Q)>0 (xst bug for S-3)
-- 2014-07-26   575   1.2.1  fix proc_omux sensitivity list
-- 2014-07-12   569   1.2    merge DIV_ZERO+DIV_OVFL to DIV_QUIT; add S_DIV_SR
--                           BUGFIX: fix divide logic, dr+q max neg issues
-- 2011-11-18   427   1.1.1  now numeric_std clean
-- 2010-09-18   300   1.1    renamed from mbox
-- 2007-06-14    56   1.0.1  Use slvtypes.all
-- 2007-05-12    26   1.0    Initial version 
------------------------------------------------------------------------------
 
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
 
use work.slvtypes.all;
use work.pdp11.all;
 
-- ----------------------------------------------------------------------------
 
entity pdp11_munit is                   -- mul/div unit for data (munit)
  port (
    CLK : in slbit;                     -- clock
    DSRC : in slv16;                    -- 'src' data in
    DDST : in slv16;                    -- 'dst' data in
    DTMP : in slv16;                    -- 'tmp' data in
    GPR_DSRC : in slv16;                -- 'src' data from GPR
    FUNC : in slv2;                     -- function
    S_DIV : in slbit;                   -- s_opg_div state    (load dd_low)
    S_DIV_CN : in slbit;                -- s_opg_div_cn state (1st..16th cycle)
    S_DIV_CR : in slbit;                -- s_opg_div_cr state (remainder corr.)
    S_DIV_SR : in slbit;                -- s_opg_div_sr state (store remainder)
    S_ASH : in slbit;                   -- s_opg_ash state
    S_ASH_CN : in slbit;                -- s_opg_ash_cn state
    S_ASHC : in slbit;                  -- s_opg_ashc state
    S_ASHC_CN : in slbit;               -- s_opg_ashc_cn state
    SHC_TC : out slbit;                 -- last shc cycle (shc==0)
    DIV_CR : out slbit;                 -- division: remainder correction needed
    DIV_CQ : out slbit;                 -- division: quotient correction needed
    DIV_QUIT : out slbit;               -- division: abort (0/ or /0 or V=1)
    DOUT : out slv16;                   -- data output
    DOUTE : out slv16;                  -- data output extra
    CCOUT : out slv4                    -- condition codes out
  );
end pdp11_munit;
 
architecture syn of pdp11_munit is
 
  signal R_DD_L : slv16 := (others=>'0'); -- divident, low order part
  signal R_DDO_LT : slbit := '0';         -- original sign bit of divident
  signal R_MAXFIX : slbit := '0';         -- maxfix flag for division
  signal R_QO_LT : slbit := '0';          -- expected q sign for division
  signal R_DIV_V : slbit := '0';          -- V flag for division
  signal R_SHC : slv6 := (others=>'0');   -- shift counter for div and ash/c
  signal R_C1 : slbit := '0';             -- first cycle indicator
  signal R_MSBO : slbit := '0';           -- original sign bit for ash/c
  signal R_ASH_V : slbit := '0';          -- V flag for ash/c
  signal R_ASH_C : slbit := '0';          -- C flag for ash/c
 
  signal N_DD_L : slv16 := (others=>'0');
  signal N_DDO_LT : slbit := '0';
  signal N_MAXFIX : slbit := '0';
  signal N_QO_LT : slbit := '0';
  signal N_DIV_V : slbit := '0';
  signal N_SHC : slv6 := (others=>'0');
  signal N_C1 : slbit := '0';
  signal N_MSBO : slbit := '0';
  signal N_ASH_V : slbit := '0';
  signal N_ASH_C : slbit := '0';
 
  signal SHC_TC_L : slbit := '0';
 
  signal DDST_ZERO : slbit := '0';
  signal DDST_NMAX : slbit := '0';
  signal DSRC_ZERO : slbit := '0';
  signal DSRC_ONES : slbit := '0';
  signal DTMP_ZERO : slbit := '0';
  signal DTMP_POS  : slbit := '0';
 
  signal DOUT_DIV : slv16 := (others=>'0');
  signal DOUTE_DIV : slv16 := (others=>'0');
 
  alias DR : slv16 is DDST;             -- divisor  (in DDST)
  alias DD_H : slv16 is DSRC;           -- divident, high order part (in DSRC)
  alias Q : slv16 is DTMP;              -- quotient (accumulated in DTMP)
 
begin
 
  proc_regs: process (CLK)
  begin
    if rising_edge(CLK) then
      R_DD_L   <= N_DD_L;
      R_DDO_LT <= N_DDO_LT;
      R_MAXFIX <= N_MAXFIX;
      R_QO_LT  <= N_QO_LT;
      R_DIV_V  <= N_DIV_V;
      R_SHC    <= N_SHC;
      R_C1     <= N_C1;
      R_MSBO   <= N_MSBO;
      R_ASH_V  <= N_ASH_V;
      R_ASH_C  <= N_ASH_C;
    end if;
  end process proc_regs;
 
  proc_comm: process (DDST, DSRC, DTMP)
  begin
 
    DDST_ZERO <= '0';
    DDST_NMAX <= '0';
    DSRC_ZERO <= '0';
    DSRC_ONES <= '0';
    DTMP_ZERO <= '0';
    DTMP_POS  <= '0';
 
    if unsigned(DDST) = 0 then
      DDST_ZERO <= '1';
    end if;
    if DDST = "1000000000000000" then
      DDST_NMAX <= '1';
    end if;
    if unsigned(DSRC) = 0 then
      DSRC_ZERO <= '1';
    end if;
    if   signed(DSRC) = -1 then
      DSRC_ONES <= '1';
    end if;
    if unsigned(DTMP) = 0 then
      DTMP_ZERO <= '1';
    end if;
    if signed(DTMP) > 0 then
      DTMP_POS  <= '1';
    end if;
 
  end process proc_comm;
 
  proc_shc: process (DDST, R_SHC, R_C1,
                     S_DIV, S_DIV_CN, S_ASH, S_ASH_CN, S_ASHC, S_ASHC_CN)
  begin
 
    N_SHC    <= R_SHC;
    N_C1     <= R_C1;
 
    if S_ASH='1' or S_ASHC='1' then
      N_SHC <= DDST(5 downto 0);
      N_C1 <= '1';
    end if;
    if S_DIV = '1' then
      N_SHC <= "001111";
      N_C1 <= '1';
    end if;
 
    if S_DIV_CN='1' or S_ASH_CN='1' or S_ASHC_CN='1' then
      if R_SHC(5) = '0' then
        N_SHC <= slv(unsigned(R_SHC) - 1);
      else
        N_SHC <= slv(unsigned(R_SHC) + 1);
      end if;
      N_C1 <= '0';
    end if;
 
    SHC_TC_L <= '0';
    if unsigned(R_SHC) = 0 then
      SHC_TC_L <= '1';
    end if;
 
  end process proc_shc;
 
  proc_div: process (DDST, DSRC, DTMP, GPR_DSRC, DR, DD_H, Q,
                     R_DD_L, R_DDO_LT, R_MAXFIX, R_QO_LT, R_DIV_V, R_SHC, R_C1,
                     S_DIV, S_DIV_CN, S_DIV_CR, S_DIV_SR,
                     DDST_ZERO, DDST_NMAX, DSRC_ZERO, DTMP_ZERO, DTMP_POS)
 
    variable div_zero : slbit := '0';
    variable div_ovfl : slbit := '0';
    variable shftdd : slbit := '0';
    variable subadd : slbit := '0';
 
    variable dd_le : slbit := '0';
    variable dd_ge : slbit := '0';
    variable dd_gt : slbit := '0';
 
    variable qbit :   slbit := '0';
    variable qbit_1 : slbit := '0';
    variable qbit_n : slbit := '0';
 
    variable dd_h_old : slv16 := (others=>'0');  -- dd_h before add/sub
    variable dd_h_new : slv16 := (others=>'0');  -- dd_h after  add/sub
 
  begin
 
    N_DD_L   <= R_DD_L;
    N_DDO_LT <= R_DDO_LT;
    N_MAXFIX <= R_MAXFIX;
    N_QO_LT  <= R_QO_LT;
    N_DIV_V  <= R_DIV_V;
 
    div_zero := '0';
    div_ovfl := '0';
 
    qbit_1 := not (DR(15) xor DD_H(15)); -- !(dr<0 ^ dd_h<0)
 
    shftdd := not S_DIV_CR;
    if shftdd = '1' then
      dd_h_old := DD_H(14 downto 0) & R_DD_L(15);
    else
      dd_h_old := DD_H(15 downto 0);
    end if;
 
    if R_C1 = '1' then
      subadd := qbit_1;
    else
      subadd := Q(0);
    end if;
 
    if subadd = '0' then
      dd_h_new := slv(signed(dd_h_old) + signed(DR));
    else
      dd_h_new := slv(signed(dd_h_old) - signed(DR));
    end if;
 
    dd_le := '0';
    if signed(dd_h_new) <= 0 then
      dd_le := '1';                     -- set if dd_new_h <= 0
    end if;
 
    dd_ge := '0';
    if signed(dd_h_new) >= -1 then
      dd_ge := '1';                     -- set if dd_new_h >= -1
    end if;
 
    dd_gt := '0';
    if dd_h_new(15) = '0' and
       (unsigned(dd_h_new(14 downto 0))/=0 or
        unsigned(R_DD_L(14 downto 0))/=0)
    then
      dd_gt := '1';                     -- set if dd_new > 0
    end if;
 
    if R_DDO_LT = '0' then
      qbit_n := DR(15) xor not dd_h_new(15);  -- b_dr_lt ^ !b_dd_lt
    else
      if R_MAXFIX = '0' then
        qbit_n := DR(15) xor dd_gt;             -- b_dr_lt ^  b_dd_gt
      else
        qbit_n := dd_h_new(15);                 -- b_dd_lt
      end if;
    end if;
 
    if S_DIV = '1' then
      N_DDO_LT <= DD_H(15);
      N_DD_L   <= GPR_DSRC;
      N_MAXFIX <= '0';
      if DDST_NMAX = '1' and GPR_DSRC = "0000000000000000" then
        N_MAXFIX <= '1';                   -- b_dr_nmax && (ddi_l == 0)
      end if;
      N_QO_LT <= DD_H(15) xor DR(15);      -- b_di_lt ^ b_dr_lt
    end if;
 
    if R_C1 = '1' then
      div_zero := DDST_ZERO or
                  (DSRC_ZERO and DTMP_ZERO); -- note: DTMP here still dd_low !
 
      if DDST_NMAX='0' and (DD_H(15) xor DD_H(14)) = '1' then
        div_ovfl := '1';                 -- !b_dr_nmax && (b_di_31 != b_di_30)
      end if;
 
      if R_DDO_LT = '0' then            -- if (!b_di_lt)
        if R_QO_LT = '0' then             -- if (!b_qo_lt)
          if dd_h_new(15) = '0' then        -- if (!b_dd_lt)
            div_ovfl := '1';
          end if;
        else                              -- else
          if dd_le = '0' then               -- if (!b_dd_le)
            div_ovfl := '1';
          end if;
        end if;
      else
        if R_QO_LT = '0' then            -- if (!b_qo_lt)
          if dd_gt = '0' then               -- if (!b_dd_gt)
            div_ovfl := '1';
          end if;
        else                              -- else
          if dd_ge = '0' then               -- if (!b_dd_ge)
            div_ovfl := '1';
          end if;
        end if;
      end if;
      N_DIV_V <= div_ovfl;
 
    elsif S_DIV_SR = '1' then
      if R_QO_LT='1' and DTMP_POS='1' then
        div_ovfl := '1';
      end if;
      N_DIV_V <= div_ovfl;
    end if;
 
    if S_DIV_CN = '1' then
      N_DD_L <= R_DD_L(14 downto 0) & '0';
    end if;
 
    if S_DIV_CN = '1' then
      qbit := qbit_n;
    else
      qbit := qbit_1;
    end if;
 
    DIV_QUIT   <= div_zero or div_ovfl;
 
    DIV_CR <= R_MAXFIX or       -- b_maxfix | (!(b_ddo_lt ^ (b_dr_lt ^ b_qbit)))
              (not (R_DDO_LT xor (DR(15) xor Q(0))));
    DIV_CQ <= R_MAXFIX or       -- b_maxfix | (b_ddo_lt ^ b_dr_lt)
              (R_DDO_LT xor DR(15));
 
    DOUT_DIV  <= dd_h_new;
    DOUTE_DIV <= Q(14 downto 0) & qbit;
 
  end process proc_div;
 
  proc_ash: process (R_MSBO, R_ASH_V, R_ASH_C, R_SHC, DSRC, DTMP, FUNC,
                     S_ASH, S_ASH_CN, S_ASHC, S_ASHC_CN, SHC_TC_L)
  begin
 
    N_MSBO   <= R_MSBO;
    N_ASH_V  <= R_ASH_V;
    N_ASH_C  <= R_ASH_C;
 
    if S_ASH='1' or S_ASHC='1' then
      N_MSBO <= DSRC(15);
      N_ASH_V <= '0';
      N_ASH_C <= '0';
    end if;
 
    if (S_ASH_CN='1' or S_ASHC_CN='1') and SHC_TC_L='0' then
      if R_SHC(5) = '0' then            -- left shift
        if (R_MSBO xor DSRC(14))='1' then
          N_ASH_V <= '1';
        end if;
        N_ASH_C <= DSRC(15);
      else                              -- right shift
        if FUNC = c_munit_func_ash then
          N_ASH_C <= DSRC(0);
        else
          N_ASH_C <= DTMP(0);
        end if;
      end if;
    end if;
 
  end process proc_ash;
 
  proc_omux: process (DSRC, DDST, DTMP, FUNC,
                      R_ASH_V, R_ASH_C, R_SHC, R_DIV_V, R_QO_LT,
                      DOUT_DIV, DOUTE_DIV,
                      DSRC_ZERO, DSRC_ONES, DTMP_ZERO, DDST_ZERO)
 
    variable prod : slv32 := (others=>'0');
    variable omux_sel : slv2 := "00";
    variable ash_dout0 : slbit := '0';
 
    variable mul_c : slbit := '0';
 
  begin
 
    prod := slv(signed(DSRC) * signed(DDST));
 
    case FUNC is
      when c_munit_func_mul =>
        omux_sel := "00";
      when c_munit_func_div =>
        omux_sel := "01";
      when c_munit_func_ash |c_munit_func_ashc =>
        if R_SHC(5) = '0' then
          omux_sel := "10";
        else
          omux_sel := "11";
        end if;
      when others => null;
    end case;
 
    if FUNC = c_munit_func_ash then
      ash_dout0 := '0';
    else
      ash_dout0 := DTMP(15);
    end if;
 
    case omux_sel is
      when "00"  =>                     -- MUL
        DOUT  <= prod(31 downto 16);
        DOUTE <= prod(15 downto 0);
      when  "01" =>                     -- DIV
        DOUT  <= DOUT_DIV;
        DOUTE <= DOUTE_DIV;
      when  "10" =>                     -- shift left
        DOUT  <= DSRC(14 downto 0) & ash_dout0;
        DOUTE <= DTMP(14 downto 0) & "0";
      when  "11" =>                     -- shift right
        DOUT  <= DSRC(15) & DSRC(15 downto 1);
        DOUTE <= DSRC(0) & DTMP(15 downto 1);
      when others => null;
    end case;
 
    mul_c := '0';                       -- MUL C codes is set if
    if DSRC(15) = '0' then
      if DSRC_ZERO='0' or DTMP(15)='1' then -- for positive results when
        mul_c := '1';                   --   product > 2^15-1
      end if;
    else                                -- for negative results when
      if DSRC_ONES='0' or DTMP(15)='0' then
        mul_c := '1';                   --   product < -2^15
      end if;
    end if;
 
    case FUNC is
      when c_munit_func_mul =>
        CCOUT(c_cc_f_n) <= DSRC(15);                -- N
        CCOUT(c_cc_f_z) <= DSRC_ZERO and DTMP_ZERO; -- Z
        CCOUT(c_cc_f_v) <= '0';                     -- V=0
        CCOUT(c_cc_f_c) <= mul_c;                   -- C
 
      when c_munit_func_div =>
        if DDST_ZERO = '1' then
          CCOUT(c_cc_f_n) <= '0';             -- N=0 if div/0
          CCOUT(c_cc_f_z) <= '1';             -- Z=1 if div/0
        elsif R_DIV_V = '1' then
          CCOUT(c_cc_f_n) <= R_QO_LT;         -- N (send expected sign)
          CCOUT(c_cc_f_z) <= '0';             -- Z (from unchanged reg) ??? veri
        else
          CCOUT(c_cc_f_n) <= DTMP(15);        -- N (from Q (DTMP))
          CCOUT(c_cc_f_z) <= DTMP_ZERO;       -- Z (from Q (DTMP)) ??? verify
        end if;
        CCOUT(c_cc_f_v) <= R_DIV_V or DDST_ZERO;  -- V
        CCOUT(c_cc_f_c) <= DDST_ZERO;             -- C (dst=0)
 
      when c_munit_func_ash =>
        CCOUT(c_cc_f_n) <= DSRC(15);           -- N
        CCOUT(c_cc_f_z) <= DSRC_ZERO;          -- Z
        CCOUT(c_cc_f_v) <= R_ASH_V;            -- V
        CCOUT(c_cc_f_c) <= R_ASH_C;            -- C
 
      when c_munit_func_ashc =>
        CCOUT(c_cc_f_n) <= DSRC(15);               -- N
        CCOUT(c_cc_f_z) <= DSRC_ZERO and DTMP_ZERO;-- Z
        CCOUT(c_cc_f_v) <= R_ASH_V;                -- V
        CCOUT(c_cc_f_c) <= R_ASH_C;                -- C
 
      when others => null;
    end case;
 
  end process proc_omux;
 
  SHC_TC <= SHC_TC_L;
 
end syn;

Line No.	Rev	Author	Line
1	29	wfjm	`-- $Id: pdp11_munit.vhd 641 2015-02-01 22:12:15Z mueller $`
2	2	wfjm	`--`
3	25	wfjm	`-- Copyright 2006-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>`
4	2	wfjm	`--`
5			`-- This program is free software; you may redistribute and/or modify it under`
6			`-- the terms of the GNU General Public License as published by the Free`
7			`-- Software Foundation, either version 2, or at your option any later version.`
8			`--`
9			`-- This program is distributed in the hope that it will be useful, but`
10			`-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY`
11			`-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License`
12			`-- for complete details.`
13			`--`
14			`------------------------------------------------------------------------------`
15	8	wfjm	`-- Module Name: pdp11_munit - syn`
16			`-- Description: pdp11: mul/div unit for data (munit)`
17	2	wfjm	`--`
18			`-- Dependencies: -`
19			`-- Test bench: tb/tb_pdp11_core (implicit)`
20			`-- Target Devices: generic`
21	29	wfjm	`-- Tool versions: ise 8.2-14.7; viv 2014.4; ghdl 0.18-0.31`
22	25	wfjm	`--`
23			`-- Synthesized (xst):`
24			`-- Date Rev ise Target flop lutl lutm slic t peri`
25			`-- 2014-07-12 569 14.7 131013 xc6slx16-2 30 154 0 46 s 6.8`
26			`-- 2014-07-11 568 14.7 131013 xc6slx16-2 28 123 0 47 s 5.6`
27			`--`
28	2	wfjm	`-- Revision History:`
29			`-- Date Rev Version Comment`
30	27	wfjm	`-- 2014-08-10 581 1.2.4 rename NEXT_ to N_; use c_cc_f_*`
31	25	wfjm	`-- 2014-08-05 578 1.2.3 fix proc_div sensitivity list`
32			`-- 2014-08-03 577 1.2.2 use DTMP_POS rather signed(Q)>0 (xst bug for S-3)`
33			`-- 2014-07-26 575 1.2.1 fix proc_omux sensitivity list`
34			`-- 2014-07-12 569 1.2 merge DIV_ZERO+DIV_OVFL to DIV_QUIT; add S_DIV_SR`
35			`-- BUGFIX: fix divide logic, dr+q max neg issues`
36	13	wfjm	`-- 2011-11-18 427 1.1.1 now numeric_std clean`
37	8	wfjm	`-- 2010-09-18 300 1.1 renamed from mbox`
38	2	wfjm	`-- 2007-06-14 56 1.0.1 Use slvtypes.all`
39			`-- 2007-05-12 26 1.0 Initial version`
40			`------------------------------------------------------------------------------`
41
42			`library ieee;`
43			`use ieee.std_logic_1164.all;`
44	13	wfjm	`use ieee.numeric_std.all;`
45	2	wfjm
46			`use work.slvtypes.all;`
47			`use work.pdp11.all;`
48
49			`-- ----------------------------------------------------------------------------`
50
51	8	wfjm	`entity pdp11_munit is -- mul/div unit for data (munit)`
52	2	wfjm	`port (`
53			`CLK : in slbit; -- clock`
54			`DSRC : in slv16; -- 'src' data in`
55			`DDST : in slv16; -- 'dst' data in`
56			`DTMP : in slv16; -- 'tmp' data in`
57			`GPR_DSRC : in slv16; -- 'src' data from GPR`
58			`FUNC : in slv2; -- function`
59	25	wfjm	`S_DIV : in slbit; -- s_opg_div state (load dd_low)`
60			`S_DIV_CN : in slbit; -- s_opg_div_cn state (1st..16th cycle)`
61			`S_DIV_CR : in slbit; -- s_opg_div_cr state (remainder corr.)`
62			`S_DIV_SR : in slbit; -- s_opg_div_sr state (store remainder)`
63	2	wfjm	`S_ASH : in slbit; -- s_opg_ash state`
64			`S_ASH_CN : in slbit; -- s_opg_ash_cn state`
65			`S_ASHC : in slbit; -- s_opg_ashc state`
66			`S_ASHC_CN : in slbit; -- s_opg_ashc_cn state`
67			`SHC_TC : out slbit; -- last shc cycle (shc==0)`
68	25	wfjm	`DIV_CR : out slbit; -- division: remainder correction needed`
69	2	wfjm	`DIV_CQ : out slbit; -- division: quotient correction needed`
70	25	wfjm	`DIV_QUIT : out slbit; -- division: abort (0/ or /0 or V=1)`
71	2	wfjm	`DOUT : out slv16; -- data output`
72			`DOUTE : out slv16; -- data output extra`
73			`CCOUT : out slv4 -- condition codes out`
74			`);`
75	8	wfjm	`end pdp11_munit;`
76	2	wfjm
77	8	wfjm	`architecture syn of pdp11_munit is`
78	2	wfjm
79			`signal R_DD_L : slv16 := (others=>'0'); -- divident, low order part`
80			`signal R_DDO_LT : slbit := '0'; -- original sign bit of divident`
81	25	wfjm	`signal R_MAXFIX : slbit := '0'; -- maxfix flag for division`
82			`signal R_QO_LT : slbit := '0'; -- expected q sign for division`
83	2	wfjm	`signal R_DIV_V : slbit := '0'; -- V flag for division`
84			`signal R_SHC : slv6 := (others=>'0'); -- shift counter for div and ash/c`
85			`signal R_C1 : slbit := '0'; -- first cycle indicator`
86			`signal R_MSBO : slbit := '0'; -- original sign bit for ash/c`
87			`signal R_ASH_V : slbit := '0'; -- V flag for ash/c`
88			`signal R_ASH_C : slbit := '0'; -- C flag for ash/c`
89
90	27	wfjm	`signal N_DD_L : slv16 := (others=>'0');`
91			`signal N_DDO_LT : slbit := '0';`
92			`signal N_MAXFIX : slbit := '0';`
93			`signal N_QO_LT : slbit := '0';`
94			`signal N_DIV_V : slbit := '0';`
95			`signal N_SHC : slv6 := (others=>'0');`
96			`signal N_C1 : slbit := '0';`
97			`signal N_MSBO : slbit := '0';`
98			`signal N_ASH_V : slbit := '0';`
99			`signal N_ASH_C : slbit := '0';`
100	2	wfjm
101			`signal SHC_TC_L : slbit := '0';`
102
103			`signal DDST_ZERO : slbit := '0';`
104	25	wfjm	`signal DDST_NMAX : slbit := '0';`
105	2	wfjm	`signal DSRC_ZERO : slbit := '0';`
106			`signal DSRC_ONES : slbit := '0';`
107			`signal DTMP_ZERO : slbit := '0';`
108	25	wfjm	`signal DTMP_POS : slbit := '0';`
109	2	wfjm
110			`signal DOUT_DIV : slv16 := (others=>'0');`
111			`signal DOUTE_DIV : slv16 := (others=>'0');`
112
113			`alias DR : slv16 is DDST; -- divisor (in DDST)`
114			`alias DD_H : slv16 is DSRC; -- divident, high order part (in DSRC)`
115			`alias Q : slv16 is DTMP; -- quotient (accumulated in DTMP)`
116
117			`begin`
118
119			`proc_regs: process (CLK)`
120			`begin`
121	13	wfjm	`if rising_edge(CLK) then`
122	27	wfjm	`R_DD_L <= N_DD_L;`
123			`R_DDO_LT <= N_DDO_LT;`
124			`R_MAXFIX <= N_MAXFIX;`
125			`R_QO_LT <= N_QO_LT;`
126			`R_DIV_V <= N_DIV_V;`
127			`R_SHC <= N_SHC;`
128			`R_C1 <= N_C1;`
129			`R_MSBO <= N_MSBO;`
130			`R_ASH_V <= N_ASH_V;`
131			`R_ASH_C <= N_ASH_C;`
132	2	wfjm	`end if;`
133			`end process proc_regs;`
134
135			`proc_comm: process (DDST, DSRC, DTMP)`
136			`begin`
137
138			`DDST_ZERO <= '0';`
139	25	wfjm	`DDST_NMAX <= '0';`
140	2	wfjm	`DSRC_ZERO <= '0';`
141			`DSRC_ONES <= '0';`
142			`DTMP_ZERO <= '0';`
143	25	wfjm	`DTMP_POS <= '0';`
144	2	wfjm
145			`if unsigned(DDST) = 0 then`
146			`DDST_ZERO <= '1';`
147			`end if;`
148	25	wfjm	`if DDST = "1000000000000000" then`
149			`DDST_NMAX <= '1';`
150			`end if;`
151	2	wfjm	`if unsigned(DSRC) = 0 then`
152			`DSRC_ZERO <= '1';`
153			`end if;`
154			`if signed(DSRC) = -1 then`
155			`DSRC_ONES <= '1';`
156			`end if;`
157			`if unsigned(DTMP) = 0 then`
158			`DTMP_ZERO <= '1';`
159			`end if;`
160	25	wfjm	`if signed(DTMP) > 0 then`
161			`DTMP_POS <= '1';`
162			`end if;`
163	2	wfjm
164			`end process proc_comm;`
165
166			`proc_shc: process (DDST, R_SHC, R_C1,`
167			`S_DIV, S_DIV_CN, S_ASH, S_ASH_CN, S_ASHC, S_ASHC_CN)`
168			`begin`
169
170	27	wfjm	`N_SHC <= R_SHC;`
171			`N_C1 <= R_C1;`
172	2	wfjm
173			`if S_ASH='1' or S_ASHC='1' then`
174	27	wfjm	`N_SHC <= DDST(5 downto 0);`
175			`N_C1 <= '1';`
176	2	wfjm	`end if;`
177			`if S_DIV = '1' then`
178	27	wfjm	`N_SHC <= "001111";`
179			`N_C1 <= '1';`
180	2	wfjm	`end if;`
181
182			`if S_DIV_CN='1' or S_ASH_CN='1' or S_ASHC_CN='1' then`
183			`if R_SHC(5) = '0' then`
184	27	wfjm	`N_SHC <= slv(unsigned(R_SHC) - 1);`
185	2	wfjm	`else`
186	27	wfjm	`N_SHC <= slv(unsigned(R_SHC) + 1);`
187	2	wfjm	`end if;`
188	27	wfjm	`N_C1 <= '0';`
189	2	wfjm	`end if;`
190
191			`SHC_TC_L <= '0';`
192			`if unsigned(R_SHC) = 0 then`
193			`SHC_TC_L <= '1';`
194			`end if;`
195
196			`end process proc_shc;`
197
198			`proc_div: process (DDST, DSRC, DTMP, GPR_DSRC, DR, DD_H, Q,`
199	25	wfjm	`R_DD_L, R_DDO_LT, R_MAXFIX, R_QO_LT, R_DIV_V, R_SHC, R_C1,`
200			`S_DIV, S_DIV_CN, S_DIV_CR, S_DIV_SR,`
201			`DDST_ZERO, DDST_NMAX, DSRC_ZERO, DTMP_ZERO, DTMP_POS)`
202
203			`variable div_zero : slbit := '0';`
204			`variable div_ovfl : slbit := '0';`
205	2	wfjm	`variable shftdd : slbit := '0';`
206			`variable subadd : slbit := '0';`
207
208	25	wfjm	`variable dd_le : slbit := '0';`
209			`variable dd_ge : slbit := '0';`
210	2	wfjm	`variable dd_gt : slbit := '0';`
211
212			`variable qbit : slbit := '0';`
213			`variable qbit_1 : slbit := '0';`
214			`variable qbit_n : slbit := '0';`
215
216			`variable dd_h_old : slv16 := (others=>'0'); -- dd_h before add/sub`
217			`variable dd_h_new : slv16 := (others=>'0'); -- dd_h after add/sub`
218
219			`begin`
220
221	27	wfjm	`N_DD_L <= R_DD_L;`
222			`N_DDO_LT <= R_DDO_LT;`
223			`N_MAXFIX <= R_MAXFIX;`
224			`N_QO_LT <= R_QO_LT;`
225			`N_DIV_V <= R_DIV_V;`
226	2	wfjm
227	25	wfjm	`div_zero := '0';`
228			`div_ovfl := '0';`
229	2	wfjm
230			`qbit_1 := not (DR(15) xor DD_H(15)); -- !(dr<0 ^ dd_h<0)`
231
232			`shftdd := not S_DIV_CR;`
233			`if shftdd = '1' then`
234			`dd_h_old := DD_H(14 downto 0) & R_DD_L(15);`
235			`else`
236			`dd_h_old := DD_H(15 downto 0);`
237			`end if;`
238
239			`if R_C1 = '1' then`
240			`subadd := qbit_1;`
241			`else`
242			`subadd := Q(0);`
243			`end if;`
244
245			`if subadd = '0' then`
246	13	wfjm	`dd_h_new := slv(signed(dd_h_old) + signed(DR));`
247	2	wfjm	`else`
248	13	wfjm	`dd_h_new := slv(signed(dd_h_old) - signed(DR));`
249	2	wfjm	`end if;`
250
251	25	wfjm	`dd_le := '0';`
252			`if signed(dd_h_new) <= 0 then`
253			`dd_le := '1'; -- set if dd_new_h <= 0`
254			`end if;`
255
256			`dd_ge := '0';`
257			`if signed(dd_h_new) >= -1 then`
258			`dd_ge := '1'; -- set if dd_new_h >= -1`
259			`end if;`
260
261	2	wfjm	`dd_gt := '0';`
262			`if dd_h_new(15) = '0' and`
263			`(unsigned(dd_h_new(14 downto 0))/=0 or`
264			`unsigned(R_DD_L(14 downto 0))/=0)`
265			`then`
266			`dd_gt := '1'; -- set if dd_new > 0`
267			`end if;`
268
269			`if R_DDO_LT = '0' then`
270			`qbit_n := DR(15) xor not dd_h_new(15); -- b_dr_lt ^ !b_dd_lt`
271			`else`
272	25	wfjm	`if R_MAXFIX = '0' then`
273			`qbit_n := DR(15) xor dd_gt; -- b_dr_lt ^ b_dd_gt`
274			`else`
275			`qbit_n := dd_h_new(15); -- b_dd_lt`
276			`end if;`
277	2	wfjm	`end if;`
278
279			`if S_DIV = '1' then`
280	27	wfjm	`N_DDO_LT <= DD_H(15);`
281			`N_DD_L <= GPR_DSRC;`
282			`N_MAXFIX <= '0';`
283	25	wfjm	`if DDST_NMAX = '1' and GPR_DSRC = "0000000000000000" then`
284	27	wfjm	`N_MAXFIX <= '1'; -- b_dr_nmax && (ddi_l == 0)`
285	25	wfjm	`end if;`
286	27	wfjm	`N_QO_LT <= DD_H(15) xor DR(15); -- b_di_lt ^ b_dr_lt`
287	2	wfjm	`end if;`
288
289			`if R_C1 = '1' then`
290	25	wfjm	`div_zero := DDST_ZERO or`
291			`(DSRC_ZERO and DTMP_ZERO); -- note: DTMP here still dd_low !`
292
293			`if DDST_NMAX='0' and (DD_H(15) xor DD_H(14)) = '1' then`
294			`div_ovfl := '1'; -- !b_dr_nmax && (b_di_31 != b_di_30)`
295			`end if;`
296
297			`if R_DDO_LT = '0' then -- if (!b_di_lt)`
298			`if R_QO_LT = '0' then -- if (!b_qo_lt)`
299			`if dd_h_new(15) = '0' then -- if (!b_dd_lt)`
300			`div_ovfl := '1';`
301			`end if;`
302			`else -- else`
303			`if dd_le = '0' then -- if (!b_dd_le)`
304			`div_ovfl := '1';`
305			`end if;`
306			`end if;`
307			`else`
308			`if R_QO_LT = '0' then -- if (!b_qo_lt)`
309			`if dd_gt = '0' then -- if (!b_dd_gt)`
310			`div_ovfl := '1';`
311			`end if;`
312			`else -- else`
313			`if dd_ge = '0' then -- if (!b_dd_ge)`
314			`div_ovfl := '1';`
315			`end if;`
316			`end if;`
317			`end if;`
318	27	wfjm	`N_DIV_V <= div_ovfl;`
319	25	wfjm
320			`elsif S_DIV_SR = '1' then`
321			`if R_QO_LT='1' and DTMP_POS='1' then`
322			`div_ovfl := '1';`
323			`end if;`
324	27	wfjm	`N_DIV_V <= div_ovfl;`
325	2	wfjm	`end if;`
326
327			`if S_DIV_CN = '1' then`
328	27	wfjm	`N_DD_L <= R_DD_L(14 downto 0) & '0';`
329	2	wfjm	`end if;`
330
331			`if S_DIV_CN = '1' then`
332			`qbit := qbit_n;`
333			`else`
334			`qbit := qbit_1;`
335			`end if;`
336
337	25	wfjm	`DIV_QUIT <= div_zero or div_ovfl;`
338	2	wfjm
339	25	wfjm	`DIV_CR <= R_MAXFIX or -- b_maxfix \| (!(b_ddo_lt ^ (b_dr_lt ^ b_qbit)))`
340			`(not (R_DDO_LT xor (DR(15) xor Q(0))));`
341			`DIV_CQ <= R_MAXFIX or -- b_maxfix \| (b_ddo_lt ^ b_dr_lt)`
342			`(R_DDO_LT xor DR(15));`
343
344	2	wfjm	`DOUT_DIV <= dd_h_new;`
345			`DOUTE_DIV <= Q(14 downto 0) & qbit;`
346
347			`end process proc_div;`
348
349			`proc_ash: process (R_MSBO, R_ASH_V, R_ASH_C, R_SHC, DSRC, DTMP, FUNC,`
350			`S_ASH, S_ASH_CN, S_ASHC, S_ASHC_CN, SHC_TC_L)`
351			`begin`
352
353	27	wfjm	`N_MSBO <= R_MSBO;`
354			`N_ASH_V <= R_ASH_V;`
355			`N_ASH_C <= R_ASH_C;`
356	2	wfjm
357			`if S_ASH='1' or S_ASHC='1' then`
358	27	wfjm	`N_MSBO <= DSRC(15);`
359			`N_ASH_V <= '0';`
360			`N_ASH_C <= '0';`
361	2	wfjm	`end if;`
362
363			`if (S_ASH_CN='1' or S_ASHC_CN='1') and SHC_TC_L='0' then`
364			`if R_SHC(5) = '0' then -- left shift`
365			`if (R_MSBO xor DSRC(14))='1' then`
366	27	wfjm	`N_ASH_V <= '1';`
367	2	wfjm	`end if;`
368	27	wfjm	`N_ASH_C <= DSRC(15);`
369	2	wfjm	`else -- right shift`
370	8	wfjm	`if FUNC = c_munit_func_ash then`
371	27	wfjm	`N_ASH_C <= DSRC(0);`
372	2	wfjm	`else`
373	27	wfjm	`N_ASH_C <= DTMP(0);`
374	2	wfjm	`end if;`
375			`end if;`
376			`end if;`
377
378			`end process proc_ash;`
379
380			`proc_omux: process (DSRC, DDST, DTMP, FUNC,`
381	25	wfjm	`R_ASH_V, R_ASH_C, R_SHC, R_DIV_V, R_QO_LT,`
382	2	wfjm	`DOUT_DIV, DOUTE_DIV,`
383			`DSRC_ZERO, DSRC_ONES, DTMP_ZERO, DDST_ZERO)`
384
385			`variable prod : slv32 := (others=>'0');`
386			`variable omux_sel : slv2 := "00";`
387			`variable ash_dout0 : slbit := '0';`
388
389			`variable mul_c : slbit := '0';`
390
391			`begin`
392
393	13	wfjm	`prod := slv(signed(DSRC) * signed(DDST));`
394	2	wfjm
395			`case FUNC is`
396	8	wfjm	`when c_munit_func_mul =>`
397	2	wfjm	`omux_sel := "00";`
398	8	wfjm	`when c_munit_func_div =>`
399	2	wfjm	`omux_sel := "01";`
400	8	wfjm	`when c_munit_func_ash \|c_munit_func_ashc =>`
401	2	wfjm	`if R_SHC(5) = '0' then`
402			`omux_sel := "10";`
403			`else`
404			`omux_sel := "11";`
405			`end if;`
406			`when others => null;`
407			`end case;`
408
409	8	wfjm	`if FUNC = c_munit_func_ash then`
410	2	wfjm	`ash_dout0 := '0';`
411			`else`
412			`ash_dout0 := DTMP(15);`
413			`end if;`
414
415			`case omux_sel is`
416			`when "00" => -- MUL`
417			`DOUT <= prod(31 downto 16);`
418			`DOUTE <= prod(15 downto 0);`
419			`when "01" => -- DIV`
420			`DOUT <= DOUT_DIV;`
421			`DOUTE <= DOUTE_DIV;`
422			`when "10" => -- shift left`
423			`DOUT <= DSRC(14 downto 0) & ash_dout0;`
424			`DOUTE <= DTMP(14 downto 0) & "0";`
425			`when "11" => -- shift right`
426			`DOUT <= DSRC(15) & DSRC(15 downto 1);`
427			`DOUTE <= DSRC(0) & DTMP(15 downto 1);`
428			`when others => null;`
429			`end case;`
430
431			`mul_c := '0'; -- MUL C codes is set if`
432			`if DSRC(15) = '0' then`
433			`if DSRC_ZERO='0' or DTMP(15)='1' then -- for positive results when`
434			`mul_c := '1'; -- product > 2^15-1`
435			`end if;`
436			`else -- for negative results when`
437			`if DSRC_ONES='0' or DTMP(15)='0' then`
438			`mul_c := '1'; -- product < -2^15`
439			`end if;`
440			`end if;`
441
442			`case FUNC is`
443	8	wfjm	`when c_munit_func_mul =>`
444	27	wfjm	`CCOUT(c_cc_f_n) <= DSRC(15); -- N`
445			`CCOUT(c_cc_f_z) <= DSRC_ZERO and DTMP_ZERO; -- Z`
446			`CCOUT(c_cc_f_v) <= '0'; -- V=0`
447			`CCOUT(c_cc_f_c) <= mul_c; -- C`
448	2	wfjm
449	8	wfjm	`when c_munit_func_div =>`
450	2	wfjm	`if DDST_ZERO = '1' then`
451	27	wfjm	`CCOUT(c_cc_f_n) <= '0'; -- N=0 if div/0`
452			`CCOUT(c_cc_f_z) <= '1'; -- Z=1 if div/0`
453	2	wfjm	`elsif R_DIV_V = '1' then`
454	27	wfjm	`CCOUT(c_cc_f_n) <= R_QO_LT; -- N (send expected sign)`
455			`CCOUT(c_cc_f_z) <= '0'; -- Z (from unchanged reg) ??? veri`
456	2	wfjm	`else`
457	27	wfjm	`CCOUT(c_cc_f_n) <= DTMP(15); -- N (from Q (DTMP))`
458			`CCOUT(c_cc_f_z) <= DTMP_ZERO; -- Z (from Q (DTMP)) ??? verify`
459	2	wfjm	`end if;`
460	27	wfjm	`CCOUT(c_cc_f_v) <= R_DIV_V or DDST_ZERO; -- V`
461			`CCOUT(c_cc_f_c) <= DDST_ZERO; -- C (dst=0)`
462	2	wfjm
463	8	wfjm	`when c_munit_func_ash =>`
464	27	wfjm	`CCOUT(c_cc_f_n) <= DSRC(15); -- N`
465			`CCOUT(c_cc_f_z) <= DSRC_ZERO; -- Z`
466			`CCOUT(c_cc_f_v) <= R_ASH_V; -- V`
467			`CCOUT(c_cc_f_c) <= R_ASH_C; -- C`
468	2	wfjm
469	8	wfjm	`when c_munit_func_ashc =>`
470	27	wfjm	`CCOUT(c_cc_f_n) <= DSRC(15); -- N`
471			`CCOUT(c_cc_f_z) <= DSRC_ZERO and DTMP_ZERO;-- Z`
472			`CCOUT(c_cc_f_v) <= R_ASH_V; -- V`
473			`CCOUT(c_cc_f_c) <= R_ASH_C; -- C`
474	2	wfjm
475			`when others => null;`
476			`end case;`
477
478			`end process proc_omux;`
479
480			`SHC_TC <= SHC_TC_L;`
481
482			`end syn;`

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