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[/] [w11/] [tags/] [w11a_V0.7/] [rtl/] [w11a/] [tb/] [tb_pdp11core_stim.dat] - Blame information for rev 27

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Line No.	Rev	Author	Line
1	27	wfjm	`# $Id: tb_pdp11core_stim.dat 614 2014-12-20 15:00:45Z mueller $`
2	2	wfjm	`#`
3			`# Revision History:`
4			`# Date Rev Version Comment`
5	27	wfjm	`# 2014-12-20 614 2.4 adopted to rlink v4`
6	25	wfjm	`# 2014-07-13 569 2.3 after ECO-026: correct test 31.1 wrong V=1 cases`
7			`# correct test 37.2: 2 V=1 cases have regs now updated`
8	2	wfjm	`# 2010-06-20 308 2.2.1 add wibrb, ribr, wibr based tests`
9			`# 2010-06-13 305 2.2 adopt to new rri address and function semantics`
10			`# 2009-11-22 252 2.1.14 change SSR0 expects, adapt to ECO-021.`
11			`# 2009-05-02 211 2.1.13 add nop after spl in pirq test, 11/70 spl now !!`
12			`# 2008-08-29 163 2.1.12 add wtlam to harvest attn after sto in test 13`
13			`# 2008-04-27 139 2.1.11 adapt expected ssr1 after mtpi/d after ECO-009 fix`
14			`# 2008-03-15 125 2.1.10 exclude some tests from simh ([[off/on]]`
15			`# 2008-03-09 124 2.1.9 fixed addr-mode in code 34, shifted 47+50`
16			`# 2008-03-02 121 2.1.8 add meory access error tests`
17			`# add Code 13, testing WAIT and bwm/brm while CPU runs`
18			`# 2008-02-24 119 2.1.7 add tests for lah,rps,wps; use rps,wps`
19			`# use 22bit mode for nxm test (now needed!)`
20			`# 2008-02-23 118 2.1.6 for nxm tests use mmu and page below i/o-page`
21			`# in code 35 use access to 160000 to test trap`
22			`# 2007-09-23 84 2.1.5 use .reset to make it re-executable`
23			`# 2007-09-16 83 2.1.4 clear CPUERR in beginning of test 20 {runs in FPGA}`
24			`# 2007-09-02 79 2.1.3 add .mode command (for pi_rri use)`
25			`# 2007-08-25 75 2.1.2 add .cpmon/.rpmon (for use with rri)`
26			`# 2007-08-16 74 2.1.1 adapt to changed LAM handling`
27			`# 2007-08-12 73 2.1 use wtgo (revised conv_stim)`
28			`# 2007-08-03 71 2.0 convert to command mode with conv_stim`
29			`# 2007-07-08 65 1.2 removed 1st 'delay' parameter; use .to_(cmd\|stp\|go)`
30			`# 2007-06-10 51 1.1 consolidate w11a test bench`
31			`# 2007-05-13 29 1.0 initial version (imported)`
32			`#`
33			`.mode pdpcp`
34			`.tocmd 50`
35			`.tostp 100`
36			`.togo 5000`
37	9	wfjm	`.rlmon 0`
38	2	wfjm	`.rbmon 0`
39			`.scntl 13 0`
40			`#`
41			`.reset`
42			`.wait 10`
43			`.anena 1`
44			`#`
45			`C "Code 0" Some elementary initial tests`
46			`C write registers`
47			`#`
48			`wr0 000001 -- set r0,..,r7`
49			`wr1 000101 --`
50			`wr2 000201 --`
51			`wr3 000301 --`
52			`wr4 000401 --`
53			`wr5 000501 --`
54			`wsp 000601 --`
55			`wpc 000701 --`
56			`#`
57			`C read registers`
58			`#`
59			`rr0 d=000001 -- ! r0`
60			`rr1 d=000101 -- ! r1`
61			`rr2 d=000201 -- ! r2`
62			`rr3 d=000301 -- ! r3`
63			`rr4 d=000401 -- ! r4`
64			`rr5 d=000501 -- ! r5`
65			`rsp d=000601 -- ! sp`
66			`rpc d=000701 -- ! pc`
67			`#`
68			`C write memory`
69			`#`
70			`wal 002000 -- write mem(2000,...,2006)`
71			`bwm 4`
72			`007700 --`
73			`007710 --`
74			`007720 --`
75			`007730 --`
76			`#`
77			`C read memory`
78			`#`
79			`wal 002000`
80			`brm 4`
81			`d=007700 -- ! mem(2000)`
82			`d=007710 -- ! mem(2002)`
83			`d=007720 -- ! mem(2004)`
84			`d=007730 -- ! mem(2006)`
85			`#`
86			`C write/read PSW via various mechanisms`
87			`C via wps/rps`
88			`#`
89			`wps 000017`
90			`rps d=000017`
91			`wps 000000`
92			`rps d=000000`
93			`#`
94			`C via 16bit cp addressing (wal 177776)`
95			`#`
96			`wal 177776`
97			`wm 000017 -- set all cc flags in psw`
98			`rm d=000017 -- ! psw`
99			`rps d=000017`
100			`wm 000000 -- clear psw`
101			`rm d=000000 -- ! psw`
102			`rps d=000000`
103			`#`
104			`C via 22bit cp addressing (wal 177776; wah 177)`
105			`#`
106			`wal 177776`
107			`wah 000177`
108			`wm 000017 -- set all cc flags in psw`
109			`rm d=000017 -- ! psw`
110			`rps d=000017`
111			`wm 000000 -- clear psw`
112			`rm d=000000 -- ! psw`
113			`rps d=000000`
114			`#`
115			`C via ibr (ibrb 177700)`
116			`#`
117			`wibrb 177700`
118			`wibr 76 000017 -- set all cc flags in psw`
119			`ribr 76 d=000017 -- ! psw`
120			`rps d=000017`
121			`wibr 76 000000 -- set all cc flags in psw`
122			`ribr 76 d=000000 -- ! psw`
123			`rps d=000000`
124			`#`
125			`C write register set 1, sm,um stack`
126			`#`
127			`wps 004000 -- psw: cm=kernel, set=1`
128			`wr0 010001 -- set r0,..,r5 [[r10]]`
129			`wr1 010101 -- [[r11]]`
130			`wr2 010201 -- [[r12]]`
131			`wr3 010301 -- [[r13]]`
132			`wr4 010401 -- [[r14]]`
133			`wr5 010501 -- [[r15]]`
134			`wps 044000 -- psw: cm=super(01),set=1`
135			`wsp 010601 -- set ssp [[ssp]]`
136			`wps 144000 -- psw: cm=user(11),set=1`
137			`wsp 110601 -- set usp [[usp]]`
138			`#`
139			`C read all registers set 0/1, km,sm,um stack`
140			`#`
141			`wps 000000 -- psw: cm=kernel(00),set=0`
142			`rr0 d=000001 -- ! r0`
143			`rr1 d=000101 -- ! r1`
144			`rr2 d=000201 -- ! r2`
145			`rr3 d=000301 -- ! r3`
146			`rr4 d=000401 -- ! r4`
147			`rr5 d=000501 -- ! r5`
148			`rsp d=000601 -- ! ksp`
149			`rpc d=000701 -- ! pc`
150			`wps 040000 -- psw: cm=super(01),set=0`
151			`rsp d=010601 -- ! ssp [[ssp]]`
152			`wps 140000 -- psw: cm=user(11),set=0`
153			`rsp d=110601 -- ! usp [[usp]]`
154			`wps 144000 -- psw: cm=user(11),set=1`
155			`rr0 d=010001 -- ! r0 [[r10]]`
156			`rr1 d=010101 -- ! r1 [[r11]]`
157			`rr2 d=010201 -- ! r2 [[r12]]`
158			`rr3 d=010301 -- ! r3 [[r13]]`
159			`rr4 d=010401 -- ! r4 [[r14]]`
160			`rr5 d=010501 -- ! r5 [[r15]]`
161			`#`
162			`C write IB space: MMU SAR supervisor mode (16 bit regs)`
163			`#`
164			`wal 172240 -- set first three SM I space address regs`
165			`bwm 3`
166			`012340`
167			`012342`
168			`012344`
169			`#`
170			`C read IB space: MMU SAR supervisor mode (16 bit regs)`
171			`#`
172			`wal 172240 -- ! verify first three SM I space address regs`
173			`brm 3`
174			`d=012340`
175			`d=012342`
176			`d=012344`
177			`#`
178			`C read IB space via ibr: MMU SAR supervisor mode (16 bit regs)`
179			`#`
180			`wibrb 172200`
181			`ribr 40 d=012340`
182			`ribr 42 d=012342`
183			`ribr 44 d=012344`
184			`#`
185			`C byte write IB space via ibr: MMU SAR supervisor mode (16 bit regs)`
186			`#`
187			`wibrb 172201 -- write low byte`
188			`wibr 40 177000`
189			`wibr 42 177002`
190			`wibr 44 177004`
191			`wal 172240 -- ! verify`
192			`brm 3`
193			`d=012000`
194			`d=012002`
195			`d=012004`
196			`#`
197			`wibrb 172202 -- write high byte`
198			`wibr 40 000377`
199			`wibr 42 022377`
200			`wibr 44 044377`
201			`wal 172240 -- ! verify`
202			`brm 3`
203			`d=000000`
204			`d=022002`
205			`d=044004`
206			`#`
207			`wibrb 172203 -- write high and low byte (both be set)`
208			`wibr 40 012340`
209			`wibr 42 012342`
210			`wibr 44 012344`
211			`wal 172240 -- ! verify`
212			`brm 3`
213			`d=012340`
214			`d=012342`
215			`d=012344`
216			`#`
217			`#[[off]] - this tests cp not the cpu - meaningless in simh`
218			`#`
219			`C test access error handling to memory (use 17740000)`
220			`C with wm/rm`
221			`#`
222			`wal 140000`
223			`wah 000177`
224			`.merr 1`
225	27	wfjm	`.sdef s=01000001`
226	2	wfjm	`wm 000000`
227			`rm d=-`
228			`.merr 0`
229			`.sdef s=00000000,01110000`
230			`#`
231			`C with bwm/brm`
232			`#`
233			`wal 140000`
234			`wah 000177`
235			`.merr 1`
236	27	wfjm	`.sdef s=01000001`
237	2	wfjm	`bwm 2`
238			`000000`
239			`000000`
240			`.merr 0`
241			`.sdef s=00000000,01110000`
242			`#`
243			`wal 140000`
244			`wah 000177`
245			`.merr 1`
246	27	wfjm	`.sdef s=01000001`
247	2	wfjm	`brm 2`
248			`d=-`
249			`d=-`
250			`.merr 0`
251			`.sdef s=00000000,01110000`
252			`#`
253			`C test access error handling to IB space (use 00160000)`
254			`C with wm/rm`
255			`wal 160000`
256			`.merr 1`
257	27	wfjm	`.sdef s=01000001`
258	2	wfjm	`wm 000000`
259			`rm d=-`
260			`.merr 0`
261			`.sdef s=00000000,01110000`
262			`C with bwm/brm`
263			`#`
264			`wal 160000`
265			`.merr 1`
266	27	wfjm	`.sdef s=01000001`
267	2	wfjm	`bwm 2`
268			`000000`
269			`000000`
270			`.merr 0`
271			`.sdef s=00000000,01110000`
272			`#`
273			`wal 160000`
274			`.merr 1`
275	27	wfjm	`.sdef s=01000001`
276	2	wfjm	`brm 2`
277			`d=-`
278			`d=-`
279			`.merr 0`
280			`.sdef s=00000000,01110000`
281			`#[[on]]`
282			`#-----------------------------------------------------------------------------`
283			`C Setup trap catchers`
284			`#`
285			`wal 000004 -- vectors: 4...34 (trap catcher)`
286			`bwm 14`
287			`000006 -- PC:06 ; vector 4`
288			`000000 -- PS:0`
289			`000012 -- PC:12 ; vector 10`
290			`000000 -- PS:0`
291			`000016 -- PC:16 ; vector 14 (T bit; BPT)`
292			`000000 -- PS:0`
293			`000022 -- PC:22 ; vector 20 (IOT)`
294			`000000 -- PS:0`
295			`000026 -- PC:26 ; vector 24 (Power fail, not used)`
296			`000000 -- PS:0`
297			`000032 -- PC:32 ; vector 30 (EMT)`
298			`000000 -- PS:0`
299			`000036 -- PC:36 ; vector 34 (TRAP)`
300			`000000 -- PS:0`
301			`wal 000240 -- vectors: 240,244,250 (trap catcher)`
302			`bwm 6`
303			`000242 -- PC:242 ; vector 240 (PIRQ)`
304			`000000 -- PS:0`
305			`000246 -- PC:246 ; vector 244 (FPU)`
306			`000000 -- PS:0`
307			`000252 -- PC:252 ; vector 250 (MMU)`
308			`000000 -- PS:0`
309			`#`
310			`C Setup MMU`
311			`#`
312			`wal 172300 -- kernel I space DR`
313			`bwm 8`
314			`077406 -- slf=127; ed=0(up); acf=6(w/r)`
315			`077406 -- slf=127; ed=0(up); acf=6(w/r)`
316			`077406 -- slf=127; ed=0(up); acf=6(w/r)`
317			`077406 -- slf=127; ed=0(up); acf=6(w/r)`
318			`077406 -- slf=127; ed=0(up); acf=6(w/r)`
319			`077406 -- slf=127; ed=0(up); acf=6(w/r)`
320			`077406 -- slf=127; ed=0(up); acf=6(w/r)`
321			`077406 -- slf=127; ed=0(up); acf=6(w/r)`
322			`wal 172340 -- kernel I space AR`
323			`bwm 8`
324			`000000 -- 0`
325			`000200 -- 200 020000 base`
326			`000400 -- 400 040000 base`
327			`000600 -- 600 060000 base`
328			`001000 -- 1000 100000 base`
329			`001200 -- 1200 120000 base`
330			`001400 -- 1400 140000 base`
331			`177600 -- 176000 (map to I/O page)`
332			`#-----------------------------------------------------------------------------`
333			`C Setup code 1 [base 2100] (very basics: cont,start; 'simple' instructions)`
334			`#`
335			`wal 002100 -- code test 1: (sec+clc+halt)`
336			`bwm 3`
337			`000261 -- sec`
338			`000250 -- cln`
339			`000000 -- halt`
340			`#-----`
341			`wal 002120 -- code test 2: (4 *inc R2, starting from -2)`
342			`bwm 5`
343			`005202 -- inc r2`
344			`005202 -- inc r2`
345			`005202 -- inc r2`
346			`005202 -- inc r2`
347			`#2130`
348			`000000 -- halt`
349			`#-----`
350			`wal 002140 -- code test 3: (dec r3; bne -2; halt)`
351			`bwm 3`
352			`005303 -- dec r3`
353			`001376 -- bne -2`
354			`000000 -- halt`
355			`#-----`
356			`wal 002160 -- code test 4: (inc r1; sob r0,-2; halt)`
357			`bwm 3`
358			`005201 -- inc r1`
359			`077002 -- sob r0,-2`
360			`000000 -- halt`
361			`#`
362			`C Exec code 1 (very basics: cont,start; 'simple' instructions)`
363			`C Exec test 1.1 (sec+clc+halt)`
364			`#`
365			`wpc 002100 -- pc=2100`
366			`wps 000010 -- psw: set N flag`
367			`cont -- cont @ 2100`
368			`wtgo`
369			`rpc d=002106 -- ! pc`
370			`rps d=000001 -- ! N cleared, C set now`
371			`#`
372			`C Exec test 1.2 (4 *inc R2, starting from -2)`
373			`#`
374			`wr2 177776 -- r2=-2`
375			`stapc 002120 -- start @ 2120`
376			`wtgo`
377			`rr2 d=000002 -- ! r2=2`
378			`rpc d=002132 -- ! pc`
379			`#`
380			`C Exec test 1.3 (dec r3; bne -2; halt)`
381			`#`
382			`wr3 000002 -- r3=2`
383			`stapc 002140 -- start @ 2140`
384			`wtgo`
385			`rr3 d=000000 -- ! r3=0`
386			`rpc d=002146 -- ! pc`
387			`#`
388			`C Exec test 1.4 (inc r1; sob r0,-2; halt)`
389			`#`
390			`wr0 000002 -- r0=2`
391			`wr1 000000 -- r1=0`
392			`stapc 002160 -- start @ 2160`
393			`wtgo`
394			`rr0 d=000000 -- ! r0=0`
395			`rr1 d=000002 -- ! r1=2`
396			`rpc d=002166 -- ! pc`
397			`#-----------------------------------------------------------------------------`
398			`C Setup code 2 [base 2200] (bpt against trap catcher @14)`
399			`#`
400			`wal 002200 -- code:`
401			`bwm 4`
402			`000257 -- cl(nzvc)`
403			`000261 -- sec`
404			`000003 -- bpt`
405			`000000 -- halt`
406			`#`
407			`C Exec code 2 (bpt against trap catcher @14)`
408			`#`
409			`wsp 001400 -- sp=1400`
410			`stapc 002200 -- start @ 2200`
411			`wtgo`
412			`rsp d=001374 -- ! sp`
413			`rpc d=000020 -- ! pc`
414			`wal 001374`
415			`brm 2`
416			`d=002206 -- ! (sp) old pc`
417			`d=000341 -- ! 2(sp) old ps`
418			`#-----------------------------------------------------------------------------`
419			`C Setup code 3 [base 2300] (bpt against trap handler doing inc r0; rtt)`
420			`#`
421			`wal 002300 -- code:`
422			`bwm 4`
423			`000257 -- cl(nzvc)`
424			`000003 -- bpt`
425			`005201 -- inc r1`
426			`000000 -- halt`
427			`wal 000014 -- vector: 14`
428			`bwm 2`
429			`002320 -- PC:2320`
430			`000002 -- PS:2`
431			`wal 002320 -- code (trap 14):`
432			`bwm 3`
433			`005200 -- inc r0`
434			`000006 -- rtt`
435			`000000 -- halt`
436			`#`
437			`C Exec code 3 (bpt against trap handler doing inc r0; rtt)`
438			`#`
439			`wr0 000000 -- r0=0`
440			`wr1 000000 -- r1=0`
441			`wsp 001400 -- sp=1400`
442			`stapc 002300 -- start @ 2300`
443			`wtgo`
444			`rr0 d=000001 -- ! r0`
445			`rr1 d=000001 -- ! r1`
446			`rsp d=001400 -- ! sp`
447			`rpc d=002310 -- ! pc`
448			`#-----------------------------------------------------------------------------`
449			`C Setup code 4 [base 2400] (enable T-trap on handler of code 3; run 2* inc r1)`
450			`#`
451			`wal 002400`
452			`bwm 4`
453			`000006 -- rtt`
454			`005201 -- inc r1`
455			`005201 -- inc r1`
456			`000000 -- halt`
457			`#`
458			`C Exec code 4 (enable T-trap on handler of code 3; run 2* inc r1)`
459			`#`
460			`wr0 000000 -- r0=0`
461			`wr1 000000 -- r1=0`
462			`wsp 001374 -- sp=1374`
463			`wal 001374 -- setup stack with rtt return frame setting T flag`
464			`bwm 2`
465			`002402 -- start address`
466			`000020 -- set T flag in PSW`
467			`stapc 002400 -- start @ 2400 -> rtt -> 2402 from stack`
468			`wtgo`
469			`rr0 d=000002 -- ! r0`
470			`rr1 d=000002 -- ! r1`
471			`rsp d=001400 -- ! sp`
472			`rpc d=002410 -- ! pc`
473			`#`
474			`rst -- console reset (to clear T flag)`
475			`wal 000014 -- vector: 14 -> trap catcher again`
476			`bwm 2`
477			`000016 -- PC:16`
478			`000000 -- PS:0`
479			`#-----------------------------------------------------------------------------`
480			`C Setup code 5 [base 2500] (srcr modes: mov xxx,rn: (r0),(r0)+,-(r0),@(r0))`
481			`#`
482			`wal 002500 -- code:`
483			`bwm 6`
484			`011001 -- mov (r0),r1`
485			`012002 -- mov (r0)+,r2`
486			`012003 -- mov (r0)+,r3`
487			`014004 -- mov -(r0),r4`
488			`013005 -- mov @(r0)+,r5`
489			`000000 -- halt`
490			`#`
491			`wal 002540 -- data:`
492			`bwm 2`
493			`000070 --`
494			`002550 --`
495			`wal 002550 -- data:`
496			`bwm 2`
497			`000072 --`
498			`000074 --`
499			`#`
500			`C Exec code 5 (srcr modes: mov xxx,rn: (r0),(r0)+,-(r0),@(r0))`
501			`#`
502			`wr0 002540 -- r0=2540`
503			`wr1 000000 -- r1=0`
504			`wr2 000000 -- r2=0`
505			`wr3 000000 -- r3=0`
506			`wr4 000000 -- r4=0`
507			`wr5 000000 -- r5=0`
508			`wsp 001400 -- sp=1400`
509			`stapc 002500 -- start @ 2500`
510			`wtgo`
511			`rr0 d=002544 -- ! r0`
512			`rr1 d=000070 -- ! r1`
513			`rr2 d=000070 -- ! r2`
514			`rr3 d=002550 -- ! r3`
515			`rr4 d=002550 -- ! r4`
516			`rr5 d=000072 -- ! r5`
517			`rsp d=001400 -- ! sp`
518			`rpc d=002514 -- ! pc`
519			`#-----------------------------------------------------------------------------`
520			`C Setup code 6 [base 2600] (srcr modes: mov xxx,rn: x(r0),@x(r0), pc modes)`
521			`#`
522			`wal 002600 -- code:`
523			`bwm 11`
524			`016001 -- mov 2(r0),r1`
525			`000002`
526			`017002 -- mov @2(r0),r2`
527			`000002`
528			`012703 -- mov (pc)+,r3 ; #377`
529			`000377`
530			`013704 -- mov @(pc)+,r4 ; @#2552 (in previous code !)`
531			`002552`
532			`#2620`
533			`112705 -- movb (pc)+,r5 ; #377`
534			`000377`
535			`000000 -- halt`
536			`#`
537			`C Exec code 6 (srcr modes: mov xxx,rn: x(r0),@x(r0), pc modes)`
538			`#`
539			`wr0 002540 -- r0=2540 (in previous code !)`
540			`wr1 000000 -- r1=0`
541			`wr2 000000 -- r2=0`
542			`wr3 000000 -- r3=0`
543			`wr4 000000 -- r4=0`
544			`wr5 000000 -- r5=0`
545			`wsp 001400 -- sp=1400`
546			`stapc 002600 -- start @ 2600`
547			`wtgo`
548			`rr0 d=002540 -- ! r0`
549			`rr1 d=002550 -- ! r1`
550			`rr2 d=000072 -- ! r2`
551			`rr3 d=000377 -- ! r3`
552			`rr4 d=000074 -- ! r4`
553			`rr5 d=177777 -- ! r5`
554			`rsp d=001400 -- ! sp`
555			`rpc d=002626 -- ! pc`
556			`#-----------------------------------------------------------------------------`
557			`C Setup code 7 [base 2700] (dstw modes: mov rn,xxx: all non-r modes)`
558			`#`
559			`wal 002700 -- code:`
560			`bwm 18`
561			`012710 -- mov #110,(r0) (to 2750)`
562			`000110`
563			`012721 -- mov #120,(r1)+ (to 2752)`
564			`000120`
565			`012732 -- mov #130,@(r2)+ (to 2754)`
566			`000130`
567			`012743 -- mov #140,-(r3) (to 2756)`
568			`000140`
569			`#2720`
570			`012754 -- mov #150,@-(r4) (to 2760)`
571			`000150`
572			`012760 -- mov #160,12(r0) (to 2762)`
573			`000160`
574			`000012`
575			`012770 -- mov #170,@24(r0) (to 2764)`
576			`000170`
577			`000024`
578			`#2740`
579			`010546 -- mov r5,-(r6)`
580			`000000 -- halt`
581			`#`
582			`wal 002770 -- data:`
583			`bwm 3`
584			`002754 -- mem(2770)=2754`
585			`002760 -- mem(2772)=2760`
586			`002764 -- mem(2774)=2764`
587			`#`
588			`C Exec code 7 (dstw modes: mov rn,xxx: all non-r modes)`
589			`#`
590			`wr0 002750 -- r0=2750`
591			`wr1 002752 -- r1=2752`
592			`wr2 002770 -- r2=2770`
593			`wr3 002760 -- r3=2760`
594			`wr4 002774 -- r4=2774`
595			`wr5 000666 -- r5=666`
596			`wsp 001400 -- sp=1400`
597			`stapc 002700 -- start @ 2700`
598			`wtgo`
599			`rr0 d=002750 -- ! r0`
600			`rr1 d=002754 -- ! r1`
601			`rr2 d=002772 -- ! r2`
602			`rr3 d=002756 -- ! r3`
603			`rr4 d=002772 -- ! r4`
604			`rr5 d=000666 -- ! r5`
605			`rsp d=001376 -- ! sp`
606			`rpc d=002744 -- ! pc`
607			`wal 002750`
608			`brm 7`
609			`d=000110 -- ! mem(2750)=110`
610			`d=000120 -- ! mem(2752)=120`
611			`d=000130 -- ! mem(2754)=130`
612			`d=000140 -- ! mem(2756)=140`
613			`d=000150 -- ! mem(2760)=150`
614			`d=000160 -- ! mem(2762)=160`
615			`d=000170 -- ! mem(2764)=170`
616			`wal 001376`
617			`rmi d=000666 -- ! mem(sp)=666`
618			`#-----------------------------------------------------------------------------`
619			`C Setup code 10 [base 3000] (dstm modes: inc xxx: all non-r modes)`
620			`#`
621			`wal 003000 -- code:`
622			`bwm 10`
623			`005210 -- inc (r0) (to 3050)`
624			`005221 -- inc (r1)+ (to 3052)`
625			`005232 -- inc @(r2)+ (to 3054)`
626			`005243 -- inc -(r3) (to 3056)`
627			`005254 -- inc @-(r4) (to 3060)`
628			`005260 -- inc 12(r0) (to 3062)`
629			`000012`
630			`005270 -- inc @24(r0) (to 3064)`
631			`#3020`
632			`000024`
633			`000000 -- halt`
634			`#`
635			`wal 003050 -- data:`
636			`bwm 7`
637			`000110 -- mem(3050)=110`
638			`000120 -- mem(3052)=120`
639			`000130 -- mem(3054)=130`
640			`000140 -- mem(3056)=140`
641			`000150 -- mem(3060)=150`
642			`000160 -- mem(3062)=160`
643			`000170 -- mem(3064)=170`
644			`wal 003070 -- data:`
645			`bwm 3`
646			`003054 -- mem(3070)=3054`
647			`003060 -- mem(3072)=3060`
648			`003064 -- mem(3074)=3064`
649			`#`
650			`C Exec code 10 (dstm modes: inc xxx: all non-r modes)`
651			`#`
652			`wr0 003050 -- r0=3050`
653			`wr1 003052 -- r1=3052`
654			`wr2 003070 -- r2=3070`
655			`wr3 003060 -- r3=3060`
656			`wr4 003074 -- r4=3074`
657			`wsp 001400 -- sp=1400`
658			`stapc 003000 -- start @ 3000`
659			`wtgo`
660			`rr0 d=003050 -- ! r0`
661			`rr1 d=003054 -- ! r1`
662			`rr2 d=003072 -- ! r2`
663			`rr3 d=003056 -- ! r3`
664			`rr4 d=003072 -- ! r4`
665			`rpc d=003024 -- ! pc`
666			`wal 003050`
667			`brm 7`
668			`d=000111 -- ! mem(3050)=111`
669			`d=000121 -- ! mem(3052)=121`
670			`d=000131 -- ! mem(3054)=131`
671			`d=000141 -- ! mem(3056)=141`
672			`d=000151 -- ! mem(3060)=151`
673			`d=000161 -- ! mem(3062)=161`
674			`d=000171 -- ! mem(3064)=171`
675			`#-----------------------------------------------------------------------------`
676			`C Setup code 11 [base 3100; use 31-32] (dsta modes: jsr pc,xxx: all non-r modes)`
677			`#`
678			`wal 003100 -- code:`
679			`bwm 10`
680			`004710 -- jsr pc,(r0) (to 3210) r0->3210`
681			`004721 -- jsr pc,(r1)+ (to 3220) r1->3220`
682			`004732 -- jsr pc,@(r2)+ (to 3230) r2->3140->3230`
683			`004743 -- jsr pc,-(r3) (to 3240) r3->3242`
684			`004754 -- jsr pc,@-(r4) (to 3250) r4->3142->3250`
685			`004760 -- jsr pc,50(r0) (to 3260) r0->3210+50->3260`
686			`000050`
687			`004770 -- jsr pc,@-44(r0) (to 3270) r0->3210-44->3144->3270`
688			`#3120`
689			`177734`
690			`000000 -- halt`
691			`#`
692			`wal 003140 -- data:`
693			`bwm 3`
694			`003230 -- mem(3140)=3230`
695			`003250 -- mem(3142)=3250`
696			`003270 -- mem(3144)=3270`
697			`#`
698			`wal 003210 -- code:`
699			`bwm 28`
700			`012725 -- mov #110,(r5)+`
701			`000110`
702			`000207 -- rts pc`
703			`000000 -- halt`
704			`#3220`
705			`012725 -- mov #120,(r5)+`
706			`000120`
707			`000207 -- rts pc`
708			`000000 -- halt`
709			`012725 -- mov #130,(r5)+`
710			`000130`
711			`000207 -- rts pc`
712			`000000 -- halt`
713			`#3240`
714			`012725 -- mov #140,(r5)+`
715			`000140`
716			`000207 -- rts pc`
717			`000000 -- halt`
718			`012725 -- mov #150,(r5)+`
719			`000150`
720			`000207 -- rts pc`
721			`000000 -- halt`
722			`#3260`
723			`012725 -- mov #160,(r5)+`
724			`000160`
725			`000207 -- rts pc`
726			`000000 -- halt`
727			`012725 -- mov #170,(r5)+`
728			`000170`
729			`000207 -- rts pc`
730			`000000 -- halt`
731			`#`
732			`C Exec code 11 (dsta modes: jsr pc,xxx: all non-r modes)`
733			`#`
734			`wr0 003210 -- r0=3210`
735			`wr1 003220 -- r1=3220`
736			`wr2 003140 -- r2=3140`
737			`wr3 003242 -- r3=3242`
738			`wr4 003144 -- r4=3144`
739			`wr5 003160 -- r5=3160`
740			`wsp 001400 -- sp=1400`
741			`stapc 003100 -- start @ 3100`
742			`wtgo`
743			`rr0 d=003210 -- ! r0=3210`
744			`rr1 d=003222 -- ! r1=3222`
745			`rr2 d=003142 -- ! r2=3142`
746			`rr3 d=003240 -- ! r3=3240`
747			`rr4 d=003142 -- ! r4=3142`
748			`rr5 d=003176 -- ! r5=3176`
749			`rsp d=001400 -- ! sp`
750			`rpc d=003124 -- ! pc`
751			`wal 003160`
752			`brm 7`
753			`d=000110 -- ! mem(3160)=110`
754			`d=000120 -- ! mem(3162)=120`
755			`d=000130 -- ! mem(3164)=130`
756			`d=000140 -- ! mem(3166)=140`
757			`d=000150 -- ! mem(3170)=150`
758			`d=000160 -- ! mem(3172)=160`
759			`d=000170 -- ! mem(3174)=170`
760			`#-----------------------------------------------------------------------------`
761			`C Setup code 12 [base 3300; use 33-34] (PSW access via sex,clx,spl,mov, and clr)`
762			`#`
763			`wal 003300 -- code:`
764			`bwm 23`
765			`011025 -- mov (r0),(r5)+`
766			`012710 -- mov #030000,(r0) ; write full PSW: pmode=um`
767			`030000`
768			`011025 -- mov (r0),(r5)+`
769			`000263 -- se(v,c)`
770			`011025 -- mov (r0),(r5)+`
771			`000237 -- spl 7`
772			`011025 -- mov (r0),(r5)+`
773			`#3320`
774			`000274 -- se(n,z)`
775			`011025 -- mov (r0),(r5)+`
776			`000233 -- spl 3`
777			`011025 -- mov (r0),(r5)+`
778			`000241 -- clc`
779			`011025 -- mov (r0),(r5)+`
780			`112710 -- movb #40,(r0) ; write PSW_low (set pri=1)`
781			`000040`
782			`#3340`
783			`011025 -- mov (r0),(r5)+`
784			`112711 -- movb #20,(r1) ; write PSW_high: pmode=sm`
785			`000020`
786			`011025 -- mov (r0),(r5)+`
787			`005010 -- clr (r0)`
788			`011025 -- mov (r0),(r5)+`
789			`000000 -- halt`
790			`#`
791			`C Exec code 12 (PSW access via sex,clx,spl,mov, and clr)`
792			`#`
793			`wps 000017 -- psw: set all condition codes (to check psw clear @ start)`
794			`#`
795			`wr0 177776 -- r0=177776`
796			`wr1 177777 -- r1=177777`
797			`wr5 003400 -- r5=3400`
798			`wsp 001400 -- sp=1400`
799			`stapc 003300 -- start @ 3300`
800			`wtgo`
801			`rr5 d=003424 -- ! r5=3424`
802			`rpc d=003356 -- ! pc`
803			`wal 003400`
804			`brm 10`
805			`d=000340 -- ! mem(3400) after start`
806			`d=030000 -- ! mem(3402) after mov #030000,(r0)`
807			`d=030003 -- ! mem(3404) after se(v,c) (VC)`
808			`d=030341 -- ! mem(3406) after spl 7 (pri=7,C)`
809			`d=030355 -- ! mem(3410) after se(n,z) (pri=7,NZC)`
810			`d=030141 -- ! mem(3412) after spl 3 (pri=3,C)`
811			`d=030140 -- ! mem(3414) after clc (pri=3)`
812			`d=030040 -- ! mem(3416) after movb #40,(r0) (pri=1)`
813			`d=010040 -- ! mem(3420) after movb #20,(r1) pmode=sm`
814			`d=000000 -- ! mem(3422) after clr (r0)`
815			`#-----------------------------------------------------------------------------`
816			`C Setup code 13 [base 3500] (test WAIT and rdma (bwm/rwm while CPU running)`
817			`#`
818			`#[[off]] - can't emulate 'sto' command in simh, rdma meaningless in simh`
819			`#`
820			`wal 003500 -- code 13.1 (to be stepped)`
821			`bwm 4`
822			`000001 -- wait`
823			`000001 -- wait`
824			`000001 -- wait`
825			`000000 -- halt`
826			`#`
827			`wal 003520 -- code 13.2 (busy loop)`
828			`bwm 3`
829			`005700 -- tst r0`
830			`001776 -- beq .-1`
831			`000000 -- halt`
832			`#`
833			`wal 003540 -- code 13.3 (just a WAIT)`
834			`bwm 2`
835			`000001 -- wait`
836			`000000 -- halt`
837			`#`
838			`C Exec code 13.1a (run WAIT)`
839			`#`
840			`stapc 003500 -- start @ 3500`
841			`.wait 20 -- let it go`
842			`rpc d=003502 -- ! should hang here ...`
843			`.wait 20 -- let it go`
844			`rpc d=003502 -- ! should hang here ...`
845	27	wfjm	`.sdef s=00001000`
846	2	wfjm	`sto`
847	27	wfjm	`.sdef s=00000000,01110000`
848	2	wfjm	`wtlam d=000001 -- harvest attn due to go 1->0 transition of sto command`
849			`rpc d=003502 -- ! should stay there ...`
850			`#`
851			`C Exec code 13.1b (step WAIT)`
852			`wpc 003500 -- pc=3500`
853			`step -- step over 1st WAIT`
854			`rpc d=003502 -- !`
855			`step -- step over 2nd WAIT`
856			`rpc d=003504 -- !`
857			`step -- step over 3rd WAIT`
858			`rpc d=003506 -- !`
859			`step -- step over HALT`
860			`rpc d=003510 -- !`
861			`#`
862			`C Exec code 13.2 (test bwm/brm while CPU busy looping)`
863			`wr0 000000 -- r0=0`
864			`stapc 003520 -- start @ 3520`
865			`#`
866			`wal 003560 -- write data while CPU active`
867			`bwm 8`
868			`003560`
869			`003562`
870			`003564`
871			`003566`
872			`003570`
873			`003572`
874			`003574`
875			`003576`
876			`wal 003560 -- read data while CPU active`
877			`brm 8`
878			`d=003560`
879			`d=003562`
880			`d=003564`
881			`d=003566`
882			`d=003570`
883			`d=003572`
884			`d=003574`
885			`d=003576`
886			`#`
887			`wr0 000001 -- r0=1 --> should end loop`
888			`wtgo`
889			`rpc d=003526 -- !`
890			`#`
891			`C Exec code 13.3 (test bwm/brm while CPU on WAIT)`
892			`#`
893			`stapc 003540 -- start @ 3540`
894			`#`
895			`wal 003560 -- write data while CPU active`
896			`bwm 8`
897			`073560`
898			`073562`
899			`073564`
900			`073566`
901			`073570`
902			`073572`
903			`073574`
904			`073576`
905			`wal 003560 -- read data while CPU active`
906			`brm 8`
907			`d=073560`
908			`d=073562`
909			`d=073564`
910			`d=073566`
911			`d=073570`
912			`d=073572`
913			`d=073574`
914			`d=073576`
915			`#`
916	27	wfjm	`.sdef s=00001000`
917	2	wfjm	`sto`
918	27	wfjm	`.sdef s=00000000,01110000`
919	2	wfjm	`wtlam d=000001 -- harvest attn due to go 1->0 transition of sto command`
920			`rpc d=003542 -- !`
921			`#[[on]]`
922			`#-----------------------------------------------------------------------------`
923			`# Setup code 14 --- code 14 doesn't exist anymore...`
924			`#-----------------------------------------------------------------------------`
925			`C Setup code 15 [base 3600; use 36-37] (test 4 traps)`
926			`#`
927			`wal 003600 -- code:`
928			`bwm 5`
929			`000003 -- bpt (to 14)`
930			`000004 -- iot (to 20)`
931			`104077 -- emt 77 (to 30)`
932			`104477 -- trap 77 (to 34)`
933			`000000 -- halt`
934			`#`
935			`wal 003620 -- code: trap handlers`
936			`bwm 11`
937			`010025 -- mov r0,(r5)+ (@ 3620)`
938			`000405 -- br .+10`
939			`010125 -- mov r1,(r5)+ (@ 3624)`
940			`000403 -- br .+6`
941			`010225 -- mov r2,(r5)+ (@ 3630)`
942			`000401 -- br .+2`
943			`010325 -- mov r3,(r5)+ (@ 3634)`
944			`#3640`
945			`011604 -- mov (sp),r4 ; r4 points after instruction`
946			`016425 -- mov -2(r4),(r5)+ ; load instruction`
947			`177776`
948			`000002 -- rti`
949			`#`
950			`wal 000014 -- vector: 14+20`
951			`bwm 4`
952			`003620 -- PC:3620`
953			`000000 -- PS:0`
954			`003624 -- PC:3624`
955			`000000 -- PS:0`
956			`wal 000030 -- vector: 30+34`
957			`bwm 4`
958			`003630 -- PC:3630`
959			`000000 -- PS:0`
960			`003634 -- PC:3634`
961			`000000 -- PS:0`
962			`#`
963			`C Exec code 15 (test 4 traps)`
964			`#`
965			`wr0 000011 -- r0=11`
966			`wr1 000022 -- r1=22`
967			`wr2 000033 -- r2=33`
968			`wr3 000044 -- r3=44`
969			`wr5 003700 -- r5=3700`
970			`wsp 001400 -- sp=140`
971			`stapc 003600 -- start @ 3600`
972			`wtgo`
973			`rr5 d=003720 -- ! r5=3720`
974			`rsp d=001400 -- ! sp`
975			`rpc d=003612 -- ! pc`
976			`wal 003700`
977			`brm 8`
978			`d=000011 -- ! mem(3700)=11`
979			`d=000003 -- ! mem(3702)=3`
980			`d=000022 -- ! mem(3704)=22`
981			`d=000004 -- ! mem(3706)=4`
982			`d=000033 -- ! mem(3710)=33`
983			`d=104077 -- ! mem(3712)=104077`
984			`d=000044 -- ! mem(3714)=44`
985			`d=104477 -- ! mem(3716)=104477`
986			`wal 000014 -- vector: 14+20 -> trap catcher again`
987			`bwm 4`
988			`000016 -- PC:16`
989			`000000 -- PS:0`
990			`000022 -- PC:22`
991			`000000 -- PS:0`
992			`wal 000030 -- vector: 30+34 -> trap catcher again`
993			`bwm 4`
994			`000032 -- PC:32`
995			`000000 -- PS:0`
996			`000036 -- PC:36`
997			`000000 -- PS:0`
998			`#-----------------------------------------------------------------------------`
999			`C Setup code 16 [base 4000] (enable MMU, check ssr1, ssr2 response)`
1000			`#`
1001			`wal 172516 -- SSR3`
1002			`wmi 000002 -- I/D enabled for sm only (to check CRESET)`
1003			`wal 177572 -- SSR0`
1004			`wmi 000001 -- set enable bit`
1005			`#`
1006			`wal 004000 -- code (to be single stepped...)`
1007			`bwm 7`
1008			`011105 -- mov (r1),r5`
1009			`012105 -- mov (r1)+,r5`
1010			`014105 -- mov -(r1),r5`
1011			`012122 -- mov (r1)+,(r2)+`
1012			`112105 -- movb (r1)+,r5`
1013			`112721 -- movb #200,(r1)+`
1014			`000200`
1015			`#`
1016			`wal 004030 -- code test 1:`
1017			`wmi 000000 -- halt`
1018			`#`
1019			`wal 004040 -- data:`
1020			`bwm 2`
1021			`000001`
1022			`000300`
1023			`#`
1024			`C Exec code 16 (enable MMU, check ssr1, ssr2 response)`
1025			`#`
1026			`wr1 004040 -- r1=4040`
1027			`wr2 004060 -- r2=4060`
1028			`wsp 001400 -- sp=1400`
1029			`wpc 004000 -- pc=4000`
1030			`step -- step (mov (r1),r5)`
1031			`wal 177572 -- check SSR0/1/2`
1032			`brm 3`
1033			`d=000001 -- ! SSR0: (ena=1)`
1034			`d=000000 -- ! SSR1:`
1035			`d=004000 -- ! SSR2: 4000 (eff. PC)`
1036			`rr1 d=004040 -- ! r1`
1037			`rr5 d=000001 -- ! r5`
1038			`step -- step (mov (r1)+,r5)`
1039			`wal 177572 -- check SSR0/1/2`
1040			`brm 3`
1041			`d=000001 -- ! SSR0: (ena=1)`
1042			`d=000021 -- ! SSR1: rb none; ra=1,+2`
1043			`d=004002 -- ! SSR2: 4002 (eff. PC)`
1044			`rr1 d=004042 -- ! r1`
1045			`rr5 d=000001 -- ! r5`
1046			`step -- step (mov -(r1),r5)`
1047			`wal 177572 -- check SSR0/1/2`
1048			`brm 3`
1049			`d=000001 -- ! SSR0: (ena=1)`
1050			`d=000361 -- ! SSR1: rb none; ra=1,-2`
1051			`d=004004 -- ! SSR2: 4004 (eff. PC)`
1052			`rr1 d=004040 -- ! r1`
1053			`rr5 d=000001 -- ! r5`
1054			`step -- step (mov (r1)+,(r2)+)`
1055			`wal 177572 -- check SSR0/1/2`
1056			`brm 3`
1057			`d=000001 -- ! SSR0: (ena=1)`
1058			`d=011021 -- ! SSR1: rb=2,2; ra=1,2`
1059			`d=004006 -- ! SSR2: 4006 (eff. PC)`
1060			`rr1 d=004042 -- ! r1`
1061			`rr2 d=004062 -- ! r2`
1062			`step -- step (movb (r1)+,r5)`
1063			`wal 177572 -- check SSR0/1/2`
1064			`brm 3`
1065			`d=000001 -- ! SSR0: (ena=1)`
1066			`d=000011 -- ! SSR1: rb=none; ra=1,1`
1067			`d=004010 -- ! SSR2: 4010 (eff. PC)`
1068			`rr1 d=004043 -- ! r1`
1069			`rr5 d=177700 -- ! r5`
1070			`step -- step (movb #200,(r1)+)`
1071			`wal 177572 -- check SSR0/1/2`
1072			`brm 3`
1073			`d=000001 -- ! SSR0: (ena=1)`
1074			`d=004427 -- ! SSR1: rb=1,1; ra=7,2`
1075			`d=004012 -- ! SSR2: 4012 (eff. PC)`
1076			`rr1 d=004044 -- ! r1`
1077			`#`
1078			`C Exec test 16.1 (check CRESET of PSW, SSR0, SSR3 after start)`
1079			`#`
1080			`wps 000000 -- psw: set pri=0`
1081			`stapc 004030 -- start @ 4030 (just HALT, testing console reset)`
1082			`wtgo`
1083			`rpc d=004032 -- ! pc=4032`
1084			`rps d=000340 -- ! psw: reset by CRESET`
1085			`wal 172516 -- SSR3`
1086			`rmi d=000000 -- ! cleared by CRESET`
1087			`wal 177572 -- SSR0`
1088			`rmi d=000000 -- ! cleared by CRESET`
1089			`#-----------------------------------------------------------------------------`
1090			`C Setup code 17 [base 4100; use 41-46] (basic instruction and cc test)`
1091			`#`
1092			`wal 004100 -- code: (length 70)`
1093			`bwm 32`
1094			`010124 -- mov r1,(r4)+ (#4711, #123456)`
1095			`020124 -- cmp r1,(r4)+ (#4711, #123456)`
1096			`020224 -- cmp r2,(r4)+ (#123456,#4711)`
1097			`020124 -- cmp r1,(r4)+ (#4711, #4711)`
1098			`005024 -- clr (r4)+ (#123456)`
1099			`030124 -- bit r1,(r4)+ (#4711, #11)`
1100			`030124 -- bit r1,(r4)+ (#4711, #66)`
1101			`040124 -- bic r1,(r4)+ (#4711, #123456)`
1102			`#4120`
1103			`050124 -- bis r1,(r4)+ (#4711, #123456)`
1104			`060124 -- add r1,(r4)+ (#4711, #123456)`
1105			`160124 -- sub r1,(r4)+ (#4711, #123456)`
1106			`005124 -- com (r4)+ (#123456)`
1107			`005224 -- inc (r4)+ (#123456)`
1108			`005324 -- dec (r4)+ (#123456)`
1109			`005424 -- neg (r4)+ (#123456)`
1110			`005724 -- tst (r4)+ (#123456)`
1111			`#4140`
1112			`006024 -- ror (r4)+ (#100201) Cin=0; Cout=1`
1113			`006024 -- ror (r4)+ (#002201) Cin=1; Cout=1`
1114			`006124 -- rol (r4)+ (#100200) Cin=1; Cout=1`
1115			`006224 -- asr (r4)+ (#200)`
1116			`006224 -- asr (r4)+ (#100200)`
1117			`006324 -- asl (r4)+ (#200)`
1118			`006324 -- asl (r4)+ (#100200)`
1119			`060124 -- add r1,(r4)+ (#4711, #077777)`
1120			`#4160`
1121			`005524 -- adc (r4)+ (#200)`
1122			`160124 -- sub r1,(r4)+ (#4711, #4700)`
1123			`005624 -- sbc (r4)+ (#200)`
1124			`000324 -- swap (r4)+ (#111000)`
1125			`006724 -- sxt (r4)+ (#111111 with N=1)`
1126			`074124 -- xor r1,(r4)+ (#070707,#4711)`
1127			`006724 -- sxt (r4)+ (#111111 with N=0)`
1128			`000000 -- halt`
1129			`#`
1130			`wal 000014 -- vector: 14`
1131			`bwm 2`
1132			`004270 -- PC:4270`
1133			`000000 -- PS:0`
1134			`#-----`
1135			`wal 004270 -- code: (trap 14):`
1136			`bwm 3`
1137			`016625 -- mov 2(sp),(r5)+`
1138			`000002`
1139			`000006 -- rtt`
1140			`#-----`
1141			`wal 004300 -- data 1: (length 66)`
1142			`bwm 31`
1143			`123456 --`
1144			`123456 --`
1145			`004711 --`
1146			`004711 --`
1147			`123456 --`
1148			`000011 --`
1149			`000066 --`
1150			`123456 --`
1151			`#4320`
1152			`123456 --`
1153			`123456 --`
1154			`123456 --`
1155			`123456 --`
1156			`123456 --`
1157			`123456 --`
1158			`123456 --`
1159			`123456 --`
1160			`#4340`
1161			`100201 --`
1162			`002201 --`
1163			`100200 --`
1164			`000200 --`
1165			`100200 --`
1166			`000200 --`
1167			`100200 --`
1168			`177000 --`
1169			`#4360`
1170			`000200 --`
1171			`004701 --`
1172			`000200 --`
1173			`111000 --`
1174			`111111 --`
1175			`070707 --`
1176			`111111 --`
1177			`#`
1178			`C Exec code 17 (basic instruction and cc test)`
1179			`#`
1180			`wr1 004711 -- r1=4711`
1181			`wr2 123456 -- r2=123456`
1182			`wr4 004300 -- r4=4300`
1183			`wr5 004500 -- r5=4500`
1184			`wsp 001374 -- sp=1374`
1185			`wal 001374 -- setup stack with rtt return frame setting T flag`
1186			`bwm 2`
1187			`004100 -- start address (code 17 @ 4100)`
1188			`000020 -- set T flag in PSW`
1189			`stapc 004274 -- start @ 4274 -> rtt -> 4100 from stack`
1190			`wtgo`
1191			`rr1 d=004711 -- ! r1=4711`
1192			`rr2 d=123456 -- ! r2=123456`
1193			`rr4 d=004376 -- ! r4=4376`
1194			`rr5 d=004576 -- ! r5=4576`
1195			`rsp d=001400 -- ! sp=1400`
1196			`rpc d=004200 -- ! pc=4200`
1197			`wal 004300`
1198			`brm 31`
1199			`d=004711 -- ! mem(4300)=004711; mov r1,(r4)+ (#4711, #123456)`
1200			`d=123456 -- ! mem(4302)=123456; cmp r1,(r4)+ (#4711, #123456)`
1201			`d=004711 -- ! mem(4304)=004711; cmp r1,(r4)+ (#123456,#4711)`
1202			`d=004711 -- ! mem(4306)=004711; cmp r1,(r4)+ (#4711, #4711)`
1203			`d=000000 -- ! mem(4310)=000000; clr (r4)+ (#123456)`
1204			`d=000011 -- ! mem(4312)=000011; bit r1,(r4)+ (#4711, #11)`
1205			`d=000066 -- ! mem(4314)=000066; bit r1,(r4)+ (#4711, #66)`
1206			`d=123046 -- ! mem(4316)=123046; bic r1,(r4)+ (#4711, #123456)`
1207			`d=127757 -- ! mem(4320)=127757; bis r1,(r4)+ (#4711, #123456)`
1208			`d=130367 -- ! mem(4322)=130367; add r1,(r4)+ (#4711, #123456)`
1209			`d=116545 -- ! mem(4324)=116545; sub r1,(r4)+ (#4711, #123456)`
1210			`d=054321 -- ! mem(4326)=054321; com (r4)+ (#123456)`
1211			`d=123457 -- ! mem(4330)=123457; inc (r4)+ (#123456)`
1212			`d=123455 -- ! mem(4332)=123455; dec (r4)+ (#123456)`
1213			`d=054322 -- ! mem(4334)=054322; neg (r4)+ (#123456)`
1214			`d=123456 -- ! mem(4336)=123456; tst (r4)+ (#123456)`
1215			`d=040100 -- ! mem(4340)=040100; ror (r4)+ (#100201)`
1216			`d=101100 -- ! mem(4342)=101100; ror (r4)+ (#002201)`
1217			`d=000401 -- ! mem(4344)=000401; rol (r4)+ (#100200)`
1218			`d=000100 -- ! mem(4346)=000100; asr (r4)+ (#200)`
1219			`d=140100 -- ! mem(4350)=140100; asr (r4)+ (#100200)`
1220			`d=000400 -- ! mem(4352)=000400; asl (r4)+ (#200)`
1221			`d=000400 -- ! mem(4354)=000400; asl (r4)+ (#100200)`
1222			`d=003711 -- ! mem(4356)=003711; add r1,(r4)+ (#4711, ,#177000)`
1223			`d=000201 -- ! mem(4360)=000201; adc (r4)+ (#200)`
1224			`d=177770 -- ! mem(4362)=177770; sub r1,(r4)+ (#4711, #4701)`
1225			`d=000177 -- ! mem(4364)=000177; sbc (r4)+ (#200)`
1226			`d=000222 -- ! mem(4366)=000222; swap (r4)+ (#111000)`
1227			`d=177777 -- ! mem(4370)=177777; sxt (r4)+ (#111111)`
1228			`d=074016 -- ! mem(4372)=074016; xor r1,(r4)+ (#070707)`
1229			`d=000000 -- ! mem(4374)=000000; sxt (r4)+ (#111111)`
1230			`#`
1231			`wal 004500 -- NZVC`
1232			`brm 31`
1233			`d=000020 -- ! mem(4500)=0000; mov r1,(r4)+ (#4711, #123456)`
1234			`d=000021 -- ! mem(4502)=000C; cmp r1,(r4)+ (#4711, #123456)`
1235			`d=000030 -- ! mem(4504)=N000; cmp r1,(r4)+ (#123456,#4711)`
1236			`d=000024 -- ! mem(4506)=0Z00; cmp r1,(r4)+ (#4711, #4711)`
1237			`d=000024 -- ! mem(4510)=0Z00; clr (r4)+ (#123456)`
1238			`d=000020 -- ! mem(4512)=0000; bit r1,(r4)+ (#4711, #11)`
1239			`d=000024 -- ! mem(4514)=0Z00; bit r1,(r4)+ (#4711, #66)`
1240			`d=000030 -- ! mem(4516)=N000; bic r1,(r4)+ (#4711, #123456)`
1241			`d=000030 -- ! mem(4520)=N000; bis r1,(r4)+ (#4711, #123456)`
1242			`d=000030 -- ! mem(4522)=N000; add r1,(r4)+ (#4711, #123456)`
1243			`d=000030 -- ! mem(4524)=N000; sub r1,(r4)+ (#4711, #123456)`
1244			`d=000021 -- ! mem(4526)=000C; com (r4)+ (#123456)`
1245			`d=000031 -- ! mem(4530)=N00C; inc (r4)+ (#123456) keep C!`
1246			`d=000031 -- ! mem(4532)=N00C; dec (r4)+ (#123456) keep C!`
1247			`d=000021 -- ! mem(4534)=000C; neg (r4)+ (#123456)`
1248			`d=000030 -- ! mem(4536)=N000; tst (r4)+ (#123456)`
1249			`d=000023 -- ! mem(4540)=00VC; ror (r4)+ (#100201)`
1250			`d=000031 -- ! mem(4542)=N00C; ror (r4)+ (#002201)`
1251			`d=000023 -- ! mem(4544)=00VC; rol (r4)+ (#100200)`
1252			`d=000020 -- ! mem(4546)=0000; asr (r4)+ (#200)`
1253			`d=000032 -- ! mem(4550)=N0V0; asr (r4)+ (#100200)`
1254			`d=000020 -- ! mem(4552)=0000; asl (r4)+ (#200)`
1255			`d=000023 -- ! mem(4554)=00VC; asl (r4)+ (#100200)`
1256			`d=000021 -- ! mem(4556)=000C; add r1,(r4)+ (#4711, ,#177000)`
1257			`d=000020 -- ! mem(4560)=0000; adc (r4)+ (#200)`
1258			`d=000031 -- ! mem(4562)=N00C; sub r1,(r4)+ (#4711, #4701)`
1259			`d=000020 -- ! mem(4564)=0000; sbc (r4)+ (#200)`
1260			`d=000030 -- ! mem(4566)=N000; swap (r4)+ (#111000)`
1261			`d=000030 -- ! mem(4570)=N000; sxt (r4)+ (#111111 with N=1)`
1262			`d=000020 -- ! mem(4572)=0000; xor r1,(r4)+ (#4711, #070707)`
1263			`d=000024 -- ! mem(4574)=0Z00; sxt (r4)+ (#111111 with N=0)`
1264			`#`
1265			`rst -- console reset (to clear T flag)`
1266			`wal 000014 -- vector: 14 -> trap catcher again`
1267			`bwm 2`
1268			`000016 -- PC:16`
1269			`000000 -- PS:0`
1270			`#-----------------------------------------------------------------------------`
1271			`C Setup code 20 [base 4700] (check CPUERR and error handling)`
1272			`#[[off]]`
1273			`wal 004700 -- code (to be single stepped...)`
1274			`bwm 11`
1275			`010025 -- mov r0,(r5)+ (@ 4777)`
1276			`010025 -- mov r0,(r5)+ (@ 150000)`
1277			`010025 -- mov r0,(r5)+ (@ 160000)`
1278			`000101 -- jmp r1`
1279			`004701 -- jsr pc,r1`
1280			`000000 -- halt`
1281			`014321 -- mov -(r3),(r1)+ (@ 20000)`
1282			`024321 -- cmp -(r3),(r1)+ (@ 20400)`
1283			`#4720`
1284			`064321 -- add -(r3),(r1)+ (@ 20000)`
1285			`010046 -- mov r0,-(sp) (@ 340)`
1286			`000004 -- iot (with sp=342,...)`
1287			`#`
1288			`wal 000004 -- vector: 4+10 (trap catch)`
1289			`bwm 4`
1290			`000006 -- PC:6`
1291			`000000 -- PS:0`
1292			`000012 -- PC:12`
1293			`000000 -- PS:0`
1294			`#----------`
1295			`C Exec code 20 (check CPUERR and error handling)`
1296			`C Exec test 20.1 (odd address abort)`
1297			`rst -- console reset`
1298			`wps 000000 -- psw: clear`
1299			`wal 001374 -- clean stack`
1300			`bwm 2`
1301			`000000 --`
1302			`000000 --`
1303			`wal 177766 -- check initial CPUERR (=0!)`
1304			`rm d=000000 -- !`
1305			`wr0 000011 -- r0=11`
1306			`wr5 004775 -- r5=4775`
1307			`wsp 001400 -- sp=1400`
1308			`wpc 004700 -- pc=4700`
1309			`step -- step (mov r0,(r5)+): trap 4 + CPUERR.adderr set [[s:2]]`
1310			`rpc d=000006 -- ! pc=6 (trap 4 catch)`
1311			`rsp d=001374 -- ! sp=1374`
1312			`wal 001374 -- check stack`
1313			`brm 2`
1314			`d=004702 -- ! pc=4702`
1315			`d=000000 -- ! ps=0`
1316			`wal 177766 -- check CPUERR`
1317			`rm d=000100 -- ! CPUERR: (adderr=1)`
1318			`wm 000000 -- any write access will clear CPUERR`
1319			`rm d=000000 -- ! CPUERR: 0`
1320			`#----------`
1321			`C Exec test 20.2 (non-existent memory abort)`
1322			`wal 172354 -- kernel I space AR(6)`
1323			`wm 177400 -- (map to 8 k below I/O page, never available in w11a)`
1324			`wal 177572 -- SSR0`
1325			`wmi 000001 -- enable`
1326			`wal 172516 -- SSR3`
1327			`wmi 000020 -- ena_22bit=1`
1328			`#`
1329			`wr5 140000 -- r5=140000`
1330			`wsp 001400 -- sp=1400`
1331			`wpc 004702 -- pc=4702`
1332			`step -- step (mov r0,(r5)+): trap 4 + CPUERR.nxm set [[s:2]]`
1333			`rpc d=000006 -- ! pc= 6 (trap 4 catch)`
1334			`rsp d=001374 -- ! sp=1374`
1335			`wal 177766 -- check CPUERR`
1336			`rm d=000040 -- ! CPUERR: (nxm=1)`
1337			`wm 000000 -- any write access will clear CPUERR`
1338			`rm d=000000 -- ! CPUERR: 0`
1339			`#`
1340			`wal 177572 -- SSR0`
1341			`wmi 000000 -- disable`
1342			`wal 172354 -- kernel I space AR(6)`
1343			`wm 001400 -- 1400 140000 base (default 1-to-1 map)`
1344			`#----------`
1345			`C Exec test 20.3 (I/O bus timeout abort)`
1346			`wr5 160000 -- r5=160000`
1347			`wsp 001400 -- sp=1400`
1348			`wpc 004704 -- pc=4704`
1349			`step -- step (mov r0,(r5)+): trap 4 + CPUERR.iobto set [[s:2]]`
1350			`rpc d=000006 -- ! pc= 6 (trap 4 catch)`
1351			`rsp d=001374 -- ! sp=1374`
1352			`wal 177766 -- check CPUERR`
1353			`rm d=000020 -- ! CPUERR: (iobto=1)`
1354			`wm 000000 -- clear CPUERR`
1355			`#----------`
1356			`C Exec test 20.4 (address error abort after jmp r1)`
1357			`wsp 001400 -- sp=1400`
1358			`wpc 004706 -- pc=4706`
1359			`step -- step (jmp r1): trap 10 [[s:2]]`
1360			`rpc d=000012 -- ! pc=12 (trap 10 catch)`
1361			`rsp d=001374 -- ! sp=1374`
1362			`wal 177766 -- check CPUERR`
1363			`rm d=000000 -- ! CPUERR: none`
1364			`wm 000000 -- clear CPUERR`
1365			`#----------`
1366			`C Exec test 20.5 (address error abort after jsr pc,r1)`
1367			`wsp 001400 -- sp=1400`
1368			`wpc 004710 -- pc=4710`
1369			`step -- step (jsr pc,r1): trap 10 [[s:2]]`
1370			`rpc d=000012 -- ! pc=12 (trap 10 catch)`
1371			`rsp d=001374 -- ! sp=1374`
1372			`wal 177766 -- check CPUERR`
1373			`rm d=000000 -- ! CPUERR: none`
1374			`wm 000000 -- clear CPUERR`
1375			`#----------`
1376			`C Exec test 20.6 (halt in user mode)`
1377			`wsp 001400 -- sp=1400 (kernel)`
1378			`wpc 004712 -- pc=4712`
1379			`wps 170000 -- psw: cmode=pmode=11 (user)`
1380			`step -- step (halt): trap 4 + CPUERR.illhlt set [[s:2]]`
1381			`rpc d=000006 -- ! pc=6 (trap 4 catch)`
1382			`rsp d=001374 -- ! sp=1374 (now kernel again...)`
1383			`wal 001374 -- check stack`
1384			`brm 2`
1385			`d=004714 -- !`
1386			`d=170000 -- !`
1387			`wal 177766 -- check CPUERR`
1388			`rm d=000200 -- ! CPUERR: (illhlt=1)`
1389			`wm 000000 -- clear CPUERR`
1390			`#`
1391			`wps 000000 -- psw: cmode=pmode=0 (kernel)`
1392			`#----------`
1393			`#`
1394			`# test mmu aborts`
1395			`#`
1396			`wal 000250 -- vector: 250 -> trap catcher`
1397			`bwm 2`
1398			`000252 -- PC:252`
1399			`000000 -- PS:0`
1400			`#`
1401			`wal 177572 -- SSR0`
1402			`wmi 000001 -- enable`
1403			`wal 172302 -- kernel I space DR segment 1 (base 20000)`
1404			`wmi 077400 -- slf=127; ed=0(up); acf=0 (non-resident)`
1405			`#----------`
1406			`C Exec test 20.7 (non resident abort)`
1407			`wr1 020000 -- r1=20000`
1408			`wr3 000016 -- r3=16 ; the -(r3) fetches the mem(14)=16`
1409			`wsp 001400 -- sp=1400`
1410			`wpc 004714 -- pc=4714`
1411			`step -- step (mov -(r3),(r1)+): abort to 250 [[s:2]]`
1412			`rr1 d=020002 -- ! r1=20002 (inc done before trap (here dstw))`
1413			`rr3 d=000014 -- ! r3=16 (dec done before trap)`
1414			`rpc d=000252 -- ! pc=252 (trap 250 catch)`
1415			`rsp d=001374 -- ! sp=1374`
1416			`wal 177572 -- check SSR0/1/2`
1417			`brm 3`
1418			`d=100003 -- ! SSR0: (abo_nonres=1,seg=1,ena=1)`
1419			`d=010763 -- ! SSR1: rb=1,2; ra=3,-2`
1420			`d=004714 -- ! SSR2: 4714 (eff. PC)`
1421			`#`
1422			`wal 177572 -- SSR0`
1423			`wmi 000001 -- enable and clear error bits`
1424			`#----------`
1425			`C Exec test 20.8 (segment length violation abort)`
1426			`wal 172302 -- kernel I space DR segment 1 (base 20000)`
1427			`wmi 001406 -- slf=3; ed=0(up); acf=6 (w/r)`
1428			`#`
1429			`wr1 020400 -- r1=20400`
1430			`wr3 000016 -- r3=16 ; the -(r3) fetches the mem(14)=16`
1431			`wsp 001400 -- sp=1400`
1432			`wpc 004716 -- pc=4716`
1433			`step -- step (cmp -(r3),(r1)+): abort to 250 [[s:2]]`
1434			`rr1 d=020402 -- ! r1=20402 (inc done before trap (here dstr))`
1435			`rr3 d=000014 -- ! r3=16 (dec done before trap)`
1436			`rpc d=000252 -- ! pc=252 (trap 250 catch)`
1437			`rsp d=001374 -- ! sp=1374`
1438			`wal 177572 -- check SSR0/1/2`
1439			`brm 3`
1440			`d=040003 -- ! SSR0: (abo_length=1,seg=1,ena=1)`
1441			`d=010763 -- ! SSR1: rb=1,2; ra=3,-2`
1442			`d=004716 -- ! SSR2: 4716 (eff. PC)`
1443			`#`
1444			`wal 177572 -- SSR0`
1445			`wmi 000001 -- enable and clear error bits`
1446			`#----------`
1447			`C Exec test 20.9 (read-only abort)`
1448			`wal 172302 -- kernel I space DR segment 1 (base 20000)`
1449			`wmi 077402 -- slf=127; ed=0(up); acf=2 (read-only)`
1450			`#`
1451			`wr1 020000 -- r1=20000`
1452			`wr3 000016 -- r3=16 ; the -(r3) fetches the mem(14)=16`
1453			`wsp 001400 -- sp=1400`
1454			`wpc 004720 -- pc=4720`
1455			`step -- step (add -(r3),(r1)+): abort to 250 [[s:2]]`
1456			`rr1 d=020002 -- ! r1=20000 (inc done before trap (here dstm))`
1457			`rr3 d=000014 -- ! r3=16 (dec done before trap)`
1458			`rpc d=000252 -- ! pc=252 (trap 250 catch)`
1459			`rsp d=001374 -- ! sp=1374`
1460			`wal 177572 -- check SSR0/1/2`
1461			`brm 3`
1462			`d=020003 -- ! SSR0: (abo_rdonly=1,seg=1,ena=1)`
1463			`d=010763 -- ! SSR1: rb=1,2; ra=3,-2`
1464			`d=004720 -- ! SSR2: 4720 (eff. PC)`
1465			`#`
1466			`# mmu back to default setup, disable`
1467			`wal 172302 -- kernel I space DR segment 1 (base 20000)`
1468			`wmi 077406 -- slf=127; ed=0(up); acf=6 (r/w)`
1469			`wal 177572 -- SSR0`
1470			`wmi 000000 -- disable`
1471			`#----------`
1472			`#`
1473			`# test mmu trap`
1474			`#`
1475			`wal 177572 -- SSR0`
1476			`wmi 001001 -- enable, trap enable`
1477			`wal 172302 -- kernel I space DR segment 1 (base 20000)`
1478			`wmi 077404 -- slf=127; ed=0(up); acf=4 (r/w, trap on r/w)`
1479			`#----------`
1480			`C Exec test 20.10 (trap on write)`
1481			`wr1 020000 -- r1=20000`
1482			`wr3 000016 -- r3=16 ; the -(r3) fetches the mem(14)=16`
1483			`wsp 001400 -- sp=1400`
1484			`wpc 004714 -- pc=4714`
1485			`step -- step (mov -(r3),(r1)+): trap to 250 [[s:2]]`
1486			`rr1 d=020002 -- ! r1=20002 (inc done before trap)`
1487			`rr3 d=000014 -- ! r3=16 (dec done before trap)`
1488			`rpc d=000252 -- ! pc=252 (trap 250 catch)`
1489			`rsp d=001374 -- ! sp=1374`
1490			`wal 020000 -- check target area`
1491			`rm d=000016 -- ! mem(20000)=16`
1492			`wm 000000 -- clean tainted memory`
1493			`wal 177572 -- check SSR0`
1494			`brm 3`
1495			`d=011001 -- ! SSR0: (trap_mmu=1,ena_trap=1,seg=0,ena=1)`
1496			`d=010763 -- ! SSR1: rb=1,2; ra=3,-2`
1497			`d=004714 -- ! SSR2: 4714 (eff. PC)`
1498			`#----------`
1499			`C Exec test 20.11 (2nd write, should not trap again)`
1500			`wr1 020002 -- r1=20002`
1501			`wr3 000016 -- r3=16 ; the -(r3) fetches the mem(14)=16`
1502			`wsp 001400 -- sp=1400`
1503			`wpc 004714 -- pc=4714`
1504			`step -- step (mov -(r3),(r1)+): no trap [[s:2]]`
1505			`rr1 d=020004 -- ! r1=20004 (inc done before trap)`
1506			`rr3 d=000014 -- ! r3=16 (dec done before trap)`
1507			`rpc d=004716 -- ! pc=252 (trap 250 catch)`
1508			`rsp d=001400 -- ! sp=1374`
1509			`wal 020002 -- check target area`
1510			`rm d=000016 -- ! mem(20002)=16`
1511			`wm 000000 -- clean tainted memory`
1512			`wal 177572 -- check SSR0`
1513			`brm 3`
1514			`d=011003 -- ! SSR0: (trap_mmu=1,ena_trap=1,seg=1,ena=1)`
1515			`d=010763 -- ! SSR1: rb=1,2; ra=3,-2`
1516			`d=004714 -- ! SSR2: 4714 (eff. PC)`
1517			`#`
1518			`# mmu back to default setup, disable`
1519			`wal 172302 -- kernel I space DR segment 1 (base 20000)`
1520			`wmi 077406 -- slf=127; ed=0(up); acf=6 (r/w)`
1521			`wal 177572 -- SSR0`
1522			`wmi 000000 -- disable`
1523			`#----------`
1524			`#`
1525			`# now test stack limit logic`
1526			`#`
1527			`C Exec test 20.12 (red stack abort when pushing data to stack)`
1528			`wr0 123456 -- r0=123456`
1529			`wsp 000340 -- sp=340`
1530			`wpc 004722 -- pc=4722`
1531			`step -- step (mov r0,-(sp)): abort to 4 [[s:2]]`
1532			`rpc d=000006 -- ! pc=6 (trap 4 catch)`
1533			`rsp d=000000 -- ! sp=0`
1534			`wal 000336 -- check that stack wasn't written`
1535			`rm d=000000 -- ! mem(336) untainted`
1536			`wal 000000 -- check emergency stack at 0,2`
1537			`brm 2`
1538			`d=004724 -- ! mem(0): PC`
1539			`d=000010 -- ! mem(2): PS`
1540			`wal 177766 -- check CPUERR`
1541			`rm d=000004 -- ! CPUERR: (rsv=1)`
1542			`wm 000000 -- clear CPUERR`
1543			`#----------`
1544			`C Exec test 20.13 (red stack abort on 2nd word of interrupt/trap push)`
1545			`wps 000017 -- psw: set all cc flags`
1546			`wsp 000342 -- sp=342`
1547			`wpc 004724 -- pc=4724`
1548			`step -- step (iot): abort to 4 [[s:2]]`
1549			`rpc d=000006 -- ! pc=6 (trap 4 catch)`
1550			`rsp d=000000 -- ! sp=0`
1551			`wal 000336 -- check stack`
1552			`brm 2`
1553			`d=000000 -- ! mem(336) untainted`
1554			`d=000017 -- ! mem(340) PS of 1st attempt`
1555			`wal 000000 -- check emergency stack at 0,2`
1556			`brm 2`
1557			`d=004726 -- ! mem(0): PC`
1558			`d=000000 -- ! mem(2): PS (will be 0, orgininal PS lost !!)`
1559			`wal 177766 -- check CPUERR`
1560			`rm d=000004 -- ! CPUERR: (rsv=1)`
1561			`wm 000000 -- clear CPUERR`
1562			`#----------`
1563			`C Exec test 20.14 (yellow stack trap when pushing data to stack; sp=400)`
1564			`wps 000017 -- psw: set all cc flags`
1565			`wr0 123456 -- r0=123456`
1566			`wsp 000400 -- sp=400`
1567			`wpc 004722 -- pc=4722`
1568			`step -- step (mov r0,-(sp)): trap to 4`
1569			`rpc d=000006 -- ! pc=6 (trap 4 catch)`
1570			`rsp d=000372 -- ! sp=372`
1571			`wal 000372 -- check stack`
1572			`brm 3`
1573			`d=004724 -- ! mem(372) PC of trapped instruction`
1574			`d=000011 -- ! mem(374) PS of trapped instruction`
1575			`d=123456 -- ! mem(376) pushed word`
1576			`wal 177766 -- check CPUERR`
1577			`rm d=000010 -- ! CPUERR: (ysv=1)`
1578			`wm 000000 -- clear CPUERR`
1579			`#----------`
1580			`C Exec test 20.15 (yellow stack trap on 2nd word of interrupt/trap push; sp=402)`
1581			`wps 000017 -- psw: set all cc flags`
1582			`wsp 000402 -- sp=402`
1583			`wpc 004724 -- pc=4724`
1584			`step -- step (iot): abort to 4 [[s:2]]`
1585			`rpc d=000006 -- ! pc=6 (trap 4 catch)`
1586			`rsp d=000372 -- ! sp=372`
1587			`wal 000372 -- check stack`
1588			`brm 4`
1589			`d=000022 -- ! mem(372) PC of IOT handler`
1590			`d=000000 -- ! mem(374) PS of IOT handler`
1591			`d=004726 -- ! mem(376) PC of IOT trap`
1592			`d=000017 -- ! mem(400) PS of IOT trap`
1593			`wal 177766 -- check CPUERR`
1594			`rm d=000010 -- ! CPUERR: (ysv=1)`
1595			`wm 000000 -- clear CPUERR`
1596			`#----------`
1597			`# now test red stack escalation`
1598			`#`
1599			`C Exec test 20.16 (red stack escalation: abort kernel stack odd; sp=1001)`
1600			`wr0 123456 -- r0=123456`
1601			`wsp 001001 -- sp=1001`
1602			`wpc 004722 -- pc=4722`
1603			`step -- step (mov r0,-(sp)): abort to 4 [[s:2]]`
1604			`rpc d=000006 -- ! pc=6 (trap 4 catch)`
1605			`rsp d=000000 -- ! sp=0`
1606			`wal 000000 -- check emergency stack at 0,2`
1607			`brm 2`
1608			`d=004724 -- ! mem(0): PC`
1609			`d=000010 -- ! mem(2): PS`
1610			`wal 177766 -- check CPUERR`
1611			`rm d=000104 -- ! CPUERR: (rsv=1,adderr=1)`
1612			`wm 000000 -- clear CPUERR`
1613			`#----------`
1614			`C Exec test 20.17 (red stack escalation: abort kernel stack in non-mem)`
1615			`wal 172354 -- kernel I space AR(6)`
1616			`wm 177400 -- (map to 8 k below I/O page, never available in w11a)`
1617			`wal 177572 -- SSR0`
1618			`wmi 000001 -- enable`
1619			`wal 172516 -- SSR3`
1620			`wmi 000020 -- ena_22bit=1`
1621			`#`
1622			`wr0 123456 -- r0=123456`
1623			`wsp 140004 -- sp=140004`
1624			`wpc 004722 -- pc=4722`
1625			`step -- step (mov r0,-(sp)): abort to 4 [[s:2]]`
1626			`rpc d=000006 -- ! pc=6 (trap 4 catch)`
1627			`rsp d=000000 -- ! sp=0`
1628			`wal 000000 -- check emergency stack at 0,2`
1629			`brm 2`
1630			`d=004724 -- ! mem(0): PC`
1631			`d=000010 -- ! mem(2): PS`
1632			`wal 177766 -- check CPUERR`
1633			`rm d=000044 -- ! CPUERR: (rsv=1,nxm=1)`
1634			`wm 000000 -- clear CPUERR`
1635			`#`
1636			`wal 177572 -- SSR0`
1637			`wmi 000000 -- disable`
1638			`wal 172354 -- kernel I space AR(6)`
1639			`wm 001400 -- 1400 140000 base (default 1-to-1 map)`
1640			`#----------`
1641			`C Exec test 20.18 (red stack escalation: abort kernel stack iob-to;sp=160004)`
1642			`wr0 123456 -- r0=123456`
1643			`wsp 160004 -- sp=160004`
1644			`wpc 004722 -- pc=4722`
1645			`step -- step (mov r0,-(sp)): abort to 4 [[s:2]]`
1646			`rpc d=000006 -- ! pc=6 (trap 4 catch)`
1647			`rsp d=000000 -- ! sp=0`
1648			`wal 000000 -- check emergency stack at 0,2`
1649			`brm 2`
1650			`d=004724 -- ! mem(0): PC`
1651			`d=000010 -- ! mem(2): PS`
1652			`wal 177766 -- check CPUERR`
1653			`rm d=000024 -- ! CPUERR: (rsv=1,iobto=1)`
1654			`wm 000000 -- clear CPUERR`
1655			`#----------`
1656			`C Exec test 20.19 (red stack escalation: abort kernel stack mmu abort;sp=020004)`
1657			`#`
1658			`wal 177572 -- SSR0`
1659			`wmi 000001 -- enable`
1660			`wal 172302 -- kernel I space DR segment 1 (base 20000)`
1661			`wmi 077400 -- slf=127; ed=0(up); acf=0 (non-resident)`
1662			`#`
1663			`wr0 123456 -- r0=123456`
1664			`wsp 020004 -- sp=020004`
1665			`wpc 004722 -- pc=4722`
1666			`step -- step (mov r0,-(sp)): abort to 4 [[s:2]]`
1667			`rpc d=000006 -- ! pc=6 (trap 4 catch)`
1668			`rsp d=000000 -- ! sp=0`
1669			`wal 020002 -- check that stack wasn't written`
1670			`rm d=000000 -- ! mem(20002) untainted`
1671			`wal 000000 -- check emergency stack at 0,2`
1672			`brm 2`
1673			`d=004724 -- ! mem(0): PC`
1674			`d=000010 -- ! mem(2): PS`
1675			`wal 177766 -- check CPUERR`
1676			`rm d=000104 -- ! CPUERR: (rsv=1,adderr=1)`
1677			`wm 000000 -- clear CPUERR`
1678			`# mmu back to default setup`
1679			`wal 172302 -- kernel I space DR segment 1 (base 20000)`
1680			`wmi 077406 -- slf=127; ed=0(up); acf=6 (r/w)`
1681			`wal 177572 -- SSR0`
1682			`wmi 000000 -- disable`
1683			`wal 172516 -- SSR3`
1684			`wmi 000000 -- disable`
1685			`#`
1686			`#[[on]]`
1687			`#-----------------------------------------------------------------------------`
1688			`C Setup code 21 [base 4740] (MTPx/MFPx; MMU for user mode with I/D)`
1689			`#`
1690			`#use setting as for test 22`
1691			`wal 177600 -- user I space DR`
1692			`wmi 077406 -- slf=127; ed=0(up); acf=6(w/r)`
1693			`wal 177620 -- user D space DR`
1694			`wmi 077406 -- slf=127; ed=0(up); acf=6(w/r)`
1695			`wal 177640 -- user I space AR`
1696			`wmi 000053 -- 53 -> maps 0 -> 5300`
1697			`wal 177660 -- user D space AR`
1698			`wmi 000055 -- 55 -> maps 0 -> 5500`
1699			`wal 177572 -- SSR0`
1700			`wmi 000001 -- set enable bit`
1701			`wal 172516 -- SSR3`
1702			`wmi 000001 -- enable D space for user mode`
1703			`#`
1704			`wal 004740 -- code (to be single stepped...)`
1705			`bwm 6`
1706			`006610 -- mtpi (r0)`
1707			`106610 -- mtpd (r0)`
1708			`006606 -- mtpi r6`
1709			`006510 -- mfpi (r0)`
1710			`106510 -- mfpd (r0)`
1711			`006506 -- mfpi r6`
1712			`#`
1713			`C Exec code 21 (MTPx/MFPx; MMU for user mode with I/D)`
1714			`#`
1715			`wps 030000 -- psw: cmode=0, pmode=11`
1716			`wal 001372 -- setup kernel stack`
1717			`bwm 3`
1718			`012300 --`
1719			`001230 --`
1720			`000666 --`
1721			`wr0 000002 -- r0=2`
1722			`wsp 001372 -- sp=1372`
1723			`#`
1724			`wpc 004740 -- pc=4740`
1725			`step -- step (mtpi (r0))`
1726			`rpc d=004742 -- ! pc=next`
1727			`rsp d=001374 -- ! sp=1374 (one popped)`
1728			`wal 005302 -- user I base`
1729			`rm d=012300 -- ! mem_ui(2) = 012300`
1730			`#`
1731			`step -- step (mtpd (r0))`
1732			`rpc d=004744 -- ! pc=next`
1733			`rsp d=001376 -- ! sp=1376 (one popped)`
1734			`wal 005502 -- user D base`
1735			`rm d=001230 -- ! mem_ud(2) = 001230`
1736			`#`
1737			`step -- step (mtpi r6)`
1738			`rpc d=004746 -- ! pc=next`
1739			`rsp d=001400 -- ! sp=1400 (one popped)`
1740			`wps 170000 -- psw: cmode=11, pmode=11`
1741			`rsp d=000666 -- ! sp_um=666 [[usp]]`
1742			`wps 030000 -- psw: cmode=0, pmode=11`
1743			`#`
1744			`wal 001374 -- clear stack`
1745			`bwm 3`
1746			`000000 --`
1747			`000000 --`
1748			`000000 --`
1749			`#`
1750			`step -- step (mfpi (r0))`
1751			`rpc d=004750 -- ! pc=next`
1752			`rsp d=001376 -- ! sp=1376 (one pushed)`
1753			`wal 001376 -- top of stack`
1754			`rm d=012300 -- !`
1755			`#`
1756			`step -- step (mfpd (r0))`
1757			`rpc d=004752 -- ! pc=next`
1758			`rsp d=001374 -- ! sp=1374 (one pushed)`
1759			`wal 001374 -- top of stack`
1760			`rm d=001230 -- !`
1761			`#`
1762			`step -- step (mtpi r6)`
1763			`rpc d=004754 -- ! pc=next`
1764			`rsp d=001372 -- ! sp=1372 (one pushed)`
1765			`wal 001372 -- top of stack`
1766			`rm d=000666 -- !`
1767			`#`
1768			`wal 005302 -- clean tainted memory`
1769			`wm 000000 --`
1770			`wal 005502 --`
1771			`wm 000000 --`
1772			`#`
1773			`wps 000000 -- psw: cmode=pmode=0 (kernel)`
1774			`#-----------------------------------------------------------------------------`
1775			`C Setup code 22 [base 5000, use 50-57] (MMU ; run user mode code with I/D)`
1776			`#`
1777			`wal 177600 -- user I space DR`
1778			`wmi 000002 -- slf=0; ed=0(up); acf=2(read-only)`
1779			`wal 177620 -- user D space DR`
1780			`wmi 000006 -- slf=0; ed=0(up); acf=6(w/r)`
1781			`wal 177640 -- user I space AR`
1782			`wmi 000053 -- 53 -> maps 0 -> 5300`
1783			`wal 177660 -- user D space AR`
1784			`wmi 000055 -- 55 -> maps 0 -> 5500`
1785			`wal 177572 -- SSR0`
1786			`wmi 000001 -- set enable bit`
1787			`wal 172516 -- SSR3`
1788			`wmi 000001 -- enable D space for user mode`
1789			`#`
1790			`wal 005000 -- code (kernel):`
1791			`bwm 5`
1792			`012746 -- mov #144000,-(sp) ;PS for RTI`
1793			`174000 -- cmode=11,pmode=11,rset=1`
1794			`012746 -- mov #0,-(sp) ;PC for RTI`
1795			`000000 --`
1796			`000002 -- rti`
1797			`#-----`
1798			`wal 000034 -- vector: 34 (TRAP)`
1799			`bwm 2`
1800			`005020 -- PC:5020`
1801			`000340 -- PS: pri=7`
1802			`#-----`
1803			`wal 005020 -- code (kernel, trap 34):`
1804			`bwm 4`
1805			`011600 -- mov (sp),r0`
1806			`006560 -- mfpi -2(r0)`
1807			`177776`
1808			`000000 -- halt`
1809			`#-----`
1810			`wal 000250 -- vector: 250 (MMU)`
1811			`bwm 2`
1812			`005040 -- PC:5040`
1813			`000340 -- PS: pri=7`
1814			`#-----`
1815			`wal 005040 -- code (kernel, trap 4):`
1816			`bwm 68`
1817			`005337 -- dec @#5256`
1818			`005256`
1819			`001001 -- bne .+2`
1820			`000000 -- halt`
1821			`013700 -- mov ssr0,r0`
1822			`177572`
1823			`042700 -- bic #177741,r0 ; clear all but id+asn fields`
1824			`177741`
1825			`#5060`
1826			`062700 -- add #177600,r0 ; user DR address base`
1827			`177600`
1828			`# 5 23 062710 0 -- add #400,(r0)`
1829			`# 5 23 000400 0`
1830			`105260 -- incb 1(r0) ; odd address IB access fails !!`
1831			`000001`
1832			`010025 -- mov r0,(r5)+`
1833			`012025 -- mov (r0),(r5)+`
1834			`013700 -- mov ssr1,r0`
1835			`177574`
1836			`#5100`
1837			`010025 -- mov r0,(r5)+`
1838			`012701 -- mov #2,r1`
1839			`000002`
1840			`052737 -- bis #004000,psw`
1841			`004000`
1842			`177776`
1843			`005046 -- clr -(sp)`
1844			`106506 -- mfpd sp`
1845			`#5120`
1846			`010546 -- mov r5,-(sp)`
1847			`010446 -- mov r4,-(sp)`
1848			`010346 -- mov r3,-(sp)`
1849			`010246 -- mov r2,-(sp)`
1850			`010146 -- mov r1,-(sp)`
1851			`010046 -- mov r0,-(sp)`
1852			`042737 -- bic #004000,psw`
1853			`004000`
1854			`#5140`
1855			`177776`
1856			`010002 -- L1: mov r0,r2`
1857			`110003 -- movb r0,r3`
1858			`042702 -- bic #177770,r2 ; mask regnum field`
1859			`177770`
1860			`006302 -- asl r2`
1861			`060602 -- add sp,r2 ; address of reg on stack`
1862			`006203 -- asr r3 ; shift delta field down 3 bit`
1863			`#5160`
1864			`006203 -- asr r3`
1865			`006203 -- asr r3`
1866			`160312 -- sub r3,(r2) ; correct register contents`
1867			`000300 -- swap r0`
1868			`077114 -- sob r1,L1 (.-12)`
1869			`052737 -- bis #004000,psw`
1870			`004000`
1871			`177776`
1872			`#5200`
1873			`012600 -- mov (sp)+,r0`
1874			`012601 -- mov (sp)+,r1`
1875			`012602 -- mov (sp)+,r2`
1876			`012603 -- mov (sp)+,r3`
1877			`012604 -- mov (sp)+,r4`
1878			`012605 -- mov (sp)+,r5`
1879			`106606 -- mtpd sp`
1880			`005726 -- tst (sp)+`
1881			`#5220`
1882			`042737 -- bic #004000,psw`
1883			`004000`
1884			`177776`
1885			`013700 -- mov ssr2,r0`
1886			`177576`
1887			`010025 -- mov r0,(r5)+`
1888			`010016 -- mov r0,(sp)`
1889			`042737 -- bic #160000,ssr0 ; clear abort bits`
1890			`#5240`
1891			`160000`
1892			`177572`
1893			`000002 -- rti`
1894			`000000 -- halt`
1895			`#-----`
1896			`wal 005256 -- data (kernel):`
1897			`wmi 000003 -- stop at 3rd call of MMU handler`
1898			`#-----`
1899			`wal 005300 -- code (user):`
1900			`bwm 8`
1901			`012706 -- mov #100,sp`
1902			`000100`
1903			`005000 -- clr r0`
1904			`012701 -- mov #074,r1`
1905			`000074`
1906			`062021 -- add (r0)+,(r1)+ ; r1 = 74`
1907			`000137 -- jmp @#74`
1908			`000074`
1909			`#`
1910			`wal 005374 -- .=5374`
1911			`bwm 4`
1912			`062021 -- add (r0)+,(r1)+ ; r1 = 76`
1913			`062021 -- add (r0)+,(r1)+ ; r1 = 100`
1914			`#5400`
1915			`062021 -- add (r0)+,(r1)+ ; r1 = 102`
1916			`104417 -- trap 17`
1917			`#`
1918			`wal 005500 -- data (user):`
1919			`bwm 4`
1920			`002001 -- mem_ud(0)=02001`
1921			`002002 -- mem_ud(2)=02002`
1922			`002003 -- mem_ud(4)=02003`
1923			`002004 -- mem_ud(6)=02004`
1924			`wal 005574 -- data (user):`
1925			`bwm 4`
1926			`000300 -- mem_ud(074)=0300`
1927			`000300 -- mem_ud(076)=0300`
1928			`000300 -- mem_ud(100)=0300`
1929			`000300 -- mem_ud(102)=0300`
1930			`#`
1931			`C Exec code 22 (MMU ; run user mode code with I/D)`
1932			`wr5 005260 -- r5=5260`
1933			`wsp 001400 -- sp=1400`
1934			`wpc 005000 -- pc=5000`
1935			`cont -- cont @ 5000`
1936			`wtgo`
1937			`rsp d=001372 -- ! sp`
1938			`rpc d=005030 -- ! pc (halt in TRAP handler)`
1939			`wal 001372 -- check stack (1372)`
1940			`brm 3`
1941			`d=104417 -- ! TRAP instruction`
1942			`d=000104 -- ! PC trap`
1943			`d=174000 -- ! PS trap`
1944			`#`
1945			`wal 005256 --`
1946			`brm 9`
1947			`d=000001 -- ! mem(5256) (mmu 3 - trap count)`
1948			`d=177620 -- ! mem(5260) (1st trap: address fixed DR)`
1949			`d=000406 -- ! mem(5262) (1st trap: new content of DR)`
1950			`d=010420 -- ! mem(5264) (1st trap: ssr1: ra=0,2;rb=1,2)`
1951			`d=000076 -- ! mem(5266) (1st trap: ssr2: pc)`
1952			`d=177600 -- ! mem(5270) (2nd trap: address fixed DR)`
1953			`d=000402 -- ! mem(5272) (2nd trap: new content of DR)`
1954			`d=000000 -- ! mem(5274) (2nd trap: ssr1: none)`
1955			`d=000100 -- ! mem(5276) (2nd trap: ssr2: pc)`
1956			`#`
1957			`wal 005574`
1958			`brm 4`
1959			`d=002301 -- ! mem(5574)=02301 was mem_ud(074)`
1960			`d=002302 -- ! mem(5576)=02302 was mem_ud(076)`
1961			`d=002303 -- ! mem(5600)=02303 was mem_ud(100)`
1962			`d=002304 -- ! mem(5602)=02304 was mem_ud(102)`
1963			`#`
1964			`wal 000034 -- vector: 34 -> trap catcher again`
1965			`bwm 2`
1966			`000036 -- PC:36`
1967			`000000 -- PS:0`
1968			`wal 000250 -- vector: 250 -> trap catcher again`
1969			`bwm 2`
1970			`000252 -- PC:252`
1971			`000000 -- PS:0`
1972			`#`
1973			`wps 000000 -- psw: cmode=pmode=0 (kernel)`
1974			`#-----------------------------------------------------------------------------`
1975			`C Setup code 23 [base 5700; use 57-63] (test cmp and conditional branch)`
1976			`#`
1977			`wal 005700 -- code test 1:`
1978			`bwm 5`
1979			`012012 -- mov (r0)+,(r2) ; load PSW from table`
1980			`004737 -- jsr pc,@#6000`
1981			`006000`
1982			`077104 -- sob r1,-4`
1983			`000000 -- halt`
1984			`#`
1985			`wal 005720 -- code test 2:`
1986			`bwm 6`
1987			`000230 -- spl 0`
1988			`005720 -- tst (r0)+ ; verify tst response`
1989			`004737 -- jsr pc,@#6000`
1990			`006000`
1991			`077104 -- sob r1,-4`
1992			`000000 -- halt`
1993			`#`
1994			`wal 005740 -- code test 3:`
1995			`bwm 6`
1996			`000230 -- spl 0`
1997			`022020 -- cmp (r0+),(r0)+ ; verify cmp response`
1998			`004737 -- jsr pc,@#6000`
1999			`006000`
2000			`077104 -- sob r1,-4`
2001			`000000 -- halt`
2002			`#`
2003			`# test 1 test 2 test 3`
2004			`# - C V Z N < = > < = >`
2005			`# code branch condition mask 1 2 3 4 5 1 2 3 1 2 3 4 5 6 7`
2006			`# BNE if Z = 0 000004 y y y y y y y y y y y y`
2007			`# BEQ if Z = 1 000010 y y y`
2008			`# BGE if (N xor V) = 0 000020 y y y y y y y y y`
2009			`# BLT if (N xor V) = 1 000040 y y y y y y`
2010			`# BGT if (Z or (N xor V)) = 0 000100 y y y y y y`
2011			`# BLE if (Z or (N xor V)) = 1 000200 y y y y y y y y y`
2012			`# BPL if N = 0 000400 y y y y y y y y y y`
2013			`# BMI if N = 1 001000 y y y y y`
2014			`# BHI if (C or Z) = 0 002000 y y y y y y y y`
2015			`# BLOS if (C or Z) = 1 004000 y y y y y y y`
2016			`# BVC if V = 0 010000 y y y y y y y y y y y y`
2017			`# BVS if V = 1 020000 y y y`
2018			`# BCC if C = 0 (aka BHIS) 040000 y y y y y y y y y y y`
2019			`# BCS if C = 1 (aka BLO) 100000 y y y y`
2020			`#`
2021			`wal 006000 -- code check:`
2022			`bwm 63`
2023			`011203 -- mov (r2),r3 ; save PSW`
2024			`012704 -- mov #177774,r4 ; set pattern store`
2025			`177774 --`
2026			`010312 -- mov r3,(r2) ; restore PSW`
2027			`001003 -- bne .+3`
2028			`042704 -- bic #000004,r4`
2029			`000004 --`
2030			`010312 -- mov r3,(r2)`
2031			`#6020`
2032			`001403 -- beq .+3`
2033			`042704 -- bic #000010,r4`
2034			`000010 --`
2035			`010312 -- mov r3,(r2)`
2036			`002003 -- bge .+3`
2037			`042704 -- bic #000020,r4`
2038			`000020 --`
2039			`010312 -- mov r3,(r2)`
2040			`#6040`
2041			`002403 -- blt .+3`
2042			`042704 -- bic #000040,r4`
2043			`000040 --`
2044			`010312 -- mov r3,(r2)`
2045			`003003 -- bgt .+3`
2046			`042704 -- bic #000100,r4`
2047			`000100 --`
2048			`010312 -- mov r3,(r2)`
2049			`#6060`
2050			`003403 -- ble .+3`
2051			`042704 -- bic #000200,r4`
2052			`000200 --`
2053			`010312 -- mov r3,(r2)`
2054			`100003 -- bpl .+3`
2055			`042704 -- bic #000400,r4`
2056			`000400 --`
2057			`010312 -- mov r3,(r2)`
2058			`#6100`
2059			`100403 -- bmi .+3`
2060			`042704 -- bic #001000,r4`
2061			`001000 --`
2062			`010312 -- mov r3,(r2)`
2063			`101003 -- bhi .+3`
2064			`042704 -- bic #002000,r4`
2065			`002000 --`
2066			`010312 -- mov r3,(r2)`
2067			`#6120`
2068			`101403 -- blos .+3`
2069			`042704 -- bic #004000,r4`
2070			`004000 --`
2071			`010312 -- mov r3,(r2)`
2072			`102003 -- bvc .+3`
2073			`042704 -- bic #010000,r4`
2074			`010000 --`
2075			`010312 -- mov r3,(r2)`
2076			`#6140`
2077			`102403 -- bvs .+3`
2078			`042704 -- bic #020000,r4`
2079			`020000 --`
2080			`010312 -- mov r3,(r2)`
2081			`103003 -- bcc .+3`
2082			`042704 -- bic #040000,r4`
2083			`040000 --`
2084			`010312 -- mov r3,(r2)`
2085			`#6160`
2086			`103403 -- bcs .+3`
2087			`042704 -- bic #100000,r4`
2088			`100000 --`
2089			`010312 -- mov r3,(r2)`
2090			`010325 -- mov r3,(r5)+`
2091			`010425 -- mov r4,(r5)+`
2092			`000207 -- rts pc`
2093			`#`
2094			`wal 006200 -- data test 1:`
2095			`bwm 5`
2096			`000000 -- PSW - no cc`
2097			`000001 -- PSW - C=1`
2098			`000002 -- PSW - V=1`
2099			`000004 -- PSW - Z=1`
2100			`000010 -- PSW - N=1`
2101			`#`
2102			`wal 006220 -- data test 2:`
2103			`bwm 3`
2104			`177777 -- tst -1`
2105			`000000 -- tst 0`
2106			`000001 -- tst 1`
2107			`#`
2108			`wal 006230 -- data test 3:`
2109			`bwm 14`
2110			`000001 -- cmp 1,2`
2111			`000002`
2112			`000001 -- cmp 1,1`
2113			`000001`
2114			`#6240`
2115			`000002 -- cmp 2,1`
2116			`000001`
2117			`177777 -- cmp -1,2`
2118			`000002`
2119			`000002 -- cmp 2,-1`
2120			`177777`
2121			`100000 -- cmp 100000,077777`
2122			`077777`
2123			`#6260`
2124			`077777 -- cmp 077777,100000`
2125			`100000`
2126			`#`
2127			`C Exec code 23 (test cmp and conditional branch)`
2128			`C Exec test 23.1 (explict cc setting)`
2129			`#`
2130			`wr0 006200 -- r0=6200 (input data)`
2131			`wr1 000005 -- r1=5`
2132			`wr2 177776 -- r2=177776 (PS address)`
2133			`wr5 006300 -- r5=6300 (output data)`
2134			`wsp 001400 -- sp=1400`
2135			`stapc 005700 -- start @ 5700`
2136			`wtgo`
2137			`rr0 d=006212 -- ! r0`
2138			`rr1 d=000000 -- ! r1`
2139			`rr5 d=006324 -- ! r5`
2140			`rsp d=001400 -- ! sp`
2141			`rpc d=005712 -- ! pc`
2142			`wal 006300 -- use BCC/BCS naming below`
2143			`brm 10`
2144			`d=000000 -- ! mem(6300) 1 PS: none`
2145			`d=052524 -- ! mem(6302) 1 BNE,BGE,BGT,BPL,BHI,BVC,BCC`
2146			`d=000001 -- ! mem(6304) 2 PS: C=1`
2147			`d=114524 -- ! mem(6306) 2 BNE,BGE,BGT,BPL,BLOS,BVC,BCS`
2148			`d=000002 -- ! mem(6310) 3 PS: V=1`
2149			`d=062644 -- ! mem(6312) 3 BNE,BLT,BLE,BPL,BHI,BVS,BCC`
2150			`d=000004 -- ! mem(6314) 4 PS: Z=1`
2151			`d=054630 -- ! mem(6316) 4 BEQ,BGE,BLE,BPL,BLOS,BVC,BCC`
2152			`d=000010 -- ! mem(6320) 5 PS: N=1`
2153			`d=053244 -- ! mem(6322) 5 BNE,BLT,BLE,BMI,BHI,BVC,BCC`
2154			`#`
2155			`C Exec test 23.2 (tst testing)`
2156			`#`
2157			`wr0 006220 -- r0=6220 (input data)`
2158			`wr1 000003 -- r1=3`
2159			`wr2 177776 -- r2=177776 (PS address)`
2160			`wr5 006330 -- sp=6330 (output data)`
2161			`wsp 001400 -- sp=1400`
2162			`stapc 005720 -- start @ 5720`
2163			`wtgo`
2164			`rr0 d=006226 -- ! r0`
2165			`rr1 d=000000 -- ! r1`
2166			`rr5 d=006344 -- ! r5`
2167			`rsp d=001400 -- ! sp`
2168			`rpc d=005734 -- ! pc`
2169			`wal 006330 -- use BHIS(BCC)/BLO(BLO) naming below`
2170			`brm 6`
2171			`d=000010 -- ! mem(6330) 1 PS: tst -1: N=1`
2172			`d=053244 -- ! mem(6332) 1 BNE,BLT,BLE,BMI,BHI,BVC,BHIS`
2173			`d=000004 -- ! mem(6334) 2 PS: tst 0: Z=1`
2174			`d=054630 -- ! mem(6336) 2 BEQ,BGE,BLE,BPL,BLOS,BVC,BHIS`
2175			`d=000000 -- ! mem(6340) 3 PS: tst 1: all 0`
2176			`d=052524 -- ! mem(6342) 3 BNE,BGE,BGT,BPL,BHI,BVC,BHIS`
2177			`#`
2178			`C Exec test 23.3 (cmp testing)`
2179			`#`
2180			`wr0 006230 -- r0=6230 (input data)`
2181			`wr1 000007 -- r1=7`
2182			`wr2 177776 -- r2=177776 (PS address)`
2183			`wr5 006344 -- sp=6344 (output data)`
2184			`wsp 001400 -- sp=1400`
2185			`stapc 005740 -- start @ 5740`
2186			`wtgo`
2187			`rr0 d=006264 -- ! r0`
2188			`rr1 d=000000 -- ! r1`
2189			`rr5 d=006400 -- ! r5`
2190			`rsp d=001400 -- ! sp`
2191			`rpc d=005754 -- ! pc`
2192			`wal 006344 -- cmp= S-D !`
2193			`brm 14`
2194			`d=000011 -- ! mem(6344) 1 PS: cmp 1,2: N=1,C=1 ok`
2195			`d=115244 -- ! mem(6346) 1 BNE,BLT,BLE,BMI,BLOS,BVC,BLO`
2196			`d=000004 -- ! mem(6350) 2 PS: cmp 1,1: Z=1 ok`
2197			`d=054630 -- ! mem(6352) 2 BEQ,BGE,BLE,BPL,BLOS,BVC,BHIS`
2198			`d=000000 -- ! mem(6354) 3 PS: cmp 2,1: none ok`
2199			`d=052524 -- ! mem(6356) 3 BNE,BGE,BGT,BPL,BHI,BVC,BHIS`
2200			`d=000010 -- ! mem(6360) 4 PS: cmp -1,2: N=1`
2201			`d=053244 -- ! mem(6362) 4 BNE,BLT,BLE,BMI,BHI,BVC,BHIS ok`
2202			`d=000001 -- ! mem(6364) 5 PS: cmp 2,-1: C=1`
2203			`d=114524 -- ! mem(6366) 5 BNE,BGE,BGT,BPL,BLOS,BVC,BLO ok`
2204			`d=000002 -- ! mem(6370) 6 PS: cmp 10..,07..: V=1`
2205			`d=062644 -- ! mem(6372) 6 BNE,BLT,BLE,BPL,BHI,BVS,BHIS ok`
2206			`d=000013 -- ! mem(6374) 7 PS: cmp 07..,10..: N=1,V=1,C=1`
2207			`d=125124 -- ! mem(6376) 7 BNE,BGE,BGT,BMI,BLOS,BVS,BLO ok`
2208			`#`
2209			`#-----------------------------------------------------------------------------`
2210			`C Setup code 24 [base 6400] (test MARK instruction)`
2211			`#`
2212			`wal 006400 -- code (main):`
2213			`bwm 13`
2214			`010546 -- mov r5,-(sp) ; push old r5 on stack`
2215			`012746 -- mov #101,-(sp) ; push 1st parameter`
2216			`000101`
2217			`012746 -- mov #102,-(sp) ; push 2nd parameter`
2218			`000102`
2219			`012746 -- mov #103,-(sp) ; push 3rd parameter`
2220			`000103`
2221			`012746 -- mov #mark3,-(sp) ; push MARK 3`
2222			`#6420`
2223			`006403`
2224			`010605 -- mov sp,r5 ; address of MARK N`
2225			`004737 -- jsr pc,@#6440 ; call procedure`
2226			`006440`
2227			`000000 -- halt`
2228			`#`
2229			`# stack of procedure when called:`
2230			`# addr content`
2231			`# 576 12(sp) 10(r5) old r5`
2232			`# 574 10(sp) 6(r5) param1`
2233			`# 572 6(sp) 4(r5) param2`
2234			`# 570 4(sp) 2(r5) param3`
2235			`# 566 2(sp) (r5) mark 3`
2236			`# 564 (sp) return pc`
2237			`#`
2238			`wal 006440 -- code (procedure):`
2239			`bwm 7`
2240			`016520 -- mov 6(r5),(r0)+ ; get 1st param`
2241			`000006`
2242			`016520 -- mov 4(r5),(r0)+ ; get 2nd param`
2243			`000004`
2244			`016520 -- mov 2(r5),(r0)+ ; get 3rd param`
2245			`000002`
2246			`000205 -- rts r5`
2247			`#`
2248			`C Exec code 24 (test MARK instruction)`
2249			`#`
2250			`wr0 006470 -- r0=6470`
2251			`wr5 123456 -- r5=123456`
2252			`wsp 001400 -- sp=1400`
2253			`stapc 006400 -- start @ 6400`
2254			`wtgo`
2255			`rr0 d=006476 -- ! r0=6476 (3 words written)`
2256			`rr5 d=123456 -- ! r5 (restored)`
2257			`rsp d=001400 -- ! sp`
2258			`rpc d=006432 -- ! pc`
2259			`wal 001364 -- check stack`
2260			`brm 6`
2261			`d=006430 -- ! mem(1364)`
2262			`d=006403 -- ! mem(1366)`
2263			`d=000103 -- ! mem(1370)`
2264			`d=000102 -- ! mem(1372)`
2265			`d=000101 -- ! mem(1374)`
2266			`d=123456 -- ! mem(1376)`
2267			`wal 006470 -- check stored values`
2268			`brm 3`
2269			`d=000101 -- ! mem(6470) (1st param)`
2270			`d=000102 -- ! mem(6472) (2nd param)`
2271			`d=000103 -- ! mem(6474) (3rd param)`
2272			`#`
2273			`# probably first and last time MARK is used. It's a bastard anyway.`
2274			`#`
2275			`#-----------------------------------------------------------------------------`
2276			`C Setup code 25 [base 6500; use 65-66] (basic byte instruction and cc test)`
2277			`#`
2278			`wal 006500 -- code:`
2279			`bwm 22`
2280			`110124 -- movb r1,(r4)+ (#123, #333)`
2281			`120124 -- cmpb r1,(r4)+ (#123, #333)`
2282			`120224 -- cmpb r2,(r4)+ (#321, #111)`
2283			`120124 -- cmpb r1,(r4)+ (#123, #123)`
2284			`105024 -- clrb (r4)+ (#333)`
2285			`130124 -- bitb r1,(r4)+ (#123, #11)`
2286			`130124 -- bitb r1,(r4)+ (#123, #44)`
2287			`140124 -- bicb r1,(r4)+ (#123, #333)`
2288			`#6520`
2289			`150124 -- bisb r1,(r4)+ (#123, #111)`
2290			`105124 -- comb (r4)+ (#321)`
2291			`105224 -- incb (r4)+ (#321)`
2292			`105324 -- decb (r4)+ (#321)`
2293			`105424 -- negb (r4)+ (#321)`
2294			`105724 -- tstb (r4)+ (#321)`
2295			`106024 -- rorb (r4)+ (#201) Cin=0; Cout=1`
2296			`106024 -- rorb (r4)+ (#021) Cin=1; Cout=1`
2297			`#6540`
2298			`106124 -- rolb (r4)+ (#210) Cin=1; Cout=1`
2299			`106224 -- asrb (r4)+ (#020)`
2300			`106224 -- asrb (r4)+ (#220)`
2301			`106324 -- aslb (r4)+ (#020)`
2302			`106324 -- aslb (r4)+ (#220)`
2303			`000000 -- halt`
2304			`#`
2305			`wal 000014 -- vector: 14`
2306			`bwm 2`
2307			`006560 -- PC:6560`
2308			`000000 -- PS:0`
2309			`#`
2310			`wal 006560 -- code: (trap 14):`
2311			`bwm 3`
2312			`016625 -- mov 2(sp),(r5)+`
2313			`000002`
2314			`000006 -- rtt`
2315			`#`
2316			`wal 006600 -- data 1:`
2317			`bwm 11`
2318			`155733 -- (#333,#333)`
2319			`051511 -- (#123,#111)`
2320			`044333 -- (#11 ,#333)`
2321			`155444 -- (#333,#44)`
2322			`150511 -- (#321,#111)`
2323			`150721 -- (#321,#321)`
2324			`150721 -- (#321,#321)`
2325			`010601 -- (#021,#201)`
2326			`#6620`
2327			`010210 -- (#020,#210)`
2328			`010220 -- (#020,#220)`
2329			`000220 -- (....,#220)`
2330			`#`
2331			`C Exec code 25 (basic byte instruction and cc test)`
2332			`#`
2333			`wr1 000123 -- r1=123`
2334			`wr2 000321 -- r2=321`
2335			`wr4 006600 -- r4=6600`
2336			`wr5 006626 -- r5=6626`
2337			`wsp 001374 -- sp=1374`
2338			`wal 001374 -- setup stack with rtt return frame setting T flag`
2339			`bwm 2`
2340			`006500 -- start address (code 25 @ 6500)`
2341			`000020 -- set T flag in PSW`
2342			`stapc 006564 -- start @ 6564 -> rtt -> 6500 from stack`
2343			`wtgo`
2344			`rr1 d=000123 -- ! r1=123`
2345			`rr2 d=000321 -- ! r2=321`
2346			`rr4 d=006625 -- ! r4=6625`
2347			`rr5 d=006700 -- ! r5=6700`
2348			`rsp d=001400 -- ! sp=1400`
2349			`rpc d=006554 -- ! pc=6554`
2350			`wal 006600`
2351			`brm 11`
2352			`d=155523 -- ! mem(6600)=123; movb r1,(r4)+ (#123, #333)`
2353			`# ! mem(6601)=333; cmpb r1,(r4)+ (#123, #333)`
2354			`d=051511 -- ! mem(6602)=111; cmpb r1,(r4)+ (#321, #111)`
2355			`# ! mem(6603)=123; cmpb r1,(r4)+ (#123, #123)`
2356			`d=044000 -- ! mem(6604)=000; clrb (r4)+ (#333)`
2357			`# ! mem(6605)=011; bitb r1,(r4)+ (#123, #11)`
2358			`d=104044 -- ! mem(6606)=044; bitb r1,(r4)+ (#123, #44)`
2359			`# ! mem(6607)=210; bicb r1,(r4)+ (#123, #333)`
2360			`d=027133 -- ! mem(6610)=133; bisb r1,(r4)+ (#123, #111)`
2361			`# ! mem(6611)=056; comb (r4)+ (#321)`
2362			`d=150322 -- ! mem(6612)=322; incb (r4)+ (#321)`
2363			`# ! mem(6613)=320; decb (r4)+ (#321)`
2364			`d=150457 -- ! mem(6614)=057; negb (r4)+ (#321)`
2365			`# ! mem(6615)=321; tstb (r4)+ (#321)`
2366			`d=104100 -- ! mem(6616)=100; rorb (r4)+ (#201) Cout=1`
2367			`# ! mem(6617)=210; rorb (r4)+ (#021) Cout=1`
2368			`d=004021 -- ! mem(6620)=021; rolb (r4)+ (#210) Cout=1`
2369			`# ! mem(6621)=010; asrb (r4)+ (#020)`
2370			`d=020310 -- ! mem(6622)=310; asrb (r4)+ (#220)`
2371			`# ! mem(6623)=040; aslb (r4)+ (#020)`
2372			`d=000040 -- ! mem(6624)=040; aslb (r4)+ (#220)`
2373			`#`
2374			`wal 006626 -- NZVC`
2375			`brm 21`
2376			`d=000020 -- ! mem(6626)=0000; movb r1,(r4)+ (#123, #333)`
2377			`d=000021 -- ! mem(6630)=000C; cmpb r1,(r4)+ (#123, #333)`
2378			`d=000030 -- ! mem(6632)=N000; cmpb r1,(r4)+ (#321, #111)`
2379			`d=000024 -- ! mem(6634)=0Z00; cmpb r1,(r4)+ (#123, #123)`
2380			`d=000024 -- ! mem(6636)=0Z00; clrb (r4)+ (#333)`
2381			`d=000020 -- ! mem(6640)=0000; bitb r1,(r4)+ (#123, #11)`
2382			`d=000024 -- ! mem(6642)=0Z00; bitb r1,(r4)+ (#123, #44)`
2383			`d=000030 -- ! mem(6644)=N000; bicb r1,(r4)+ (#123, #333)`
2384			`d=000020 -- ! mem(6646)=0000; bisb r1,(r4)+ (#123, #111)`
2385			`d=000021 -- ! mem(6650)=000C; comb (r4)+ (#321)`
2386			`d=000031 -- ! mem(6652)=N00C; incb (r4)+ (#321) keep C!`
2387			`d=000031 -- ! mem(6654)=N00C; decb (r4)+ (#321) keep C!`
2388			`d=000021 -- ! mem(6656)=000C; negb (r4)+ (#321)`
2389			`d=000030 -- ! mem(6660)=N000; tstb (r4)+ (#321)`
2390			`d=000023 -- ! mem(6662)=00VC; rorb (r4)+ (#201)`
2391			`d=000031 -- ! mem(6664)=N00C; rorb (r4)+ (#021)`
2392			`d=000023 -- ! mem(6666)=00VC; rolb (r4)+ (#210)`
2393			`d=000020 -- ! mem(6670)=0000; asrb (r4)+ (#020)`
2394			`d=000032 -- ! mem(6672)=N0V0; asrb (r4)+ (#220)`
2395			`d=000020 -- ! mem(6674)=0000; aslb (r4)+ (#020)`
2396			`d=000023 -- ! mem(6676)=00VC; aslb (r4)+ (#220)`
2397			`#`
2398			`rst -- console reset (to clear T flag)`
2399			`wal 000014 -- vector: 14 -> trap catcher again`
2400			`bwm 2`
2401			`000016 -- PC:16`
2402			`000000 -- PS:0`
2403			`#-----------------------------------------------------------------------------`
2404			`C Setup code 26 [base 6700; use 67-70] (address modes torture tests)`
2405			`#`
2406			`wal 006700 -- code test 1:`
2407			`bwm 5`
2408			`012020 -- mov (r0)+,(r0)+`
2409			`062020 -- add (r0)+,(r0)+`
2410			`014141 -- mov -(r1),-(r1)`
2411			`064141 -- add -(r1),-(r1)`
2412			`#6710`
2413			`000000 -- halt`
2414			`#-----`
2415			`wal 006720 -- code test 2:`
2416			`bwm 8`
2417			`016767 -- mov a(pc),b(pc)`
2418			`000014 -- here pc=6724, target@6740 --> index=14`
2419			`000014 -- here pc=6726, target@6742 --> index=14`
2420			`066767 -- add c(pc),d(pc)`
2421			`#6730`
2422			`000012 -- here pc=6732, target@6744 --> index=12`
2423			`000012 -- here pc=6734, target@6746 --> index=12`
2424			`000000 -- halt`
2425			`000000 -- halt`
2426			`#`
2427			`wal 006740 -- data (pc relative) for test 2:`
2428			`bwm 4`
2429			`006740 -- target for mov a(pc)`
2430			`006742 -- target for ,b(pc)`
2431			`000011 -- target for add c(pc)`
2432			`006746 -- target for ,d(pc)`
2433			`#-----`
2434			`wal 006750 -- code test 3:`
2435			`bwm 12`
2436			`012727 -- mov #1,#0`
2437			`000001`
2438			`000000`
2439			`062727 -- add #1,#2`
2440			`#6760`
2441			`000001`
2442			`000002`
2443			`016767 -- mov -14(pc),2(pc)`
2444			`177764 -- pc here: 6770: read dst of mov #1,#0 (@6754)`
2445			`000002 -- pc here: 6772: write src of add #0,r0 (@6774)`
2446			`062700 -- add #0,r0`
2447			`000000`
2448			`000000 -- halt`
2449			`#-----`
2450			`wal 007000 -- code test 4:`
2451			`bwm 8`
2452			`005200 -- inc r0`
2453			`010001 -- mov r0,r1`
2454			`010702 -- mov pc,r2`
2455			`005007 -- clr pc`
2456			`000000 -- halt`
2457			`000000 -- halt`
2458			`005203 -- L1: inc r3`
2459			`000000 -- halt`
2460			`#-----`
2461			`wal 000000 -- code test 4 (handler at address=0):`
2462			`bwm 2`
2463			`000137 -- jmp @#L1`
2464			`007014`
2465			`#-----`
2466			`wal 007020 -- code test 5:`
2467			`bwm 11`
2468			`012707 -- mov #L2,pc`
2469			`007032`
2470			`000000 -- halt`
2471			`000000 -- halt`
2472			`000000 -- halt`
2473			`062707 -- L2: add #2,pc`
2474			`000002`
2475			`005201 -- inc r1`
2476			`#7040`
2477			`005201 -- inc r1`
2478			`005201 -- inc r1`
2479			`000000 -- halt`
2480			`#-----`
2481			`wal 007060 -- data for test 1 (r0)+ part:`
2482			`bwm 4`
2483			`000111`
2484			`000222`
2485			`000333`
2486			`000444`
2487			`wal 007070 -- data for test 1 -(r1) part:`
2488			`bwm 4`
2489			`000111`
2490			`000222`
2491			`000333`
2492			`000444`
2493			`C Exec code 26 (address modes torture tests)`
2494			`C Exec test 26.1 (test src-dst update hazards with (r0)+,(r0)+ ect):`
2495			`#`
2496			`wr0 007060 -- r0=7060 (input data for (r0)+...)`
2497			`wr1 007100 -- r1=7100 (input data for -(r1)...)`
2498			`wsp 001400 -- sp=1400`
2499			`stapc 006700 -- start @ 6700`
2500			`wtgo`
2501			`rr0 d=007070 -- ! r0`
2502			`rr1 d=007070 -- ! r1`
2503			`rpc d=006712 -- ! pc`
2504			`wal 007060 --`
2505			`brm 4`
2506			`d=000111 -- ! mem(7060)`
2507			`d=000111 -- ! mem(7062)`
2508			`d=000333 -- ! mem(7064)`
2509			`d=000777 -- ! mem(7066)`
2510			`wal 007070 --`
2511			`brm 4`
2512			`d=000333 -- ! mem(7070)`
2513			`d=000222 -- ! mem(7072)`
2514			`d=000444 -- ! mem(7074)`
2515			`d=000444 -- ! mem(7076)`
2516			`C Exec test 26.2 (test indexed mode with pc (mode 67)):`
2517			`#`
2518			`wsp 001400 -- sp=1400`
2519			`stapc 006720 -- start @ 6720`
2520			`wtgo`
2521			`rpc d=006736 -- ! pc`
2522			`wal 006740 --`
2523			`brm 4`
2524			`d=006740 -- ! mem(6740)`
2525			`d=006740 -- ! mem(6742)`
2526			`d=000011 -- ! mem(6744)`
2527			`d=006757 -- ! mem(6746)`
2528			`C Exec test 26.3 (test (pc)+ as dst):`
2529			`#`
2530			`wr0 000111 -- r0=0111`
2531			`wsp 001400 -- sp=1400`
2532			`stapc 006750 -- start @ 6750`
2533			`wtgo`
2534			`rr0 d=000112 -- ! r0`
2535			`rpc d=007000 -- ! pc`
2536			`wal 006752 --`
2537			`brm 2`
2538			`d=000001 -- ! mem(6752) src mov #1,#0`
2539			`d=000001 -- ! mem(6754) dst mov #1,#0`
2540			`wal 006760 --`
2541			`brm 2`
2542			`d=000001 -- ! mem(6760) src add #1,#2`
2543			`d=000003 -- ! mem(6762) dst add #1,#2`
2544			`wal 006774 -- !`
2545			`rmi d=000001 -- ! mem(6774) dst mov -12(pc),2(pc)`
2546			`C Exec test 26.4 (test pc as dst in clr):`
2547			`#`
2548			`wr0 000100 -- r0=0100`
2549			`wr1 000110 -- r1=0110`
2550			`wr2 000120 -- r2=0120`
2551			`wr3 000130 -- r3=0130`
2552			`wsp 001400 -- sp=1400`
2553			`stapc 007000 -- start @ 7000`
2554			`wtgo`
2555			`rr0 d=000101 -- ! r0`
2556			`rr1 d=000101 -- ! r1`
2557			`rr2 d=007006 -- ! r2 (pc after mov pc,r2)`
2558			`rr3 d=000131 -- ! r3`
2559			`rpc d=007020 -- ! pc`
2560			`# cleanup 'vector 0':`
2561			`wal 000000`
2562			`bwm 2`
2563			`000000`
2564			`000000`
2565			`C Exec test 26.5 (test pc as dst in mov and add):`
2566			`#`
2567			`wr1 000000 -- r1=0`
2568			`wsp 001400 -- sp=1400`
2569			`stapc 007020 -- start @ 7020`
2570			`wtgo`
2571			`rr1 d=000002 -- ! r1`
2572			`rpc d=007046 -- ! pc`
2573			`#-----------------------------------------------------------------------------`
2574			`C Setup code 27 [base 7100; use 71-101] (test ASH/ASHC instruction)`
2575			`#`
2576			`wal 007100 -- code test 1 (ash)`
2577			`bwm 7`
2578			`000230 -- spl 0`
2579			`012004 -- L1: mov (r0)+,r4 -- load low`
2580			`072420 -- ash (r0)+,r4 -- shift`
2581			`011321 -- mov (r3),(r1)+ -- store psw`
2582			`010421 -- mov r4,(r1)+ -- store low`
2583			`077205 -- sob r2,L1 (.-5)`
2584			`000000 -- halt`
2585			`#-----`
2586			`wal 007120 -- code test 2 (ashc even)`
2587			`bwm 9`
2588			`000230 -- spl 0`
2589			`012004 -- L1: mov (r0)+,r4 -- load high`
2590			`012005 -- mov (r0)+,r5 -- load low`
2591			`073420 -- ashc (r0)+,r4 -- shift`
2592			`011321 -- mov (r3),(r1)+ -- store psw`
2593			`010421 -- mov r4,(r1)+ -- store high`
2594			`010521 -- mov r5,(r1)+ -- store low`
2595			`077207 -- sob r2,L1 (.-7)`
2596			`#7140`
2597			`000000 -- halt`
2598			`#-----`
2599			`wal 007150 -- code test 3 (ashc odd)`
2600			`bwm 7`
2601			`000230 -- spl 0`
2602			`012005 -- L1: mov (r0)+,r5 -- load low`
2603			`073520 -- ashc (r0)+,r5 -- shift`
2604			`011321 -- mov (r3),(r1)+ -- store psw`
2605			`#7160`
2606			`010521 -- mov r5,(r1)+ -- store low`
2607			`077205 -- sob r2,L1 (.-5)`
2608			`000000 -- halt`
2609			`#-----`
2610			`wal 007200 -- data 1:`
2611			`bwm 24`
2612			`000200 -- (000200, +1)`
2613			`000001 --`
2614			`000200 -- (000200, -1)`
2615			`177777 --`
2616			`000200 -- (000200, +7)`
2617			`000007 --`
2618			`000200 -- (000200, +8)`
2619			`000010 --`
2620			`#7220`
2621			`000200 -- (000200, +9)`
2622			`000011 --`
2623			`000200 -- (000200, -7)`
2624			`177771 --`
2625			`100000 -- (100000, 0)`
2626			`000000 --`
2627			`000000 -- (000000, 0)`
2628			`000000 --`
2629			`#7240`
2630			`000200 -- (000200, -8)`
2631			`177770 --`
2632			`000200 -- (000200, 0)`
2633			`000000 --`
2634			`100000 -- (100000, -6)`
2635			`177772 --`
2636			`040000 -- (040000, +1)`
2637			`000001 --`
2638			`#-----`
2639			`wal 007300 -- data 2:`
2640			`bwm 30`
2641			`000020 -- (000020,000200, +1)`
2642			`000200 --`
2643			`000001 --`
2644			`000020 -- (000020,000200, -1)`
2645			`000200 --`
2646			`177777 --`
2647			`000020 -- (000020,000200, +7)`
2648			`000200 --`
2649			`#7320`
2650			`000007 --`
2651			`000020 -- (000020,000200, +8)`
2652			`000200 --`
2653			`000010 --`
2654			`000020 -- (000020,000200, +9)`
2655			`000200 --`
2656			`000011 --`
2657			`000000 -- (000000,000200, +23)`
2658			`#7340`
2659			`000200 --`
2660			`000027 --`
2661			`000000 -- (000000,000200, +24)`
2662			`000200 --`
2663			`000030 --`
2664			`000000 -- (000000,000200, +25)`
2665			`000200 --`
2666			`000031 --`
2667			`#7360`
2668			`000020 -- (000020,000200, -5)`
2669			`000200 --`
2670			`177773 --`
2671			`000020 -- (000020,000200, -8)`
2672			`000200 --`
2673			`177770 --`
2674			`#-----`
2675			`wal 007440 -- data 3:`
2676			`bwm 6`
2677			`000200 -- (000200, +1)`
2678			`000001 --`
2679			`000200 -- (000200, -1)`
2680			`177777 --`
2681			`000201 -- (000201, -1)`
2682			`177777 --`
2683			`#`
2684			`C Exec code 27 (test ASH/ASHC instruction)`
2685			`C Exec test 27.1 (test ash)`
2686			`#`
2687			`wr0 007200 -- r0=7200 (input data)`
2688			`wr1 007500 -- r1=7500 (output data)`
2689			`wr2 000014 -- r2=14 (test count)`
2690			`wr3 177776 -- r3=177776 (#PSW)`
2691			`wsp 001400 -- sp=1400`
2692			`stapc 007100 -- start @ 7100`
2693			`wtgo`
2694			`rr0 d=007260 -- ! r0`
2695			`rr1 d=007560 -- ! r1`
2696			`rpc d=007116 -- ! pc`
2697			`wal 007500 --`
2698			`brm 24`
2699			`d=000000 -- ! mem(7500) ash +1, 000200 -> nzvc=0`
2700			`d=000400 -- ! mem(7502)`
2701			`d=000000 -- ! mem(7504) ash -1, 000200 -> nzvc=0`
2702			`d=000100 -- ! mem(7506)`
2703			`d=000000 -- ! mem(7510) ash +7, 000200 -> nzvc=0`
2704			`d=040000 -- ! mem(7512)`
2705			`d=000012 -- ! mem(7514) ash +8, 000200 -> n1,z0,v1,c0`
2706			`d=100000 -- ! mem(7516)`
2707			`d=000007 -- ! mem(7520) ash +9, 000200 -> n0,z1,v1,c1`
2708			`d=000000 -- ! mem(7522)`
2709			`d=000000 -- ! mem(7524) ash -7, 000200 -> nzvc=0`
2710			`d=000001 -- ! mem(7526)`
2711			`d=000010 -- ! mem(7530) ash 0, 100000 -> n1,z0,v0,c0`
2712			`d=100000 -- ! mem(7532)`
2713			`d=000004 -- ! mem(7534) ash 0, 000000 -> n0,z1,v0,c0`
2714			`d=000000 -- ! mem(7536)`
2715			`d=000005 -- ! mem(7540) ash -8, 000200 -> n1,z1,v0,c1`
2716			`d=000000 -- ! mem(7542)`
2717			`d=000000 -- ! mem(7544) ash 0, 000200 -> n0,z0,v0,c0`
2718			`d=000200 -- ! mem(7546)`
2719			`d=000010 -- ! mem(7550) ash -6, 100000 -> n1,z0,v0,c0`
2720			`d=177000 -- ! mem(7552)`
2721			`d=000012 -- ! mem(7554) ash +1, 040000 -> n1,z0,v1,c0`
2722			`d=100000 -- ! mem(7556)`
2723			`#----`
2724			`C Exec test 27.2 (test ashc even)`
2725			`#`
2726			`wr0 007300 -- r0=7300 (input data)`
2727			`wr1 007600 -- r1=7600 (output data)`
2728			`wr2 000012 -- r2=12 (test count)`
2729			`wr3 177776 -- r3=177776 (#PSW)`
2730			`wsp 001400 -- sp=1400`
2731			`stapc 007120 -- start @ 7120`
2732			`wtgo`
2733			`rr0 d=007374 -- ! r0`
2734			`rr1 d=007674 -- ! r1`
2735			`rpc d=007142 -- ! pc`
2736			`wal 007600 --`
2737			`brm 30`
2738			`d=000000 -- ! mem(7600) ashc +1, 000020,000200 -> nzvc=0`
2739			`d=000040 -- ! mem(7602)`
2740			`d=000400 -- ! mem(7604)`
2741			`d=000000 -- ! mem(7606) ashc -1, 000020,000200 -> nzvc=0`
2742			`d=000010 -- ! mem(7610)`
2743			`d=000100 -- ! mem(7612)`
2744			`d=000000 -- ! mem(7614) ashc +7, 000020,000200 -> nzvc=0`
2745			`d=004000 -- ! mem(7616)`
2746			`d=040000 -- ! mem(7620)`
2747			`d=000000 -- ! mem(7622) ashc +8, 000020,000200 -> nzvc=0`
2748			`d=010000 -- ! mem(7624)`
2749			`d=100000 -- ! mem(7626)`
2750			`d=000000 -- ! mem(7630) ashc +9, 000020,000200 -> nzvc=0`
2751			`d=020001 -- ! mem(7632)`
2752			`d=000000 -- ! mem(7634)`
2753			`d=000000 -- ! mem(7636) ashc +23, 000000,000200 -> nzvc=0`
2754			`d=040000 -- ! mem(7640)`
2755			`d=000000 -- ! mem(7642)`
2756			`d=000012 -- ! mem(7644) ashc +24, 000000,000200 -> n1z0v1c0`
2757			`d=100000 -- ! mem(7646)`
2758			`d=000000 -- ! mem(7650)`
2759			`d=000007 -- ! mem(7652) ashc +25, 000000,000200 -> n0z1v1c1`
2760			`d=000000 -- ! mem(7654)`
2761			`d=000000 -- ! mem(7656)`
2762			`d=000000 -- ! mem(7660) ashc -5, 000020,000200 -> nzvc=0`
2763			`d=000000 -- ! mem(7662)`
2764			`d=100004 -- ! mem(7664)`
2765			`d=000001 -- ! mem(7666) ashc -8, 000020,000200 -> n0z0v0c1`
2766			`d=000000 -- ! mem(7670)`
2767			`d=010000 -- ! mem(7672)`
2768			`#----`
2769			`C Exec test 27.3 (test ashc odd)`
2770			`#`
2771			`wr0 007440 -- r0=7440 (input data)`
2772			`wr1 007740 -- r1=7740 (output data)`
2773			`wr2 000003 -- r2=3 (test count)`
2774			`wr3 177776 -- r3=177776 (#PSW)`
2775			`wsp 001400 -- sp=1400`
2776			`stapc 007150 -- start @ 7150`
2777			`wtgo`
2778			`rr0 d=007454 -- ! r0`
2779			`rr1 d=007754 -- ! r1`
2780			`rpc d=007166 -- ! pc`
2781			`wal 007740 --`
2782			`brm 6`
2783			`d=000000 -- ! mem(7740) ashc +1, 000200 -> nzvc=0`
2784			`d=000400 -- ! mem(7742)`
2785			`d=000000 -- ! mem(7744) ashc -1, 000200 -> nzvc=0`
2786			`d=000100 -- ! mem(7746)`
2787			`d=000001 -- ! mem(7750) ashc -1, 000201 -> n0z0v0c1`
2788			`d=100100 -- ! mem(7752)`
2789			`#-----------------------------------------------------------------------------`
2790			`C Setup code 30 [base 10200; use 102-103] (test MUL instruction)`
2791			`#`
2792			`wal 010200 -- code test 1 (mul even)`
2793			`bwm 8`
2794			`000230 -- spl 0`
2795			`012004 -- L1: mov (r0)+,r4 -- load p1`
2796			`070420 -- mul (r0)+,r4 -- mul`
2797			`011321 -- mov (r3),(r1)+ -- store psw`
2798			`010421 -- mov r4,(r1)+ -- store p_high`
2799			`010521 -- mov r5,(r1)+ -- store p_low`
2800			`077206 -- sob r2,L1 (.-6)`
2801			`000000 -- halt`
2802			`#-----`
2803			`wal 010220 -- code test 2 (mul odd)`
2804			`bwm 7`
2805			`000230 -- spl 0`
2806			`012005 -- L1: mov (r0)+,r5 -- load p1`
2807			`070520 -- mul (r0)+,r5 -- mul`
2808			`010521 -- mov r5,(r1)+ -- store p_low`
2809			`060403 -- add r4,r3 -- check r4`
2810			`077205 -- sob r2,L1 (.-5)`
2811			`000000 -- halt`
2812			`#`
2813			`# 31022 074456 * 9562 022532 -> 296632364 010656,040054`
2814			`# 18494 044076 * -24041 121027 -> -444614254 162577,134622`
2815			`# -12549 147373 * 2397 004535 -> -30079953 177065,002057`
2816			`# -20493 127763 * -23858 121316 -> 488921994 016444,055612`
2817			`#`
2818			`# 105 000151 * 198 000306 -> 20790 000000,050466`
2819			`# 233 000351 * -94 177642 -> -21902 177777,125162`
2820			`# 186 000272 * -205 177463 -> -38130 177777,065416`
2821			`#`
2822			`wal 010240 -- data 1:`
2823			`bwm 16`
2824			`074456 --`
2825			`022532 --`
2826			`044076 --`
2827			`121027 --`
2828			`147373 --`
2829			`004535 --`
2830			`127763 --`
2831			`121316 --`
2832			`#10260`
2833			`000151 --`
2834			`000306 --`
2835			`000351 --`
2836			`177642 --`
2837			`000272 --`
2838			`177463 --`
2839			`000000 --`
2840			`000272 --`
2841			`#`
2842			`C Exec code 30 (test MUL instruction)`
2843			`C Exec test 30.1 (test mul even)`
2844			`#`
2845			`wr0 010240 -- r0=10240 (input data)`
2846			`wr1 010300 -- r1=10300 (output data)`
2847			`wr2 000010 -- r2=10 (test count)`
2848			`wr3 177776 -- r3=177776 (#PSW)`
2849			`wsp 001400 -- sp=1400`
2850			`stapc 010200 -- start @ 10200`
2851			`wtgo`
2852			`rr0 d=010300 -- ! r0`
2853			`rr1 d=010360 -- ! r1`
2854			`rpc d=010220 -- ! pc`
2855			`wal 010300 --`
2856			`brm 24`
2857			`d=000001 -- ! mem(10300) mul 074456,022532 -> n0z0v0c1`
2858			`d=010656 -- ! mem(10302)`
2859			`d=040054 -- ! mem(10304)`
2860			`d=000011 -- ! mem(10306) mul 044076,121027 -> n1z0v0c1`
2861			`d=162577 -- ! mem(10310)`
2862			`d=134622 -- ! mem(10312)`
2863			`d=000011 -- ! mem(10314) mul 147373,004535 -> n1z0v0c1`
2864			`d=177065 -- ! mem(10316)`
2865			`d=002057 -- ! mem(10320)`
2866			`d=000001 -- ! mem(10322) mul 127763,121316 -> n0z0v0c1`
2867			`d=016444 -- ! mem(10324)`
2868			`d=055612 -- ! mem(10326)`
2869			`d=000000 -- ! mem(10330) mul 000151,000306 -> n0z0v0c0`
2870			`d=000000 -- ! mem(10332)`
2871			`d=050466 -- ! mem(10334)`
2872			`d=000010 -- ! mem(10336) mul 000351,177642 -> n1z0v0c0`
2873			`d=177777 -- ! mem(10340)`
2874			`d=125162 -- ! mem(10342)`
2875			`d=000011 -- ! mem(10344) mul 000272,177463 -> n1z0v0c1`
2876			`d=177777 -- ! mem(10346)`
2877			`d=065416 -- ! mem(10350)`
2878			`d=000004 -- ! mem(10352) mul 000000,000272 -> n0z1v0c0`
2879			`d=000000 -- ! mem(10354)`
2880			`d=000000 -- ! mem(10356)`
2881			`#----`
2882			`C Exec test 30.2 (test mul odd)`
2883			`#`
2884			`wr0 010240 -- r0=10240 (input data)`
2885			`wr1 010360 -- r1=10300 (output data)`
2886			`wr2 000010 -- r2=10 (test count)`
2887			`wr3 000000 -- r3=0`
2888			`wr4 000000 -- r4=0`
2889			`wsp 001400 -- sp=1400`
2890			`stapc 010220 -- start @ 10220`
2891			`wtgo`
2892			`rr0 d=010300 -- ! r0`
2893			`rr1 d=010400 -- ! r1`
2894			`rr3 d=000000 -- ! r3`
2895			`rpc d=010236 -- ! pc`
2896			`wal 010360 --`
2897			`brm 8`
2898			`d=040054 -- ! mem(10360)`
2899			`d=134622 -- ! mem(10362)`
2900			`d=002057 -- ! mem(10364)`
2901			`d=055612 -- ! mem(10366)`
2902			`d=050466 -- ! mem(10370)`
2903			`d=125162 -- ! mem(10372)`
2904			`d=065416 -- ! mem(10374)`
2905			`d=000000 -- ! mem(10376)`
2906			`#`
2907			`#-----------------------------------------------------------------------------`
2908			`C Setup code 31 [base 10400; use 104-110] (test DIV instruction, also ADC,SXT)`
2909			`# Note: test 2 uses sbc too, but if div/div work correctly we have always`
2910			`# C=0 for sbc, so sbc isn't tested. adc has C=0 or C=1 though.`
2911			`#`
2912			`wal 010400 -- code test 1`
2913			`bwm 8`
2914			`012004 -- L1: mov (r0)+,r4 -- load dd high`
2915			`012005 -- mov (r0)+,r5 -- load dd low`
2916			`071420 -- div (r0)+,r4 -- div`
2917			`011321 -- mov (r3),(r1)+ -- store psw`
2918			`010421 -- mov r4,(r1)+ -- store q`
2919			`010521 -- mov r5,(r1)+ -- store r`
2920			`077207 -- sob r2,L1 (.-7)`
2921			`000000 -- halt`
2922			`#-----`
2923			`wal 010420 -- code test 2`
2924			`bwm 24`
2925			`012146 -- L1: mov (r1)+,-(sp) -- save psw on stack`
2926			`016002 -- mov 4(r0),r2 -- load divisor`
2927			`000004`
2928			`070221 -- mul (r1)+,r2 -- multiply with quotient`
2929			`061103 -- add (r1),r3 -- add reminder`
2930			`005502 -- adc r2`
2931			`005721 -- tst (r1)+`
2932			`006704 -- sxt r4`
2933			`#10440`
2934			`060402 -- add r4,r2`
2935			`166003 -- sub 2(r0),r3 -- subtract divident`
2936			`000002`
2937			`005602 -- sbc r2`
2938			`161002 -- sub (r0),r2`
2939			`001002 -- bne L2 (.+2) -- error if !=0`
2940			`005703 -- tst r3`
2941			`001404 -- beq L3 (.+4) -- error if !=0`
2942			`#10460`
2943			`032726 -- L2: bit #3,(sp)+ -- check V,C bits`
2944			`000003`
2945			`001001 -- bne L3 (.+1) -- if V or C =1, ignore`
2946			`000000 -- halt`
2947			`062700 -- L3: add #6,r0 --`
2948			`000006 --`
2949			`077527 -- sob r5,L1 (.-23)`
2950			`000000 -- halt`
2951			`# r q`
2952			`# 6249 014151 * 9158 021706 + 4989 011575 -> 57233331 001551,047663 y n`
2953			`# 5194 012112 * -23807 121401 + -3990 170152 -> -123657548 174241,021264 n y`
2954			`# -19943 131031 * 27112 064750 + -16037 140533 -> -540710653 157705,064403 y n`
2955			`# -20493 127763 * -23858 121316 + 10744 024770 -> 488932738 016444,102602 y y`
2956			`#`
2957			`# -12549 147373 * 2397 004535 + -11187 152115 -> -30091140 177064,154174 n n`
2958			`# 22620 054134 * -9272 155710 + -19907 131075 -> -209752547 171577,067035 y y`
2959			`# 10723 024743 * 7931 017373 + 9824 023140 -> 85053937 002421,150761 n n`
2960			`# -3548 171044 * -15677 141303 + 3019 005713 -> 55625015 001520,142467 n y`
2961			`#`
2962			`## 1 000001 * -32767 100001 + 0 000000 -> -32767 177777,100001 V=0`
2963			`## -1 177777 * 32767 077777 + 0 000000 -> -32767 177777,100001 V=0`
2964			`# 1 000001 * -32768 100000 + 0 000000 -> -32768 177777,100000 V=1`
2965			`# -1 177777 * ...... ...... + 0 000000 -> -32768 177777,100000 V=1`
2966			`#`
2967			`# 32767 077777 * 32767 077777 + 32766 077776 -> 1073709055 037777,077777 V=0`
2968			`# 32767 077777 * ............ + ............ -> 1073709056 037777,100000 V=1`
2969			`# 32767 077777 * -32767 100001 + -32766 100002 ->-1073709055 140000,100001 V=0`
2970			`# 32767 077777 * ............ + ............ ->-1073709056 140000,100000 V=1`
2971			`#`
2972			`# 32767 077777 * ............ + ............ -> 1073741824 040000,000000 V=1`
2973			`##32767 077777 * ............ + ............ ->-2147483648 100000,000000 V=1`
2974			`#`
2975			`#`
2976			`wal 010500 -- data 1:`
2977			`bwm 63`
2978			`000000 -- (000000,000042, 000005) 34/ 5 -> q: 6 r: 4`
2979			`000042 --`
2980			`000005 --`
2981			`000000 -- (000000,000042, 177773) 34/-5 -> q:-6 r: 4`
2982			`000042 --`
2983			`177773 --`
2984			`177777 -- (177777,177736, 000005) -34/ 5 -> q:-6 r:-4`
2985			`177736 --`
2986			`#010520`
2987			`000005 --`
2988			`177777 -- (177777,177736, 177773) -34/-5 -> q: 6 r:-4`
2989			`177736 --`
2990			`177773 --`
2991			`001551 -- (001551,047663, 014151) 57233331 / 6249`
2992			`047663 -- -> q: 9158 r: 4989`
2993			`014151 --`
2994			`174241 -- (174241,021264, 012112) -123657548 / 5194`
2995			`#010540`
2996			`021264 -- -> q: -23807 r: -3990`
2997			`012112 --`
2998			`157705 -- (157705,064403, 131031) -540710653 / -19943`
2999			`064403 -- -> q: 27112 r: -16037`
3000			`131031 --`
3001			`016444 -- (016444,102602, 127763) 488932738 / -20493`
3002			`102602 -- -> q: -23858 r: 10744`
3003			`127763 --`
3004			`#010560`
3005			`177064 -- (177064,154174, 147373) -30091140 / -12549`
3006			`154174 -- -> q: 2397 r: -11187`
3007			`147373 --`
3008			`171577 -- (171577,067035, 054134) -209752547 / 22620`
3009			`067035 -- -> q: -9272 r: -19907`
3010			`054134 --`
3011			`002421 -- (002421,150761, 024743) 85053937 / 10723`
3012			`150761 -- -> q: 7931 r: 9824`
3013			`#010600`
3014			`024743 --`
3015			`001520 -- (001520,142467, 171044) 55625015 / -3548`
3016			`142467 -- -> q: -15677 r: 3019`
3017			`171044 --`
3018			`001520 -- (001520,142467,000000) 55625015 / 0`
3019			`142467 --`
3020			`000000 --`
3021			`000000 -- (000000,000000,021706) 0 / 9158`
3022			`#010620`
3023			`000000 --`
3024			`021706 --`
3025			`177777 -- (177777,100000,000001) -32768 / 1`
3026			`100000 --`
3027			`000001 --`
3028			`177777 -- (177777,100000,177777) -32768 / -1`
3029			`100000 --`
3030			`177777 --`
3031			`#010640`
3032			`037777 -- (037777,077777,077777) 1073709055 / 32767`
3033			`077777 --`
3034			`077777 --`
3035			`037777 -- (037777,100000,077777) 1073709056 / 32767`
3036			`100000 --`
3037			`077777 --`
3038			`140000 -- (140000,100001,077777) -1073709055 / 32767`
3039			`100001 --`
3040			`#010660`
3041			`077777 --`
3042			`140000 -- (140000,100000,077777) -1073709056 / 32767`
3043			`100000 --`
3044			`077777 --`
3045			`040000 -- (040000,000000,077777) 1073741824 / 32767`
3046			`000000 --`
3047			`077777 --`
3048			`#`
3049			`C Exec code 31 (test DIV instruction, also ADC,SXT)`
3050			`C Exec test 31.1 (test div)`
3051			`#`
3052			`wr0 010500 -- r0=10500 (input data)`
3053			`wr1 010700 -- r1=10700 (output data)`
3054			`wr2 000025 -- r2=25 (test count)`
3055			`wr3 177776 -- r3=177776 (#PSW)`
3056			`wsp 001400 -- sp=1400`
3057			`rst -- console reset ; do reset; cont to start with`
3058			`wps 000000 -- clear psw ; psw cc code dump below`
3059			`wpc 010400 -- pc=10400`
3060			`cont -- cont @ 10400`
3061			`wtgo`
3062			`rr0 d=010676 -- ! r0`
3063			`rr1 d=011076 -- ! r1`
3064			`rpc d=010420 -- ! pc`
3065			`wal 010700 --`
3066			`brm 63`
3067			`d=000000 -- ! mem(10700) div 000000, 000042,000005 -> n0z0v0c0`
3068			`d=000006 -- ! mem(10702) 34/ 5 -> 6,4`
3069			`d=000004 -- ! mem(10704)`
3070			`d=000010 -- ! mem(10706) div 000000,000042, 177773 -> n1z0v0c0`
3071			`d=177772 -- ! mem(10710) 34/-5 -> -6,4`
3072			`d=000004 -- ! mem(10712)`
3073			`d=000010 -- ! mem(10714) div 177777,177736, 000005 -> n1z0v0c0`
3074			`d=177772 -- ! mem(10716) -34/ 5 -> -6,-4`
3075			`d=177774 -- ! mem(10720)`
3076			`d=000000 -- ! mem(10722) div 177777,177736, 177773 -> n0z0v0c0`
3077			`d=000006 -- ! mem(10724) -34/-5 -> 6,-4`
3078			`d=177774 -- ! mem(10726)`
3079			`d=000000 -- ! mem(10730) div 001551,047663, 014151 -> n0z0v0c0`
3080			`d=021706 -- ! mem(10732) 57233331/6249 -> 9158,4989`
3081			`d=011575 -- ! mem(10734)`
3082			`d=000010 -- ! mem(10736) div 174241,021264, 012112 -> n1z0v0c0`
3083			`d=121401 -- ! mem(10740) -123657548/5194 -> -23807,-3990`
3084			`d=170152 -- ! mem(10742)`
3085			`d=000000 -- ! mem(10744) div 157705,064403, 131031 -> n0z0v0c0`
3086			`d=064750 -- ! mem(10746) -540710653/-19943 -> 27112,-16037`
3087			`d=140533 -- ! mem(10750)`
3088			`d=000010 -- ! mem(10752) div 016444,102602, 127763 -> n1z0v0c0`
3089			`d=121316 -- ! mem(10754) 488932738/-20493 -> -23858, 10744`
3090			`d=024770 -- ! mem(10756)`
3091			`d=000000 -- ! mem(10760) div 177064,154174, 147373 -> n0z0v0c0`
3092			`d=004535 -- ! mem(10762) -30091140/-12549 -> 2397,-11187`
3093			`d=152115 -- ! mem(10764)`
3094			`d=000010 -- ! mem(10766) div 171577,067035, 054134 -> n1z0v0c0`
3095			`d=155710 -- ! mem(10770) -209752547/22620 -> -9272,-19907`
3096			`d=131075 -- ! mem(10772)`
3097			`d=000000 -- ! mem(10774) div 002421,150761, 024743 -> n0z0v0c0`
3098			`d=017373 -- ! mem(10776) 85053937/10723 -> 7931,9824`
3099			`d=023140 -- ! mem(11000)`
3100			`d=000010 -- ! mem(11002) div 001520,142467, 171044 -> n1z0v0c0`
3101			`d=141303 -- ! mem(11004) 55625015/-3548 -> -15677,3019`
3102			`d=005713 -- ! mem(11006)`
3103			`d=000007 -- ! mem(11010) div 001520,142467,000000 -> n0z1v1c1`
3104			`d=001520 -- ! mem(11012) 55625015/0 -> V=1, keep regs`
3105			`d=142467 -- ! mem(11014)`
3106			`d=000004 -- ! mem(11016) div 000000,000000,021706 -> n0z1v1c0`
3107			`d=000000 -- ! mem(11020) 0/9158 -> 0,0`
3108			`d=000000 -- ! mem(11022)`
3109	25	wfjm	`d=000010 -- ! mem(11024) div 177777,100000,000001->n1z0v1c0`
3110			`d=100000 -- ! mem(11026) -32768/1 -> -32768,0`
3111			`d=000000 -- ! mem(11030)`
3112	2	wfjm	`d=000002 -- ! mem(11032) div 177777,100000,177777 -> n0z0v1c0 ?? 2`
3113			`d=177777 -- ! mem(11034) -32768/-1 -> overflow`
3114			`d=100000 -- ! mem(11036)`
3115			`d=000000 -- ! mem(11040) div 037777,077777,077777 -> n0z0v0c0`
3116			`d=077777 -- ! mem(11042) 1073709055/32767 -> 32767,32766`
3117			`d=077776 -- ! mem(11044)`
3118			`d=000002 -- ! mem(11046) div 037777,100000,077777 -> n0z0v1c0`
3119			`d=037777 -- ! mem(11050) 1073709056/32767 -> overflow`
3120			`d=100000 -- ! mem(11052)`
3121			`d=000010 -- ! mem(11054) div 140000,100001,077777 -> n1z0v0c0`
3122			`d=100001 -- ! mem(11056) -1073709055/32767 -> -32767,-32766`
3123			`d=100002 -- ! mem(11060)`
3124	25	wfjm	`d=000010 -- ! mem(11062) div 140000,100000,077777->n1z0v1c0`
3125			`d=100000 -- ! mem(11064) -1073709056/32767 -> -32768,0`
3126			`d=000000 -- ! mem(11066)`
3127	2	wfjm	`d=000002 -- ! mem(11070) div 040000,000000,077777 -> n0z0v1c0`
3128			`d=040000 -- ! mem(11072) 1073741824/32767 -> overflow`
3129			`d=000000 -- ! mem(11074)`
3130			`#`
3131			`# simh notes:`
3132			`# 1. a quotient of 100000 leads to an overflow (V=1) on the W11`
3133			`# simh will not indicate overflow and returns q=100000`
3134			`#`
3135			`#----`
3136			`C Exec test 31.2 (test mul after div)`
3137			`#`
3138			`wr0 010500 -- r0=10500 (input data from DIV)`
3139			`wr1 010700 -- r1=10700 (output data from DIV)`
3140			`wr5 000016 -- r5=16 (test count)`
3141			`wsp 001400 -- sp=1400`
3142			`stapc 010420 -- start @ 10420`
3143			`wtgo`
3144			`rr0 d=010624 -- ! r0`
3145			`rr1 d=011024 -- ! r1`
3146			`rr2 d=000000 -- ! r2`
3147			`rr3 d=000000 -- ! r3`
3148			`rr5 d=000000 -- ! r5`
3149			`rpc d=010500 -- ! pc`
3150			`#-----------------------------------------------------------------------------`
3151			`C Setup code 32 [base 11100; use 111-112] (PIRQ test)`
3152			`# The code will exercise all 7 pirq interrupt levels:`
3153			`# set 1+3 -> handle 3, set 7 -> handle 7, set 6+4 -> handle 6`
3154			`# -> handle 4, set 5+2 -> handle 5 -> handle 2 > handle 1`
3155			`#`
3156			`wal 011100 -- code:`
3157			`bwm 14`
3158			`000237 -- spl 7`
3159			`011425 -- mov (r4),(r5)+ ; save PSW`
3160			`012713 -- mov #1000,(r3) ; set PIRQ 1`
3161			`001000`
3162			`011325 -- mov (r3),(r5)+ ; save PIRQ`
3163			`112763 -- movb #12,1(r3) ; set PIRQ 1+3`
3164			`000012`
3165			`000001`
3166			`#11120`
3167			`011325 -- mov (r3),(r5)+ ; save PIRQ`
3168			`000232 -- spl 2 ; now pri=2`
3169			`000240 -- nop ; allow interrupt to happen`
3170			`000230 -- spl 0 ; now pri=0`
3171			`#11130`
3172			`000240 -- nop ; allow interrupt to happen`
3173			`000000 -- halt`
3174			`#-----`
3175			`wal 000240 -- vector: 240`
3176			`bwm 2`
3177			`011134 -- PC:11134`
3178			`000340 -- PS:pri=7`
3179			`#-----`
3180			`wal 011134 -- code: (vector 240)`
3181			`bwm 18`
3182			`011300 -- mov (r3),r0 ; get pirq`
3183			`010625 -- mov sp,(r5)+ ; save sp`
3184			`#11140`
3185			`010025 -- mov r0,(r5)+ ; save pirq`
3186			`110014 -- movb r0,(r4) ; PSW=PIRQ (sets priority)`
3187			`042700 -- bic #177761,r0 ; mask out index bits`
3188			`177761`
3189			`010001 -- mov r0,r1 ; r0 is word index (pri*2)`
3190			`006201 -- asr r1 ; r1 is byte index (pri*1)`
3191			`012702 -- mov #400,r2`
3192			`000400`
3193			`#11160`
3194			`072201 -- ash r1,r2 ; r2 = 1<<(pri)`
3195			`040213 -- bic r2,(r3) ; clear current level in pirq`
3196			`010246 -- mov r2,-(sp) ; save pirq level mask`
3197			`056013 -- bis 11200(r0),(r3) ; trigger new pirq's`
3198			`011200`
3199			`000240 -- noop`
3200			`012625 -- mov (sp)+,(r5)+ ; save pirq level mask`
3201			`000002 -- rti`
3202			`#11200`
3203			`#-----`
3204			`wal 011200 -- data:`
3205			`bwm 8`
3206			`000000 -- mem(11200)=0 ; new pirq @ level 0`
3207			`000000 -- mem(11202)=0 ; new pirq @ level 1`
3208			`000000 -- mem(11204)=0 ; new pirq @ level 2`
3209			`100000 -- mem(11206)=100000 ; new pirq @ level 3 -> 7`
3210			`022000 -- mem(11210)=022000 ; new pirq @ level 4 -> 5+2`
3211			`000000 -- mem(11212)=0 ; new pirq @ level 5`
3212			`000000 -- mem(11214)=0 ; new pirq @ level 6`
3213			`050000 -- mem(11216)=050000 ; new pirq @ level 7 -> 6+4`
3214			`#`
3215			`C Exec code 32 (PIRQ test)`
3216			`#`
3217			`wr3 177772 -- r3=177772 (#PIRQ)`
3218			`wr4 177776 -- r4=177776 (#PSW)`
3219			`wr5 011220 -- r1=11220 (output data)`
3220			`wsp 001400 -- sp=1400`
3221			`stapc 011100 -- start @ 11100`
3222			`wtgo`
3223			`rr5 d=011300 -- ! r5`
3224			`rsp d=001400 -- ! sp`
3225			`rpc d=011134 -- ! pc`
3226			`rps d=000000 -- ! PSW`
3227			`wal 177772 --`
3228			`rmi d=000000 -- ! PIRQ`
3229			`wal 011220 --`
3230			`brm 24`
3231			`d=000340 -- ! mem(11220) PSW after SPL 7`
3232			`d=001042 -- ! mem(11222) PIRQ when 1 set`
3233			`d=005146 -- ! mem(11224) PIRQ when 1+3 set`
3234			`d=001374 -- ! mem(11226) -> PI:3 SP`
3235			`d=005146 -- ! mem(11230) PIRQ (3+1 pending)`
3236			`d=001366 -- ! mem(11232) -> PI:7 SP`
3237			`d=101356 -- ! mem(11234) PIRQ (7+1 pending)`
3238			`d=100000 -- ! mem(11236) <- PI:7 mask`
3239			`d=001366 -- ! mem(11240) -> PI:6 SP`
3240			`d=051314 -- ! mem(11242) PIRQ (6+4+1 pending)`
3241			`d=040000 -- ! mem(11244) <- PI:6 mask`
3242			`d=001366 -- ! mem(11246) -> PI:4 SP`
3243			`d=011210 -- ! mem(11250) PIRQ (4+1 pending)`
3244			`d=001360 -- ! mem(11252) -> PI:5 SP`
3245			`d=023252 -- ! mem(11254) PIRQ (5+2+1 pending)`
3246			`d=020000 -- ! mem(11256) <- PI:5 mask`
3247			`d=010000 -- ! mem(11260) <- PI:4 mask`
3248			`d=004000 -- ! mem(11262) <- PI:3 mask`
3249			`d=001374 -- ! mem(11264) -> PI:2 SP`
3250			`d=003104 -- ! mem(11266) PIRQ`
3251			`d=002000 -- ! mem(11270) <- PI:2 mask`
3252			`d=001374 -- ! mem(11272) -> PI:1 SP`
3253			`d=001042 -- ! mem(11274) PIRQ`
3254			`d=001000 -- ! mem(11276) <- PI:1 mask`
3255			`#`
3256			`wal 000240 -- vector: 240 -> trap catcher again`
3257			`bwm 2`
3258			`000242 -- PC:242`
3259			`000000 -- PS:0`
3260			`#-----------------------------------------------------------------------------`
3261			`C Setup code 33 [base 11200; use 112-113] (adc(b) and sbc(b) test)`
3262			`#`
3263			`wal 011200 -- code test 1: (adc)`
3264			`bwm 5`
3265			`006020 -- L1: ror (r0)+`
3266			`005520 -- adc (r0)+`
3267			`006120 -- rol (r0)+`
3268			`077104 -- sob r1,L1 (.-4)`
3269			`000000 -- halt`
3270			`#-----`
3271			`wal 011220 -- code test 2: (sbc)`
3272			`bwm 5`
3273			`006020 -- L1: ror (r0)+`
3274			`005620 -- sbc (r0)+`
3275			`006120 -- rol (r0)+`
3276			`077104 -- sob r1,L1 (.-4)`
3277			`000000 -- halt`
3278			`#-----`
3279			`wal 011240 -- code test 3: (adcb)`
3280			`bwm 5`
3281			`006020 -- L1: ror (r0)+`
3282			`105520 -- adcb (r0)+`
3283			`106120 -- rolb (r0)+`
3284			`077104 -- sob r1,L1 (.-4)`
3285			`000000 -- halt`
3286			`#-----`
3287			`wal 011260 -- code test 4: (sbcb)`
3288			`bwm 5`
3289			`006020 -- L1: ror (r0)+`
3290			`105620 -- sbcb (r0)+`
3291			`106120 -- rolb (r0)+`
3292			`077104 -- sob r1,L1 (.-4)`
3293			`000000 -- halt`
3294			`#-----`
3295			`wal 011300 -- data test 1: (adc)`
3296			`bwm 9`
3297			`000000 -- 177776 + 0 -> 177776 + 0`
3298			`177776`
3299			`000000`
3300			`000001 -- 177776 + 1 -> 177777 + 0`
3301			`177776`
3302			`000000`
3303			`000001 -- 177777 + 1 -> 000000 + 1`
3304			`177777`
3305			`000000`
3306			`#-----`
3307			`wal 011324 -- data test 2: (sbc)`
3308			`bwm 9`
3309			`000000 -- 000002 - 0 -> 000002 - 0`
3310			`000002`
3311			`000000`
3312			`000001 -- 000002 - 1 -> 000001 - 0`
3313			`000002`
3314			`000000`
3315			`000001 -- 000000 - 1 -> 177777 - 1`
3316			`000000`
3317			`000000`
3318			`#-----`
3319			`wal 011350 -- data test 3: (adcb)`
3320			`bwm 6`
3321			`000000 -- 376 + 0 -> 376 + 0`
3322			`000376`
3323			`000001 -- 376 + 1 -> 377 + 0`
3324			`000376`
3325			`000001 -- 377 + 1 -> 000 + 1`
3326			`000377`
3327			`#-----`
3328			`wal 011364 -- data test 4: (sbcb)`
3329			`bwm 6`
3330			`000000 -- 002 - 0 -> 002 - 0`
3331			`000002`
3332			`000001 -- 002 - 1 -> 001 - 0`
3333			`000002`
3334			`000001 -- 000 - 1 -> 337 - 1`
3335			`000000`
3336			`#`
3337			`C Exec code 33 (adc and sbc test)`
3338			`C Exec test 33.1 (adc)`
3339			`#`
3340			`wr0 011300 -- r0=11300`
3341			`wr1 000003 -- r1=3`
3342			`wsp 001400 -- sp=1400`
3343			`stapc 011200 -- start @ 11200`
3344			`wtgo`
3345			`rr0 d=011322 -- ! r0=11322`
3346			`rpc d=011212 -- ! pc`
3347			`wal 011300`
3348			`brm 9`
3349			`d=000000 -- ! mem(11300)=000000 -- 177776 + 0 -> 177776 + 0`
3350			`d=177776 -- ! mem(11302)=000000`
3351			`d=000000 -- ! mem(11304)=000000`
3352			`d=000000 -- ! mem(11306)=000000 -- 177776 + 1 -> 177777 + 0`
3353			`d=177777 -- ! mem(11310)=000000`
3354			`d=000000 -- ! mem(11312)=000000`
3355			`d=000000 -- ! mem(11314)=000000 -- 177777 + 1 -> 000000 + 1`
3356			`d=000000 -- ! mem(11316)=000000`
3357			`d=000001 -- ! mem(11320)=000000`
3358			`#----`
3359			`C Exec test 33.2 (sbc)`
3360			`#`
3361			`wr0 011324 -- r0=11324`
3362			`wr1 000003 -- r1=3`
3363			`wsp 001400 -- sp=1400`
3364			`stapc 011220 -- start @ 11220`
3365			`wtgo`
3366			`rr0 d=011346 -- ! r0=11346`
3367			`rpc d=011232 -- ! pc`
3368			`wal 011324`
3369			`brm 9`
3370			`d=000000 -- ! mem(11324)=000000 -- 000002 - 0 -> 000002 - 0`
3371			`d=000002 -- ! mem(11326)=000000`
3372			`d=000000 -- ! mem(11330)=000000`
3373			`d=000000 -- ! mem(11332)=000000 -- 000002 - 1 -> 000001 - 0`
3374			`d=000001 -- ! mem(11334)=000000`
3375			`d=000000 -- ! mem(11336)=000000`
3376			`d=000000 -- ! mem(11340)=000000 -- 000000 - 1 -> 177777 - 1`
3377			`d=177777 -- ! mem(11342)=000000`
3378			`d=000001 -- ! mem(11344)=000000`
3379			`#----`
3380			`C Exec test 33.3 (adcb)`
3381			`#`
3382			`wr0 011350 -- r0=11350`
3383			`wr1 000003 -- r1=3`
3384			`wsp 001400 -- sp=1400`
3385			`stapc 011240 -- start @ 11240`
3386			`wtgo`
3387			`rr0 d=011364 -- ! r0=11364`
3388			`rpc d=011252 -- ! pc`
3389			`wal 011350`
3390			`brm 6`
3391			`d=000000 -- ! mem(11350)=000000 -- 376 + 0 -> 376 + 0`
3392			`d=000376 -- ! mem(11352)=000000`
3393			`d=000000 -- ! mem(11354)=000000 -- 376 + 1 -> 377 + 0`
3394			`d=000377 -- ! mem(11356)=000000`
3395			`d=000000 -- ! mem(11360)=000000 -- 377 + 1 -> 000 + 1`
3396			`d=000400 -- ! mem(11362)=000000`
3397			`#----`
3398			`C Exec test 33.4 (sbcb)`
3399			`#`
3400			`wr0 011364 -- r0=11364`
3401			`wr1 000003 -- r1=3`
3402			`wsp 001400 -- sp=1400`
3403			`stapc 011260 -- start @ 11260`
3404			`wtgo`
3405			`rr0 d=011400 -- ! r0=11400`
3406			`rpc d=011272 -- ! pc`
3407			`wal 011364`
3408			`brm 6`
3409			`d=000000 -- ! mem(11364)=000000 -- 002 - 0 -> 002 - 0`
3410			`d=000002 -- ! mem(11366)=000000`
3411			`d=000000 -- ! mem(11370)=000000 -- 002 - 1 -> 001 - 0`
3412			`d=000001 -- ! mem(11372)=000000`
3413			`d=000000 -- ! mem(11374)=000000 -- 000 - 1 -> 337 - 1`
3414			`d=000777 -- ! mem(11377)=000000`
3415			`#-----------------------------------------------------------------------------`
3416			`C Setup code 34 [base 11400; use 114-115] (11/34 self test code)`
3417			`# code adapted from M9312 23-248F1 console PROM, the 11/04-34 Diagnostic PROM`
3418			`#`
3419			`wal 011400 -- code:`
3420			`bwm 51`
3421			`005000 -- clr r0 ; r0=000000 c=0`
3422			`005200 -- inc r0 ; r0=000001 c=0`
3423			`005100 -- com r0 ; r0=177776 c=1`
3424			`006200 -- asr r0 ; r0=177777 c=0`
3425			`006300 -- asl r0 ; r0=177776 c=1`
3426			`006000 -- ror r0 ; r0=177777 c=0`
3427			`005700 -- tst r0 ; r0=177777 c=0 ?impact unclear?`
3428			`005400 -- neg r0 ; r0=000001 c=1`
3429			`#11420`
3430			`005300 -- dec r0 ; r0=000000 c=1`
3431			`005600 -- sbc r0 ; r0=177777 c=1`
3432			`006100 -- rol r0 ; r0=177777 c=1`
3433			`005500 -- adc r0 ; r0=000000 c=1`
3434			`000300 -- swab r0 ; r0=000000 c=0`
3435			`001401 -- beq .+1 ;`
3436			`000000 -- halt ;`
3437			`012702 -- mov #data0,r2 ; r2=011560`
3438			`#11440`
3439			`011560`
3440			`011203 -- mov (r2),r3 ; r2=011560 r3=011560`
3441			`022203 -- cmp (r2)+,r3 ; r2=011562 r3=011560`
3442			`001401 -- beq .+1 ;`
3443			`000000 -- halt ;`
3444			`063203 -- add @(r2)+,r3 ; r2=011564 r3=<2*11560>`
3445			`165203 -- sub @-(r2),r3 ; r2=011562 r3=011560`
3446			`044203 -- bic -(r2),r3 ; r2=011560 r3=000000`
3447			`#11460`
3448			`056203 -- bis 12(r2),r3 ; r2=011560 r3=011566`
3449			`000012`
3450			`037203 -- bis @12(r2),r3 ; r2=011560 r3=011566`
3451			`000012`
3452			`001001 -- bne .+1 ;`
3453			`000000 -- halt ;`
3454			`010701 -- mov pc,r1 ; r1=011476`
3455			`000121 -- jmp (r1)+ ; jump 1.self 2. next; r1=011500`
3456			`#11500`
3457			`012701 -- mov #L2,r1 ; r1=011510`
3458			`011510`
3459			`000131 -- jmp @(r1)+ ; r1=011512 pc=011506`
3460			`000111 -- L1:jmp (r1) ; r1=011512 pc=011512`
3461			`011506 -- L2:.word L1`
3462			`105737 -- tstb data1 ;`
3463			`011564`
3464			`001401 -- beq .+1 ;`
3465			`#11520`
3466			`000000 -- halt ;`
3467			`010204 -- mov r2,r4 ; keep r2 for later check`
3468			`022424 -- cmp (r4)+,(r4)+ ; r4=011564`
3469			`105724 -- tstb (r4)+ ; r4=011565 (r4)+=000`
3470			`001401 -- beq .+1 ;`
3471			`000000 -- halt ;`
3472			`105714 -- tstb (r4) ; r4=011565 (r4)=200`
3473			`100402 -- bmi .+2 ;`
3474			`#11540`
3475			`000000 -- halt ;`
3476			`000000 -- halt ;`
3477			`000000 -- halt ;`
3478			`#-----`
3479			`wal 011560 -- data:`
3480			`bwm 8`
3481			`011560 -- data0: .word data0`
3482			`011560 -- .word data0`
3483			`100000 -- data1: .byte 000,200`
3484			`177777 -- data2: .word 177777`
3485			`011566 -- .word data2`
3486			`011566 -- .word data2`
3487			`000700 -- .word mem+0`
3488			`000701 -- .word mem+1`
3489			`#`
3490			`C Exec code 34 (11/34 self test code)`
3491			`# D RE RQ FU DAT`
3492			`stapc 011400 -- start @ 11400`
3493			`wtgo`
3494			`rr0 d=000000 -- ! r0`
3495			`rr1 d=011512 -- ! r1`
3496			`rr2 d=011560 -- ! r2`
3497			`rr3 d=011566 -- ! r3`
3498			`rr4 d=011565 -- ! r4`
3499			`rpc d=011546 -- ! pc`
3500			`#-----------------------------------------------------------------------------`
3501			`C Setup code 35 [base 11600; use 116-121] (11/70 self test code)`
3502			`# code adapted from M9312 23-616F1 console PROM, the 11/60-70 Diagnostic PROM`
3503			`#`
3504			`wal 011600 -- code:`
3505			`bwm 117`
3506			`005006 -- clr sp ; sp=000000`
3507			`100404 -- bmi L3 ;`
3508			`102403 -- bvs L3 ;`
3509			`101002 -- bhi L3 ;`
3510			`002401 -- blt L3 ;`
3511			`101401 -- blos L4 ;`
3512			`000000 -- L3: halt ;`
3513			`005306 -- L3: dec sp ; sp=177777`
3514			`#11620`
3515			`100003 -- bpl L5 ;`
3516			`001402 -- beq L5 ;`
3517			`002001 -- bge L5 ;`
3518			`003401 -- ble L6 ;`
3519			`000000 -- L5: halt ;`
3520			`006006 -- L6: ror sp ; sp=077777`
3521			`102002 -- bvc L7 ;`
3522			`103001 -- bcc L7 ;`
3523			`#11640`
3524			`001001 -- bne L8 ;`
3525			`000000 -- L7: halt ;`
3526			`012706 -- L8: mov #125252,sp ; sp=125252`
3527			`125252`
3528			`010600 -- mov sp,r0 ;`
3529			`010001 -- mov r0,r1 ;`
3530			`010102 -- mov r1,r2 ;`
3531			`010203 -- mov r2,r3 ;`
3532			`#11660`
3533			`010304 -- mov r3,r4 ;`
3534			`010405 -- mov r4,r5 ;`
3535			`160501 -- sub r5,r1 ; r1=00000`
3536			`002401 -- blt L9a ;`
3537			`001401 -- beq L9 ;`
3538			`000000 -- L9a: halt ;`
3539			`006102 -- L9: rol r2 ; r2=052524 c=1`
3540			`103001 -- bcc L10 ;`
3541			`#11700`
3542			`002401 -- blt L11 ;`
3543			`000000 -- L10: halt ;`
3544			`060203 -- L11: add r2,r3 ; r3=177776 (125252+052524)`
3545			`005203 -- inc r3 ; r3=177777`
3546			`005103 -- com r3 ; r3=000000`
3547			`060301 -- add r3,r1 ; r1=000000 c=0`
3548			`103401 -- bcs L12 ;`
3549			`003401 -- ble L13 ;`
3550			`#11720`
3551			`000000 -- L12: halt ;`
3552			`006004 -- L13: ror r4 ; r4=052525`
3553			`050403 -- bis r4,r3 ; r3=052525 (r3 was 0)`
3554			`060503 -- add r5,r3 ; r3=177777 c=0 (125252+052525)`
3555			`005203 -- inc r3 ; r3=000000 c=0 (kept)`
3556			`103402 -- bcs L14 ;`
3557			`005301 -- dec r1 ; r1=177777`
3558			`002401 -- blt L15 ;`
3559			`#11740`
3560			`000000 -- L14: halt ;`
3561			`005100 -- L15: com r0 ; r0=052525`
3562			`101401 -- blos L16 ;`
3563			`000000 -- halt ;`
3564			`040001 -- L16: bic r0,r1 ; r1=125252`
3565			`060101 -- L16: add r1,r1 ; r1=052524 c=1`
3566			`003001 -- bgt L17 ;`
3567			`003401 -- ble L18 ;`
3568			`#11760`
3569			`000000 -- L17: halt ;`
3570			`000301 -- L18: swab r1 ; r1=052125`
3571			`020127 -- cmp r1,#052125 ;`
3572			`052125`
3573			`001004 -- bne L19 ;`
3574			`030405 -- bit r4,r5 ;`
3575			`003002 -- bgt L19 ;`
3576			`005105 -- com r5 ; r5=052525`
3577			`#12000`
3578			`001001 -- bne L20 ;`
3579			`000000 -- L19: halt ;`
3580			`112700 -- L20: movb #177401,r0 ;`
3581			`177401`
3582			`100001 -- bpl L21 ;`
3583			`000000 -- L22: halt ;`
3584			`077002 -- L21: sob r0,L22 ;`
3585			`000261 -- sec ; c=1`
3586			`#12020`
3587			`006100 -- rol r0 ; r0=000001`
3588			`006100 -- rol r0 ; r0=000002`
3589			`006100 -- rol r0 ; r0=000004`
3590			`010001 -- mov r0,r1 ; r1=000004`
3591			`005401 -- neg r1 ; r1=177774`
3592			`005201 -- L23: inc r1 ;`
3593			`077002 -- sob r0,L23 ;`
3594			`005700 -- tst r0 ; here r0=r1=0`
3595			`#12040`
3596			`001002 -- bne L24 ;`
3597			`005701 -- tst r1 ;`
3598			`001401 -- beq L25 ;`
3599			`000000 -- L24: halt ;`
3600			`012706 -- L25: mov #776,sp ;`
3601			`000776 --`
3602			`004767 -- jsr pc,L26 ;`
3603			`000002`
3604			`#12060`
3605			`000000 -- N2: halt ;`
3606			`022716 -- L26: cmp #N2,(sp) ;`
3607			`012060`
3608			`001401 -- beq L27 ;`
3609			`000000 -- halt ;`
3610			`012716 -- L27: mov #N3,(sp) ;`
3611			`012102`
3612			`000207 -- rts pc ;`
3613			`#12100`
3614			`000000 -- halt ;`
3615			`005046 -- N3: clr -(sp) ;`
3616			`012746 -- mov #N4,-(sp) ;`
3617			`012114`
3618			`000002 -- rti ;`
3619			`000000 -- halt ;`
3620			`000137 -- N4: jmp @#N5 ;`
3621			`012122`
3622			`#12120`
3623			`000000 -- halt ;`
3624			`012705 -- N5: mov #160000,r5 ; r5=160000`
3625			`160000`
3626			`005037 -- clr @#6 ;`
3627			`000006`
3628			`012737 -- mov #N6,@#4 ;`
3629			`012150`
3630			`000004`
3631			`#12140`
3632			`012706 -- mov #776,sp ; sp=776`
3633			`000776`
3634			`005715 -- tst (r5) ; will fail, first word of I/O page`
3635			`000000 -- halt ;`
3636			`000000 -- N6: halt ;`
3637			`#`
3638			`C Exec code 35 (11/70 self test code)`
3639			`# D RE RQ FU DAT`
3640			`stapc 011600 -- start @ 11600`
3641			`wtgo`
3642			`rpc d=012152 -- ! pc`
3643			`wal 000004 -- vector: 4 -> trap catcher again`
3644			`bwm 2`
3645			`000006 -- PC:6`
3646			`000000 -- PS:0`
3647			`#-----------------------------------------------------------------------------`
3648			`# Up to here code and data (both input and result) occupied 'fresh' memory.`
3649			`# Easy to debug, but inconvenient when test should be extended later.`
3650			`# From here on, only code will always occupy fresh memory.`
3651			`# Data will be put into the upper part of the 16 kbyte memory:`
3652			`# test vector: 036000 (512 byte area)`
3653			`# result data: 037000 (512 byte area)`
3654			`#-----------------------------------------------------------------------------`
3655			`C Setup code 36 [base 12200] (systematic CMP test)`
3656			`#`
3657			`wal 012200 -- code:`
3658			`bwm 7`
3659			`000230 -- spl 0`
3660			`012400 -- L1: mov (r4)+,r0`
3661			`012401 -- mov (r4)+,r1`
3662			`020001 -- cmp r0,r1`
3663			`011225 -- mov (r2),(r5)+`
3664			`077305 -- sob r3,L1`
3665			`000000 -- halt`
3666			`#`
3667			`C Exec code 36 (systematic CMP test)`
3668			`C Exec test 36.1: data adapted from cmp.s11 code of Begemot p11-2.10c`
3669			`#`
3670			`wal 036000 -- setup test vector:`
3671			`bwm 22`
3672			`000000 -- 000000, 000000 --> nzvc=0100`
3673			`000000 --`
3674			`000001 -- 000001, 000001 --> nzvc=0100`
3675			`000001 --`
3676			`177777 -- 177777, 177777 --> nzvc=0100`
3677			`177777 --`
3678			`000000 -- 000000, 000001 --> nzvc=1001`
3679			`000001 --`
3680			`000000 -- 000000, 177777 --> nzvc=0001`
3681			`177777 --`
3682			`000001 -- 000001, 000000 --> nzvc=0000`
3683			`000000 --`
3684			`177777 -- 177777, 000000 --> nzvc=1000`
3685			`000000 --`
3686			`000001 -- 000001, 177777 --> nzvc=0001`
3687			`177777 --`
3688			`177777 -- 177777, 000001 --> nzvc=1000`
3689			`000001 --`
3690			`077777 -- 077777, 100000 --> nzvc=1011`
3691			`100000 --`
3692			`100000 -- 100000, 077777 --> nzvc=0010`
3693			`077777 --`
3694			`#----`
3695			`wr2 177776 -- r2=177776 -> psw`
3696			`wr3 000013 -- r3=13 -> test count`
3697			`wr4 036000 -- r4=36000 -> input area`
3698			`wr5 037000 -- r5=37000 -> output area`
3699			`wsp 001400 -- sp=1400`
3700			`stapc 012200 -- start @ 12200`
3701			`wtgo`
3702			`rpc d=012216 -- ! pc`
3703			`rr3 d=000000 -- ! r3=0`
3704			`rr4 d=036054 -- ! r4=12354`
3705			`rr5 d=037026 -- ! r5=12426`
3706			`wal 037000 --`
3707			`brm 11`
3708			`d=000004 -- 000000, 000000 --> nzvc=0100`
3709			`d=000004 -- 000001, 000001 --> nzvc=0100`
3710			`d=000004 -- 177777, 177777 --> nzvc=0100`
3711			`d=000011 -- 000000, 000001 --> nzvc=1001`
3712			`d=000001 -- 000000, 177777 --> nzvc=0001`
3713			`d=000000 -- 000001, 000000 --> nzvc=0000`
3714			`d=000010 -- 177777, 000000 --> nzvc=1000`
3715			`d=000001 -- 000001, 177777 --> nzvc=0001`
3716			`d=000010 -- 177777, 000001 --> nzvc=1000`
3717			`d=000013 -- 077777, 100000 --> nzvc=1011`
3718			`d=000002 -- 100000, 077777 --> nzvc=0010`
3719			`#-----------------------------------------------------------------------------`
3720			`C Setup code 37 [base 12300] (systematic DIV test)`
3721			`#`
3722			`wal 012300 -- code:`
3723			`bwm 9`
3724			`000230 -- spl 0`
3725			`012400 -- L1: mov (r4)+,r0`
3726			`012401 -- mov (r4)+,r1`
3727			`071024 -- div (r4)+,r0`
3728			`011225 -- mov (r2),(r5)+`
3729			`010025 -- mov r0,(r5)+`
3730			`010125 -- mov r1,(r5)+`
3731			`077307 -- sob r3,L1`
3732			`#12520`
3733			`000000 -- halt`
3734			`#`
3735			`C Exec code 37 (systematic DIV test)`
3736			`C Exec test 37.1: data adapted from div.s11 code of Begemot p11-2.10c`
3737			`#`
3738			`wal 036000 -- setup test vector:`
3739			`bwm 57`
3740			`000000 -- 0, 4, 0, 7, 0, 4# 4/ 0 -> 0111 0 4`
3741			`000004 --`
3742			`000000 --`
3743			`000000 -- 0, 4, 2, 0, 2, 0# 4/ 2 -> 0000 2 0`
3744			`000004 --`
3745			`000002 --`
3746			`000000 -- 0, 6, 2, 0, 3, 0# 6/ 2 -> 0000 3 0`
3747			`000006 --`
3748			`000002 --`
3749			`000000 -- 0, 4, -2, 10, -2, 0# 4/-2 ->1000 -2 0`
3750			`000004 --`
3751			`177776 --`
3752			`#36030`
3753			`000002 -- 2, 0, 1, 2, 2, 0# 0x20000 / 1`
3754			`000000 --`
3755			`000001 --`
3756			`000002 -- 2, 0, -2, 12, 2, 0# 0x20000 / -2`
3757			`000000 --`
3758			`177776 --`
3759			`100000 -- 100000, 0, 1, 12,100000, 0# 0x80000000 / 1`
3760			`000000 --`
3761			`000001 --`
3762			`177776 -- 177776,177777, -1, 2,177776,177777# -0x10001 / -1`
3763			`177777 --`
3764			`177777 --`
3765			`#36060`
3766			`177777 -- 177777,177773, 2, 10, -2, -1# -5 / 2`
3767			`177773 --`
3768			`000002 --`
3769			`177777 -- 177777,177773, -2, 0, 2, -1# -5 / -2`
3770			`177773 --`
3771			`177776 --`
3772			`177776 -- 177776, 0, 40000, 10, -10, 0# -0x20000/0x4000`
3773			`000000 --`
3774			`040000 --`
3775			`000100 -- 100, 200,177601, 12, 100, 200# 0x400080 / -0x7f`
3776			`000200 --`
3777			`177601 --`
3778			`#36110`
3779			`000000 -- 0, 1, 0, 7, 0, 1 # zero divide`
3780			`000001 --`
3781			`000000 --`
3782			`177777 -- -1, -1, 0, 7, -1, -1 # zero divide`
3783			`177777 --`
3784			`000000 --`
3785			`000000 -- 0, 0, 0, 7, 0, 0 # zero divide`
3786			`000000 --`
3787			`000000 --`
3788			`000001 -- 1, 1, 1, 2, 1, 1 # overflow`
3789			`000001 --`
3790			`000001 --`
3791			`#36140`
3792			`000001 -- 1, 1, -1, 012, 1, 1 # overflow`
3793			`000001 --`
3794			`177777 --`
3795			`177777 -- -1, -1, 1, 010, -1, 0 # wfjm corrected, not overflow`
3796			`177777 --`
3797			`000001 --`
3798			`177777 -- -1, -1, -1, 0, 1, 0 # wfjm corrected, not overflow`
3799			`177777 --`
3800			`177777 --`
3801			`#----`
3802			`wr2 177776 -- r2=177776 -> psw`
3803			`wr3 000023 -- r3=23 -> test count`
3804			`wr4 036000 -- r4=36000 -> input area`
3805			`wr5 037000 -- r5=37000 -> output area`
3806			`wsp 001400 -- sp=1400`
3807			`stapc 012300 -- start @ 12300`
3808			`wtgo`
3809			`rpc d=012322 -- ! pc`
3810			`rr3 d=000000 -- ! r3=0`
3811			`rr4 d=036162 -- ! r4=36162`
3812			`rr5 d=037162 -- ! r5=37162`
3813			`wal 037000 --`
3814			`brm 57`
3815			`d=000007 --! 0, 4, 0, 7, 0, 4# 4/ 0 -> 0111 0 4`
3816			`d=000000 --!`
3817			`d=000004 --!`
3818			`d=000000 --! 0, 4, 2, 0, 2, 0# 4/ 2 -> 0000 2 0`
3819			`d=000002 --!`
3820			`d=000000 --!`
3821			`d=000000 --! 0, 6, 2, 0, 3, 0# 6/ 2 -> 0000 3 0`
3822			`d=000003 --!`
3823			`d=000000 --!`
3824			`d=000010 --! 0, 4, -2, 10, -2, 0# 4/-2 ->1000 -2 0`
3825			`d=177776 --!`
3826			`d=000000 --!`
3827			`#37030`
3828			`d=000002 --! 2, 0, 1, 2, 2, 0# 0x20000 / 1`
3829			`d=000002 --!`
3830			`d=000000 --!`
3831			`d=000012 --! 2, 0, -2, 12, 2, 0# 0x20000 / -2`
3832			`d=000002 --!`
3833			`d=000000 --!`
3834			`d=000012 --!100000, 0, 1, 12,100000, 0# 0x80000000 / 1`
3835			`d=100000 --!`
3836			`d=000000 --!`
3837			`d=000002 --!177776,177777, -1, 2,177776,177777# -0x10001 / -1`
3838			`d=177776 --!`
3839			`d=177777 --!`
3840			`#37060`
3841			`d=000010 --!177777,177773, 2, 10, -2, -1# -5 / 2`
3842			`d=177776 --!`
3843			`d=177777 --!`
3844			`d=000000 --!177777,177773, -2, 0, 2, -1# -5 / -2`
3845			`d=000002 --!`
3846			`d=177777 --!`
3847			`d=000010 --!177776, 0, 40000, 10, -10, 0# -0x20000/0x4000`
3848			`d=177770 --!`
3849			`d=000000 --!`
3850			`d=000012 --! 100, 200,177601, 12, 100, 200# 0x400080 / -0x7f`
3851			`d=000100 --!`
3852			`d=000200 --!`
3853			`#37110`
3854			`d=000007 --! 0, 1, 0, 7, 0, 1 # zero divide`
3855			`d=000000 --!`
3856			`d=000001 --!`
3857			`d=000007 --! -1, -1, 0, 7, -1, -1 # zero divide`
3858			`d=177777 --!`
3859			`d=177777 --!`
3860			`d=000007 --! 0, 0, 0, 7, 0, 0 # zero divide`
3861			`d=000000 --!`
3862			`d=000000 --!`
3863			`d=000002 --! 1, 1, 1, 2, 1, 1 # overflow`
3864			`d=000001 --!`
3865			`d=000001 --!`
3866			`#13740`
3867			`d=000012 --! 1, 1, -1, 012, 1, 1 # overflow`
3868			`d=000001 --!`
3869			`d=000001 --!`
3870			`d=000010 --! -1, -1, 1, 010, -1, 0 # wfjm corrected, not overflow`
3871			`d=177777 --!`
3872			`d=000000 --!`
3873			`d=000000 --! -1, -1, -1, 0, 1, 0 # wfjm corrected, not overflow`
3874			`d=000001 --!`
3875			`d=000000 --!`
3876			`#--------`
3877			`C Exec test 37.2: data adapted from KDJ11.MAC, test 213, p. 139-141`
3878			`# D RE RQ FU DAT`
3879			`wal 036000 -- setup test vector:`
3880			`bwm 51`
3881			`177777 -- 177777,177777,177777, 0, 1, 0#`
3882			`177777 --`
3883			`177777 --`
3884	25	wfjm	`000000 -- 0,177777,177777,12, 0,177777# w11a:12,000001,000000`
3885	2	wfjm	`177777 --`
3886			`177777 --`
3887			`177777 -- 177777, 0,177777, 2,177777, 0#`
3888			`000000 --`
3889			`177777 --`
3890			`000000 -- 0, 7642, 7643, 4, 0, 7642#`
3891			`007642 --`
3892			`007643 --`
3893			`000000 -- 0, 137,177543, 4, 0, 137#`
3894			`000137 --`
3895			`177543 --`
3896			`000000 -- 0, 7643, 7643, 0, 1, 0#`
3897			`007643 --`
3898			`007643 --`
3899			`100000 -- 100000, 4376, 10021,12,100000, 4376#`
3900			`004376 --`
3901			`010021 --`
3902			`177700 -- 177700,170033, 10021,10,176024,171307#`
3903			`170033 --`
3904			`010021 --`
3905			`177700 -- 177700,170033,167757, 0, 1754,171307#`
3906			`170033 --`
3907			`167757 --`
3908			`000000 -- 0,177777, 1, 2, 0,177777#`
3909			`177777 --`
3910			`000001 --`
3911	25	wfjm	`177777 -- 177777, 45716, 1,12,177777, 45716# w11a:12,045716,000000`
3912	2	wfjm	`045716 --`
3913			`000001 --`
3914			`000000 -- 0, 2,177770, 4, 0, 2#`
3915			`000002 --`
3916			`177770 --`
3917			`177777 -- 177777,177776, 10, 4, 0,177776#`
3918			`177776 --`
3919			`000010 --`
3920			`000001 -- 1,177777, 1, 2, 1,177777#`
3921			`177777 --`
3922			`000001 --`
3923			`000001 -- 1, 0, 2, 2, 1, 0#`
3924			`000000 --`
3925			`000002 --`
3926			`000001 -- 1, 0, 3, 0, 52525, 1#`
3927			`000000 --`
3928			`000003 --`
3929			`000023 -- 23, 16054, 16537, 0, 246, 10222#`
3930			`016054 --`
3931			`016537 --`
3932			`#----`
3933			`wr2 177776 -- r2=177776 -> psw`
3934			`wr3 000021 -- r3=21 (17.) -> test count`
3935			`wr4 036000 -- r4=36000 -> input area`
3936			`wr5 037000 -- r5=37000 -> output area`
3937			`wsp 001400 -- sp=1400`
3938			`stapc 012300 -- start @ 12300`
3939			`wtgo`
3940			`rpc d=012322 -- ! pc`
3941			`rr3 d=000000 -- ! r3=0`
3942			`rr4 d=036146 -- ! r4=36146`
3943			`rr5 d=037146 -- ! r5=37146`
3944			`wal 037000 --`
3945			`brm 51`
3946			`d=000000 --!177777,177777,177777, 0, 1, 0#`
3947			`d=000001 --!`
3948			`d=000000 --!`
3949	25	wfjm	`d=000012 --! 0,177777,177777,12, 0,177777# w11a:12,000001,000000`
3950			`d=000001 --!`
3951	2	wfjm	`d=000000 --!`
3952			`d=000002 --!177777, 0,177777, 2,177777, 0#`
3953			`d=177777 --!`
3954			`d=000000 --!`
3955			`d=000004 --! 0, 7642, 7643, 4, 0, 7642#`
3956			`d=000000 --!`
3957			`d=007642 --!`
3958			`d=000004 --! 0, 137,177543, 4, 0, 137#`
3959			`d=000000 --!`
3960			`d=000137 --!`
3961			`d=000000 --! 0, 7643, 7643, 0, 1, 0#`
3962			`d=000001 --!`
3963			`d=000000 --!`
3964			`d=000012 --!100000, 4376, 10021,12,100000, 4376#`
3965			`d=100000 --!`
3966			`d=004376 --!`
3967			`d=000010 --!177700,170033, 10021,10,176024,171307#`
3968			`d=176024 --!`
3969			`d=171307 --!`
3970			`d=000000 --!177700,170033,167757, 0, 1754,171307#`
3971			`d=001754 --!`
3972			`d=171307 --!`
3973			`d=000002 --! 0,177777, 1, 2, 0,177777#`
3974			`d=000000 --!`
3975			`d=177777 --!`
3976	25	wfjm	`d=000012 --!177777, 45716, 1,12,177777, 45716# w11a:12,045716,000000`
3977	2	wfjm	`d=045716 --!`
3978	25	wfjm	`d=000000 --!`
3979	2	wfjm	`d=000004 --! 0, 2,177770, 4, 0, 2#`
3980			`d=000000 --!`
3981			`d=000002 --!`
3982			`d=000004 --!177777,177776, 10, 4, 0,177776#`
3983			`d=000000 --!`
3984			`d=177776 --!`
3985			`d=000002 --! 1,177777, 1, 2, 1,177777#`
3986			`d=000001 --!`
3987			`d=177777 --!`
3988			`d=000002 --! 1, 0, 2, 2, 1, 0#`
3989			`d=000001 --!`
3990			`d=000000 --!`
3991			`d=000000 --! 1, 0, 3, 0, 52525, 1#`
3992			`d=052525 --!`
3993			`d=000001 --!`
3994			`d=000000 --! 23, 16054, 16537, 0, 246, 10222#`
3995			`d=000246 --!`
3996			`d=010222 --!`
3997			`#-----------------------------------------------------------------------------`
3998			`C Setup code 40 [base 12400] (systematic ASH test)`
3999			`#`
4000			`wal 012400 -- code:`
4001			`bwm 15`
4002			`000230 -- spl 0`
4003			`016400 -- L1: mov 2(r4),r0`
4004			`000002`
4005			`011412 -- mov (r4),(r2)`
4006			`072064 -- ash 4(r4),r0`
4007			`000004`
4008			`011265 -- mov (r2),2(r5)`
4009			`000002`
4010			`#12420`
4011			`010015 -- mov r0,(r5)`
4012			`062704 -- add #6,r4`
4013			`000006`
4014			`062705 -- add #4,r5`
4015			`000004`
4016			`077315 -- sob r3,L1`
4017			`000000 -- halt`
4018			`#`
4019			`C Exec code 40 (systematic ASH test)`
4020			`C Exec test 40.1: data adapted from ash.s11 code of Begemot p11-2.10c`
4021			`#`
4022			`# The {} comments are original comments from Harti Brandt`
4023			`# Annotations starting with !! indicated mods for W11`
4024			`# Note, that the W11 does not have the microcode bugs of the J11 !`
4025			`#`
4026			`wal 036000 -- setup test vector:`
4027			`# test shift amount 0`
4028			`bwm 150`
4029			`000000 -- 00, 000000, 000000, 000000, 04`
4030			`000000 --`
4031			`000000 --`
4032			`000017 -- 17, 000000, 000000, 000000, 04`
4033			`000000 --`
4034			`000000 --`
4035			`000017 -- 17, 100001, 000000, 100001, 10`
4036			`100001 --`
4037			`000000 --`
4038			`000017 -- 17, 040001, 000000, 040001, 00`
4039			`040001 --`
4040			`000000 --`
4041			`000017 -- 17, 040001, 177700, 040001, 00`
4042			`040001 --`
4043			`177700 --`
4044			`# right shift positive values`
4045			`000000 -- 00, 000000, 000077, 000000, 04`
4046			`000000 --`
4047			`000077 --`
4048			`000017 -- 17, 000000, 000077, 000000, 04`
4049			`000000 --`
4050			`000077 --`
4051			`000000 -- 00, 000002, 000077, 000001, 00`
4052			`000002 --`
4053			`000077 --`
4054			`000000 -- 00, 000001, 000077, 000000, 05`
4055			`000001 --`
4056			`000077 --`
4057			`000000 -- 00, 000003, 000076, 000000, 05`
4058			`000003 --`
4059			`000076 --`
4060			`000000 -- 00, 000001, 000076, 000000, 04`
4061			`000001 --`
4062			`000076 --`
4063			`000000 -- 00, 040000, 000062, 000001, 00`
4064			`040000 --`
4065			`000062 --`
4066			`000000 -- 00, 040000, 000061, 000000, 05`
4067			`040000 --`
4068			`000061 --`
4069			`000000 -- 00, 040000, 000060, 000000, 04`
4070			`040000 --`
4071			`000060 --`
4072			`000000 -- 00, 040000, 000042, 000000, 04`
4073			`040000 --`
4074			`000042 --`
4075			`000000 -- 00, 040000, 000041, 000000, 04`
4076			`040000 --`
4077			`000041 --`
4078			`000000 -- 00, 040000, 000040, 000000, 04`
4079			`040000 --`
4080			`000040 --`
4081			`000000 -- 00, 040000, 100037, 000000, 04`
4082			`040000 --`
4083			`100037 --`
4084			`# right shift negative numbers`
4085			`000000 -- 00, 100002, 000077, 140001, 10`
4086			`100002 --`
4087			`000077 --`
4088			`000000 -- 00, 100002, 000076, 160000, 11`
4089			`100002 --`
4090			`000076 --`
4091			`000000 -- 00, 100002, 000075, 170000, 10`
4092			`100002 --`
4093			`000075 --`
4094			`000000 -- 00, 100002, 000062, 177776, 10`
4095			`100002 --`
4096			`000062 --`
4097			`000000 -- 00, 100002, 000061, 177777, 10`
4098			`100002 --`
4099			`000061 --`
4100			`000000 -- 00, 100002, 000060, 177777, 11`
4101			`100002 --`
4102			`000060 --`
4103			`000000 -- 00, 100002, 000057, 177777, 11`
4104			`100002 --`
4105			`000057 --`
4106			`000000 -- 00, 100002, 000056, 177777, 11`
4107			`100002 --`
4108			`000056 --`
4109			`000000 -- 00, 100002, 000041, 177777, 11`
4110			`100002 --`
4111			`000041 --`
4112			`000000 -- 00, 100002, 000040, 177777, 11`
4113			`100002 --`
4114			`000040 --`
4115			`000000 -- 00, 100002, 040037, 177777, 11`
4116			`100002 --`
4117			`040037 --`
4118			`# left shift positive numbers`
4119			`000000 -- 00, 000000, 000001, 000000, 04`
4120			`000000 --`
4121			`000001 --`
4122			`000017 -- 17, 000000, 000001, 000000, 04`
4123			`000000 --`
4124			`000001 --`
4125			`000000 -- 00, 000001, 000007, 000200, 00`
4126			`000001 --`
4127			`000007 --`
4128			`000000 -- 00, 000001, 000016, 040000, 00`
4129			`000001 --`
4130			`000016 --`
4131			`000000 -- 00, 000001, 000017, 100000, 12`
4132			`000001 --`
4133			`000017 --`
4134			`000000 -- 00, 000001, 000020, 000000, 07`
4135			`000001 --`
4136			`000020 --`
4137			`000000 -- 00, 000001, 000021, 000000, 06`
4138			`000001 --`
4139			`000021 --`
4140			`000000 -- 00, 000001, 000036, 000000, 06`
4141			`000001 --`
4142			`000036 --`
4143			`000000 -- 00, 000001, 000037, 000000, 04 {????}`
4144			`000001 --`
4145			`000037 --`
4146			`000000 -- 00, 000001, 000040, 000000, 04 {right shift!}`
4147			`000001 --`
4148			`000040 --`
4149			`000000 -- 00, 000001, 010037, 000000, 04 {right shift!}`
4150			`000001 --`
4151			`010037 --`
4152			`# left shift negative numbers`
4153			`000000 -- 00, 100001, 000001, 000002, 03`
4154			`100001 --`
4155			`000001 --`
4156			`000000 -- 00, 140001, 000001, 100002, 11`
4157			`140001 --`
4158			`000001 --`
4159			`000000 -- 00, 140001, 000002, 000004, 03`
4160			`140001 --`
4161			`000002 --`
4162			`000000 -- 00, 140001, 000016, 040000, 02`
4163			`140001 --`
4164			`000016 --`
4165			`000000 -- 00, 140001, 000017, 100000, 12`
4166			`140001 --`
4167			`000017 --`
4168			`000000 -- 00, 140001, 000020, 000000, 07`
4169			`140001 --`
4170			`000020 --`
4171			`000000 -- 00, 140001, 000021, 000000, 06`
4172			`140001 --`
4173			`000021 --`
4174			`000000 -- 00, 140002, 000035, 000000, 06`
4175			`140002 --`
4176			`000035 --`
4177			`000000 -- 00, 140002, 000036, 000000, 06`
4178			`140002 --`
4179			`000036 --`
4180			`000000 -- 00, 140002, 000037, 177777, 11 {????}`
4181			`140002 --`
4182			`000037 --`
4183			`#----`
4184			`wr2 177776 -- r2=177776 -> psw`
4185			`wr3 000062 -- r3=62 -> test count`
4186			`wr4 036000 -- r4=36000 -> input area`
4187			`wr5 037000 -- r5=37000 -> output area`
4188			`wsp 001400 -- sp=1400`
4189			`stapc 012400 -- start @ 12400`
4190			`wtgo`
4191			`rpc d=012436 -- ! pc`
4192			`rr3 d=000000 -- ! r3=0`
4193			`rr4 d=036454 -- ! r4=36454`
4194			`rr5 d=037310 -- ! r5=37310`
4195			`wal 037000 --`
4196			`# test shift amount 0`
4197			`brm 100`
4198			`d=000000 -- 00, 000000, 000000, 000000, 04`
4199			`d=000004 --`
4200			`d=000000 -- 17, 000000, 000000, 000000, 04`
4201			`d=000004 --`
4202			`d=100001 -- 17, 100001, 000000, 100001, 10`
4203			`d=000010 --`
4204			`d=040001 -- 17, 040001, 000000, 040001, 00`
4205			`d=000000 --`
4206			`d=040001 -- 17, 040001, 177700, 040001, 00`
4207			`d=000000 --`
4208			`#37024 # right shift positive values`
4209			`d=000000 -- 00, 000000, 000077, 000000, 04`
4210			`d=000004 --`
4211			`d=000000 -- 17, 000000, 000077, 000000, 04`
4212			`d=000004 --`
4213			`d=000001 -- 00, 000002, 000077, 000001, 00`
4214			`d=000000 --`
4215			`#37040`
4216			`d=000000 -- 00, 000001, 000077, 000000, 05`
4217			`d=000005 --`
4218			`d=000000 -- 00, 000003, 000076, 000000, 05`
4219			`d=000005 --`
4220			`d=000000 -- 00, 000001, 000076, 000000, 04`
4221			`d=000004 --`
4222			`d=000001 -- 00, 040000, 000062, 000001, 00`
4223			`d=000000 --`
4224			`#37060`
4225			`d=000000 -- 00, 040000, 000061, 000000, 05`
4226			`d=000005 --`
4227			`d=000000 -- 00, 040000, 000060, 000000, 04`
4228			`d=000004 --`
4229			`d=000000 -- 00, 040000, 000042, 000000, 04`
4230			`d=000004 --`
4231			`d=000000 -- 00, 040000, 000041, 000000, 04`
4232			`d=000004 --`
4233			`#37100`
4234			`d=000000 -- 00, 040000, 000040, 000000, 04`
4235			`d=000004 --`
4236			`d=000000 -- 00, 040000, 100037, 000000, 04`
4237			`d=000006 -- !!04->06`
4238			`#37110 # right shift negative numbers`
4239			`d=140001 -- 00, 100002, 000077, 140001, 10`
4240			`d=000010 --`
4241			`d=160000 -- 00, 100002, 000076, 160000, 11`
4242			`d=000011 --`
4243			`#37120`
4244			`d=170000 -- 00, 100002, 000075, 170000, 10`
4245			`d=000010 --`
4246			`d=177776 -- 00, 100002, 000062, 177776, 10`
4247			`d=000010 --`
4248			`d=177777 -- 00, 100002, 000061, 177777, 10`
4249			`d=000010 --`
4250			`d=177777 -- 00, 100002, 000060, 177777, 11`
4251			`d=000011 --`
4252			`#37140`
4253			`d=177777 -- 00, 100002, 000057, 177777, 11`
4254			`d=000011 --`
4255			`d=177777 -- 00, 100002, 000056, 177777, 11`
4256			`d=000011 --`
4257			`d=177777 -- 00, 100002, 000041, 177777, 11`
4258			`d=000011 --`
4259			`d=177777 -- 00, 100002, 000040, 177777, 11`
4260			`d=000011 -- see Note below [[s:10]]`
4261			`d=000000 -- 00, 100002, 040037, 177777, 11 !!-1->0`
4262			`d=000006 -- !!11->06`
4263			`#37164 # left shift positive numbers`
4264			`d=000000 -- 00, 000000, 000001, 000000, 04`
4265			`d=000004 --`
4266			`d=000000 -- 17, 000000, 000001, 000000, 04`
4267			`d=000004 --`
4268			`d=000200 -- 00, 000001, 000007, 000200, 00`
4269			`d=000000 --`
4270			`#37200`
4271			`d=040000 -- 00, 000001, 000016, 040000, 00`
4272			`d=000000 --`
4273			`d=100000 -- 00, 000001, 000017, 100000, 12`
4274			`d=000012 --`
4275			`d=000000 -- 00, 000001, 000020, 000000, 07`
4276			`d=000007 --`
4277			`d=000000 -- 00, 000001, 000021, 000000, 06`
4278			`d=000006 --`
4279			`#37220`
4280			`d=000000 -- 00, 000001, 000036, 000000, 06`
4281			`d=000006 --`
4282			`d=000000 -- 00, 000001, 000037, 000000, 04 {????}`
4283			`d=000006 -- !!04->06`
4284			`d=000000 -- 00, 000001, 000040, 000000, 04 {right shift!}`
4285			`d=000004 --`
4286			`d=000000 -- 00, 000001, 010037, 000000, 04 {right shift!}`
4287			`d=000006 -- !!04->06`
4288			`#37240 # left shift negative numbers`
4289			`d=000002 -- 00, 100001, 000001, 000002, 03`
4290			`d=000003 --`
4291			`d=100002 -- 00, 140001, 000001, 100002, 11`
4292			`d=000011 --`
4293			`d=000004 -- 00, 140001, 000002, 000004, 03`
4294			`d=000003 --`
4295			`d=040000 -- 00, 140001, 000016, 040000, 02`
4296			`d=000002 --`
4297			`#37260`
4298			`d=100000 -- 00, 140001, 000017, 100000, 12`
4299			`d=000012 --`
4300			`d=000000 -- 00, 140001, 000020, 000000, 07`
4301			`d=000007 --`
4302			`d=000000 -- 00, 140001, 000021, 000000, 06`
4303			`d=000006 --`
4304			`d=000000 -- 00, 140002, 000035, 000000, 06`
4305			`d=000006 --`
4306			`#37300`
4307			`d=000000 -- 00, 140002, 000036, 000000, 06`
4308			`d=000006 --`
4309			`d=000000 -- 00, 140002, 000037, 177777, 11 {????} !!-1->0`
4310			`d=000006 -- !!11->06`
4311			`#`
4312			`# simh notes:`
4313			`# 1. ash dst=100002,src=040 sets C=0 in simh. PSW is: s:10 b:11 W11:11`
4314			`#`
4315			`#-----------------------------------------------------------------------------`
4316			`C Setup code 41 [base 12500] (systematic ASHC even test)`
4317			`#`
4318			`wal 012500 -- code:`
4319			`bwm 19`
4320			`000230 -- spl 0`
4321			`016400 -- L1: mov 2(r4),r0`
4322			`000002`
4323			`016401 -- mov 4(r4),r1`
4324			`000004`
4325			`011412 -- mov (r4),(r2)`
4326			`073064 -- ashc 6(r4),r0`
4327			`000006`
4328			`#12520`
4329			`011265 -- mov (r2),4(r5)`
4330			`000004`
4331			`010015 -- mov r0,(r5)`
4332			`010165 -- mov r1,2(r5)`
4333			`000002`
4334			`062704 -- add #10,r4`
4335			`000010`
4336			`062705 -- add #6,r5`
4337			`#12540`
4338			`000006`
4339			`077321 -- sob r3,L1`
4340			`000000 -- halt`
4341			`#`
4342			`C Exec code 41 (systematic ASHC even test)`
4343			`C Exec test 41.1: data adapted from ashc.s11 code of Begemot p11-2.10c`
4344			`#`
4345			`# The {} comments are original comments from Harti Brandt`
4346			`# Annotations starting with !! indicated mods for W11`
4347			`# Note, that the W11 does not have the microcode bugs of the J11 !`
4348			`#`
4349			`wal 036000 -- setup test vector:`
4350			`# test when no shift at all, cc must be correctly set`
4351			`bwm 188`
4352			`000000 -- 00, 000000, 000000, 000000, 000000, 000000, 04`
4353			`000000 --`
4354			`000000 --`
4355			`000000 --`
4356			`000017 -- 17, 000000, 000000, 000000, 000000, 000000, 04`
4357			`000000 --`
4358			`000000 --`
4359			`000000 --`
4360			`000017 -- 17, 040000, 000001, 000000, 040000, 000001, 00`
4361			`040000 --`
4362			`000001 --`
4363			`000000 --`
4364			`000017 -- 17, 100000, 000001, 000000, 100000, 000001, 10`
4365			`100000 --`
4366			`000001 --`
4367			`000000 --`
4368			`000017 -- 17, 100000, 000001, 177700, 100000, 000001, 10`
4369			`100000 --`
4370			`000001 --`
4371			`177700 --`
4372			`# right shifts of positive numbers`
4373			`000000 -- 00, 000000, 000000, 000077, 000000, 000000, 04`
4374			`000000 --`
4375			`000000 --`
4376			`000077 --`
4377			`000017 -- 17, 000000, 000000, 000077, 000000, 000000, 04`
4378			`000000 --`
4379			`000000 --`
4380			`000077 --`
4381			`000000 -- 00, 040000, 000000, 000077, 020000, 000000, 00`
4382			`040000 --`
4383			`000000 --`
4384			`000077 --`
4385			`000000 -- 00, 040000, 000000, 177777, 020000, 000000, 00`
4386			`040000 --`
4387			`000000 --`
4388			`000077 --`
4389			`000000 -- 00, 040000, 000000, 000060, 000000, 040000, 00`
4390			`040000 --`
4391			`000000 --`
4392			`000060 --`
4393			`000000 -- 00, 040000, 000000, 000042, 000000, 000001, 00`
4394			`040000 --`
4395			`000000 --`
4396			`000042 --`
4397			`000000 -- 00, 040000, 000000, 000041, 000000, 000000, 05`
4398			`040000 --`
4399			`000000 --`
4400			`000041 --`
4401			`000000 -- 00, 040000, 000000, 000040, 000000, 000000, 04`
4402			`040000 --`
4403			`000000 --`
4404			`000040 --`
4405			`000000 -- 00, 040000, 000000, 177737, 000000, 000000, 04`
4406			`040000 --`
4407			`000000 --`
4408			`177737 --`
4409			`000000 -- 00, 000000, 000001, 177737, 000000, 000000, 04`
4410			`000000 --`
4411			`000001 --`
4412			`177737 --`
4413			`# right shifts of negative numbers`
4414			`000000 -- 00, 100000, 000002, 000077, 140000, 000001, 10`
4415			`100000 --`
4416			`000002 --`
4417			`000077 --`
4418			`000000 -- 00, 100020, 000001, 000077, 140010, 000000, 11`
4419			`100020 --`
4420			`000001 --`
4421			`000077 --`
4422			`000000 -- 00, 177777, 177776, 000077, 177777, 177777, 10`
4423			`177777 --`
4424			`177776 --`
4425			`000077 --`
4426			`000000 -- 00, 177777, 177777, 000077, 177777, 177777, 11`
4427			`177777 --`
4428			`177777 --`
4429			`000077 --`
4430			`000000 -- 00, 100000, 100000, 000060, 177777, 100000, 11`
4431			`100000 --`
4432			`100000 --`
4433			`000060 --`
4434			`000000 -- 00, 100000, 000000, 000060, 177777, 100000, 10`
4435			`100000 --`
4436			`000000 --`
4437			`000060 --`
4438			`000000 -- 00, 100000, 000001, 000042, 177777, 177776, 10`
4439			`100000 --`
4440			`000001 --`
4441			`000042 --`
4442			`000000 -- 00, 100000, 000001, 000041, 177777, 177777, 10`
4443			`100000 --`
4444			`000001 --`
4445			`000041 --`
4446			`000000 -- 00, 100000, 000001, 000040, 177777, 177777, 11`
4447			`100000 --`
4448			`000001 --`
4449			`000040 --`
4450			`000000 -- 00, 100000, 000001, 177737, 177777, 177777, 11`
4451			`100000 --`
4452			`000001 --`
4453			`177737 --`
4454			`# left shifts of positive numbers`
4455			`000000 -- 00, 000000, 000000, 000001, 000000, 000000, 04`
4456			`000000 --`
4457			`000000 --`
4458			`000001 --`
4459			`000017 -- 17, 000000, 000000, 000001, 000000, 000000, 04`
4460			`000000 --`
4461			`000000 --`
4462			`000001 --`
4463			`000000 -- 00, 000002, 000001, 000001, 000004, 000002, 00`
4464			`000002 --`
4465			`000001 --`
4466			`000001 --`
4467			`000000 -- 00, 000002, 100000, 000001, 000005, 000000, 00`
4468			`000002 --`
4469			`100000 --`
4470			`000001 --`
4471			`000000 -- 00, 040000, 000000, 000001, 100000, 000000, 12`
4472			`040000 --`
4473			`000000 --`
4474			`000001 --`
4475			`000000 -- 00, 040000, 000000, 000002, 000000, 000000, 07`
4476			`040000 --`
4477			`000000 --`
4478			`000002 --`
4479			`000000 -- 00, 040000, 000000, 000003, 000000, 000000, 06`
4480			`040000 --`
4481			`000000 --`
4482			`000003 --`
4483			`000000 -- 00, 000000, 000001, 177701, 000000, 000002, 00`
4484			`000000 --`
4485			`000001 --`
4486			`177701 --`
4487			`000000 -- 00, 000000, 000001, 177735, 020000, 000000, 00`
4488			`000000 --`
4489			`000001 --`
4490			`177735 --`
4491			`000000 -- 00, 000000, 000001, 177736, 040000, 000000, 00`
4492			`000000 --`
4493			`000001 --`
4494			`177736 --`
4495			`000000 -- 00, 000000, 000001, 000037, 100000, 000000, 12 {left shift!}`
4496			`000000 --`
4497			`000001 --`
4498			`000037 --`
4499			`000000 -- 00, 000000, 000001, 177737, 000000, 000000, 04 {right shift!}`
4500			`000000 --`
4501			`000001 --`
4502			`177737 --`
4503			`000000 -- 00, 000000, 000001, 020037, 000000, 000000, 04 {right shift!}`
4504			`000000 --`
4505			`000001 --`
4506			`020037 --`
4507			`# left shifts of negative numbers`
4508			`000000 -- 00, 177777, 177777, 000001, 177777, 177776, 11`
4509			`177777 --`
4510			`177777 --`
4511			`000001 --`
4512			`000000 -- 00, 177777, 177777, 000002, 177777, 177774, 11`
4513			`177777 --`
4514			`177777 --`
4515			`000002 --`
4516			`000000 -- 00, 177777, 177777, 000036, 140000, 000000, 11`
4517			`177777 --`
4518			`177777 --`
4519			`000036 --`
4520			`000000 -- 00, 177777, 177777, 000037, 100000, 000000, 11`
4521			`177777 --`
4522			`177777 --`
4523			`000037 --`
4524			`000000 -- 00, 177777, 177776, 000037, 000000, 000000, 07`
4525			`177777 --`
4526			`177776 --`
4527			`000037 --`
4528			`000000 -- 00, 177777, 177774, 000037, 000000, 000000, 06`
4529			`177777 --`
4530			`177774 --`
4531			`000037 --`
4532			`000000 -- 00, 177777, 177777, 177701, 177777, 177776, 11`
4533			`177777 --`
4534			`177777 --`
4535			`177701 --`
4536			`000000 -- 00, 177777, 177777, 001037, 177777, 177777, 11 {right shift!}`
4537			`177777 --`
4538			`177777 --`
4539			`001037 --`
4540			`000000 -- 00, 177777, 177777, 001036, 140000, 000000, 11`
4541			`177777 --`
4542			`177777 --`
4543			`001036 --`
4544			`#----`
4545			`wr2 177776 -- r2=177776`
4546			`wr3 000057 -- r3=57 (47.)`
4547			`wr4 036000 -- r4=36000`
4548			`wr5 037000 -- r5=37000`
4549			`wsp 001400 -- sp=1400`
4550			`stapc 012500 -- start @ 12500`
4551			`wtgo`
4552			`rpc d=012546 -- ! pc`
4553			`rr3 d=000000 -- ! r3=0`
4554			`rr4 d=036570 -- ! r4=36570`
4555			`rr5 d=037432 -- ! r5=37432`
4556			`wal 037000 --`
4557			`# test when no shift at all, cc must be correctly set`
4558			`brm 141`
4559			`d=000000 --!00, 000000, 000000, 000000, 000000, 000000, 04`
4560			`d=000000 --!`
4561			`d=000004 --!`
4562			`d=000000 --!17, 000000, 000000, 000000, 000000, 000000, 04`
4563			`d=000000 --!`
4564			`d=000004 --!`
4565			`d=040000 --!17, 040000, 000001, 000000, 040000, 000001, 00`
4566			`d=000001 --!`
4567			`d=000000 --!`
4568			`d=100000 --!17, 100000, 000001, 000000, 100000, 000001, 10`
4569			`d=000001 --!`
4570			`d=000010 --!`
4571			`#37030`
4572			`d=100000 --!17, 100000, 000001, 177700, 100000, 000001, 10`
4573			`d=000001 --!`
4574			`d=000010 --!`
4575			`# right shifts of positive numbers`
4576			`d=000000 --!00, 000000, 000000, 000077, 000000, 000000, 04`
4577			`d=000000 --!`
4578			`d=000004 --!`
4579			`d=000000 --!17, 000000, 000000, 000077, 000000, 000000, 04`
4580			`d=000000 --!`
4581			`d=000004 --!`
4582			`d=020000 --!00, 040000, 000000, 000077, 020000, 000000, 00`
4583			`d=000000 --!`
4584			`d=000000 --!`
4585			`#37060`
4586			`d=020000 --!00, 040000, 000000, 177777, 020000, 000000, 00`
4587			`d=000000 --!`
4588			`d=000000 --!`
4589			`d=000000 --!00, 040000, 000000, 000060, 000000, 040000, 00`
4590			`d=040000 --!`
4591			`d=000000 --!`
4592			`d=000000 --!00, 040000, 000000, 000042, 000000, 000001, 00`
4593			`d=000001 --!`
4594			`d=000000 --!`
4595			`d=000000 --!00, 040000, 000000, 000041, 000000, 000000, 05`
4596			`d=000000 --!`
4597			`d=000005 --!`
4598			`#37110`
4599			`d=000000 --!00, 040000, 000000, 000040, 000000, 000000, 04`
4600			`d=000000 --!`
4601			`d=000004 --!`
4602			`d=000000 --!00, 040000, 000000, 177737, 000000, 000000, 04`
4603			`d=000000 --!`
4604			`d=000006 --! !!04->06`
4605			`d=100000 --!00, 000000, 000001, 177737, 000000, 000000, 04!!->100000`
4606			`d=000000 --!`
4607			`d=000012 --! !!04->12`
4608			`# right shifts of negative numbers`
4609			`d=140000 --!00, 100000, 000002, 000077, 140000, 000001, 10`
4610			`d=000001 --!`
4611			`d=000010 --!`
4612			`#37140`
4613			`d=140010 --!00, 100020, 000001, 000077, 140010, 000000, 11`
4614			`d=000000 --!`
4615			`d=000011 --!`
4616			`d=177777 --!00, 177777, 177776, 000077, 177777, 177777, 10`
4617			`d=177777 --!`
4618			`d=000010 --!`
4619			`d=177777 --!00, 177777, 177777, 000077, 177777, 177777, 11`
4620			`d=177777 --!`
4621			`d=000011 --!`
4622			`d=177777 --!00, 100000, 100000, 000060, 177777, 100000, 11`
4623			`d=100000 --!`
4624			`d=000011 --!`
4625			`#37170`
4626			`d=177777 --!00, 100000, 000000, 000060, 177777, 100000, 10`
4627			`d=100000 --!`
4628			`d=000010 --!`
4629			`d=177777 --!00, 100000, 000001, 000042, 177777, 177776, 10`
4630			`d=177776 --!`
4631			`d=000010 --!`
4632			`d=177777 --!00, 100000, 000001, 000041, 177777, 177777, 10`
4633			`d=177777 --!`
4634			`d=000010 --!`
4635			`d=177777 --!00, 100000, 000001, 000040, 177777, 177777, 11`
4636			`d=177777 --!`
4637			`d=000011 --!`
4638			`#37220`
4639			`d=100000 --!00, 100000, 000001, 177737, 177777, 177777, 11!!->100000`
4640			`d=000000 --! !!->000000`
4641			`d=000012 --! !!11->12`
4642			`# left shifts of positive numbers`
4643			`d=000000 --!00, 000000, 000000, 000001, 000000, 000000, 04`
4644			`d=000000 --!`
4645			`d=000004 --!`
4646			`d=000000 --!17, 000000, 000000, 000001, 000000, 000000, 04`
4647			`d=000000 --!`
4648			`d=000004 --!`
4649			`d=000004 --!00, 000002, 000001, 000001, 000004, 000002, 00`
4650			`d=000002 --!`
4651			`d=000000 --!`
4652			`#37250`
4653			`d=000005 --!00, 000002, 100000, 000001, 000005, 000000, 00`
4654			`d=000000 --!`
4655			`d=000000 --!`
4656			`d=100000 --!00, 040000, 000000, 000001, 100000, 000000, 12`
4657			`d=000000 --!`
4658			`d=000012 --!`
4659			`d=000000 --!00, 040000, 000000, 000002, 000000, 000000, 07`
4660			`d=000000 --!`
4661			`d=000007 --!`
4662			`d=000000 --!00, 040000, 000000, 000003, 000000, 000000, 06`
4663			`d=000000 --!`
4664			`d=000006 --!`
4665			`#37300`
4666			`d=000000 --!00, 000000, 000001, 177701, 000000, 000002, 00`
4667			`d=000002 --!`
4668			`d=000000 --!`
4669			`d=020000 --!00, 000000, 000001, 177735, 020000, 000000, 00`
4670			`d=000000 --!`
4671			`d=000000 --!`
4672			`d=040000 --!00, 000000, 000001, 177736, 040000, 000000, 00`
4673			`d=000000 --!`
4674			`d=000000 --!`
4675			`d=100000 --!00, 000000, 000001, 000037, 100000, 000000, 12 {left shift!}`
4676			`d=000000 --!`
4677			`d=000012 --!`
4678			`#37330`
4679			`d=100000 --!00, 000000, 000001, 177737, 000000, 000000, 04 {right shift!} !!->100000`
4680			`d=000000 --!`
4681			`d=000012 --! !!04->12`
4682			`d=100000 --!00, 000000, 000001, 020037, 000000, 000000, 04 {right shift!} !!->100000`
4683			`d=000000 --!`
4684			`d=000012 --! !!04->12`
4685			`# left shifts of negative numbers`
4686			`d=177777 --!00, 177777, 177777, 000001, 177777, 177776, 11`
4687			`d=177776 --!`
4688			`d=000011 --!`
4689			`d=177777 --!00, 177777, 177777, 000002, 177777, 177774, 11`
4690			`d=177774 --!`
4691			`d=000011 --!`
4692			`#37360`
4693			`d=140000 --!00, 177777, 177777, 000036, 140000, 000000, 11`
4694			`d=000000 --!`
4695			`d=000011 --!`
4696			`d=100000 --!00, 177777, 177777, 000037, 100000, 000000, 11`
4697			`d=000000 --!`
4698			`d=000011 --!`
4699			`d=000000 --!00, 177777, 177776, 000037, 000000, 000000, 07`
4700			`d=000000 --!`
4701			`d=000007 --!`
4702			`d=000000 --!00, 177777, 177774, 000037, 000000, 000000, 06`
4703			`d=000000 --!`
4704			`d=000006 --!`
4705			`#37410`
4706			`d=177777 --!00, 177777, 177777, 177701, 177777, 177776, 11`
4707			`d=177776 --!`
4708			`d=000011 --!`
4709			`d=100000 --!00, 177777, 177777, 001037, 177777, 177777, 11 {right shift!} !!->100000`
4710			`d=000000 --! !!->00000`
4711			`d=000011 --!`
4712			`d=140000 --!00, 177777, 177777, 001036, 140000, 000000, 11`
4713			`d=000000 --!`
4714			`d=000011 --!`
4715			`#-----------------------------------------------------------------------------`
4716			`C Setup code 42 [base 12600] (systematic ASHC odd test)`
4717			`#`
4718			`wal 012600 -- code:`
4719			`bwm 15`
4720			`000230 -- spl 0`
4721			`016401 -- L1: mov 2(r4),r1`
4722			`000002`
4723			`011412 -- mov (r4),(r2)`
4724			`073164 -- ashc 4(r4),r1`
4725			`000004`
4726			`011265 -- mov (r2),2(r5)`
4727			`000002`
4728			`#12620`
4729			`010115 -- mov r1,(r5)`
4730			`062704 -- add #6,r4`
4731			`000006`
4732			`062705 -- add #4,r5`
4733			`000004`
4734			`077315 -- sob r3,L1`
4735			`000000 -- halt`
4736			`#`
4737			`C Exec code 42 (systematic ASHC odd test)`
4738			`C Exec test 42.1: data adapted from ashc.s11 code of Begemot p11-2.10c`
4739			`#`
4740			`# The {} comments are original comments from Harti Brandt`
4741			`# Annotations starting with !! indicated mods for W11`
4742			`# Note, that the W11 does not have the microcode bugs of the J11 !`
4743			`#`
4744			`wal 036000 -- setup test vector:`
4745			`# test shift amount 0`
4746			`bwm 165`
4747			`000000 -- 00, 000000, 000000, 000000, 04`
4748			`000000 --`
4749			`000000 --`
4750			`000017 -- 17, 000000, 000000, 000000, 04`
4751			`000000 --`
4752			`000000 --`
4753			`000017 -- 17, 100001, 000000, 100001, 10`
4754			`100001 --`
4755			`000000 --`
4756			`000017 -- 17, 040001, 000000, 040001, 00`
4757			`040001 --`
4758			`000000 --`
4759			`000017 -- 17, 040001, 177700, 040001, 00`
4760			`040001 --`
4761			`177700 --`
4762			`# right rotate positive values`
4763			`000000 -- 00, 000000, 000077, 000000, 04`
4764			`000000 --`
4765			`000077 --`
4766			`000017 -- 17, 000000, 000077, 000000, 04`
4767			`000000 --`
4768			`000077 --`
4769			`000000 -- 00, 000002, 000077, 000001, 00`
4770			`000002 --`
4771			`000077 --`
4772			`000000 -- 00, 000001, 000077, 100000, 01 {cc is funny!}`
4773			`000001 --`
4774			`000077 --`
4775			`000000 -- 00, 000003, 000076, 140000, 01`
4776			`000003 --`
4777			`000076 --`
4778			`000000 -- 00, 000001, 000076, 040000, 00`
4779			`000001 --`
4780			`000076 --`
4781			`000000 -- 00, 040000, 000060, 040000, 00`
4782			`040000 --`
4783			`000060 --`
4784			`000000 -- 00, 040000, 000043, 000002, 00`
4785			`040000 --`
4786			`000043 --`
4787			`000000 -- 00, 040000, 000042, 000001, 00`
4788			`040000 --`
4789			`000042 --`
4790			`000000 -- 00, 040000, 000041, 000000, 05`
4791			`040000 --`
4792			`000041 --`
4793			`000000 -- 00, 040000, 000040, 000000, 04`
4794			`040000 --`
4795			`000040 --`
4796			`000000 -- 00, 040000, 100037, 000000, 04`
4797			`040000 --`
4798			`100037 --`
4799			`000000 -- 00, 020000, 000043, 000001, 00`
4800			`020000 --`
4801			`000043 --`
4802			`000000 -- 00, 020000, 000042, 000000, 05`
4803			`020000 --`
4804			`000042 --`
4805			`000000 -- 00, 020000, 000041, 000000, 04`
4806			`020000 --`
4807			`000041 --`
4808			`# right rotate negative numbers`
4809			`000000 -- 00, 100002, 000077, 040001, 10`
4810			`100002 --`
4811			`000077 --`
4812			`000000 -- 00, 100002, 000076, 120000, 11`
4813			`100002 --`
4814			`000076 --`
4815			`000000 -- 00, 100002, 000075, 050000, 10`
4816			`100002 --`
4817			`000075 --`
4818			`000000 -- 00, 100002, 000061, 000005, 10`
4819			`100002 --`
4820			`000061 --`
4821			`000000 -- 00, 100002, 000060, 100002, 11`
4822			`100002 --`
4823			`000060 --`
4824			`000000 -- 00, 100002, 000057, 140001, 10`
4825			`100002 --`
4826			`000057 --`
4827			`000000 -- 00, 100002, 000056, 160000, 11`
4828			`100002 --`
4829			`000056 --`
4830			`000000 -- 00, 100002, 000055, 170000, 10`
4831			`100002 --`
4832			`000055 --`
4833			`000000 -- 00, 100002, 000042, 177776, 10`
4834			`100002 --`
4835			`000042 --`
4836			`000000 -- 00, 100002, 000041, 177777, 10`
4837			`100002 --`
4838			`000041 --`
4839			`000000 -- 00, 100002, 000040, 177777, 11`
4840			`100002 --`
4841			`000040 --`
4842			`000000 -- 00, 100002, 040037, 177777, 11`
4843			`100002 --`
4844			`040037 --`
4845			`# left rotate positive numbers`
4846			`000000 -- 00, 000000, 000001, 000000, 04`
4847			`000000 --`
4848			`000001 --`
4849			`000000 -- 17, 000000, 000001, 000000, 04`
4850			`000000 --`
4851			`000001 --`
4852			`000000 -- 00, 000001, 000007, 000200, 00`
4853			`000001 --`
4854			`000007 --`
4855			`000000 -- 00, 000001, 000016, 040000, 00`
4856			`000001 --`
4857			`000016 --`
4858			`000000 -- 00, 000001, 000017, 100000, 12`
4859			`000001 --`
4860			`000017 --`
4861			`000000 -- 00, 000001, 000020, 000000, 03`
4862			`000001 --`
4863			`000020 --`
4864			`000000 -- 00, 000001, 000021, 000000, 02`
4865			`000001 --`
4866			`000021 --`
4867			`000000 -- 00, 000001, 000036, 000000, 02`
4868			`000001 --`
4869			`000036 --`
4870			`000000 -- 00, 000001, 000037, 000000, 12`
4871			`000001 --`
4872			`000037 --`
4873			`000000 -- 00, 000001, 000040, 000000, 04 {right shift!}`
4874			`000001 --`
4875			`000040 --`
4876			`000000 -- 00, 000001, 010037, 000000, 04 {right shift!}`
4877			`000001 --`
4878			`010037 --`
4879			`# left rotate negative numbers`
4880			`000000 -- 00, 100001, 000001, 000002, 03`
4881			`100001 --`
4882			`000001 --`
4883			`000000 -- 00, 140001, 000001, 100002, 11`
4884			`140001 --`
4885			`000001 --`
4886			`000000 -- 00, 140001, 000002, 000004, 03`
4887			`140001 --`
4888			`000002 --`
4889			`000000 -- 00, 140001, 000016, 040000, 02`
4890			`140001 --`
4891			`000016 --`
4892			`000000 -- 00, 140001, 000017, 100000, 12`
4893			`140001 --`
4894			`000017 --`
4895			`000000 -- 00, 140001, 000020, 000000, 13`
4896			`140001 --`
4897			`000020 --`
4898			`000000 -- 00, 140001, 000021, 000000, 13`
4899			`140001 --`
4900			`000021 --`
4901			`000000 -- 00, 140001, 000022, 000000, 03`
4902			`140001 --`
4903			`000022 --`
4904			`000000 -- 00, 140001, 000023, 000000, 02`
4905			`140001 --`
4906			`000023 --`
4907			`000000 -- 00, 140002, 000035, 000000, 02`
4908			`140002 --`
4909			`000035 --`
4910			`000000 -- 00, 140002, 000036, 000000, 12`
4911			`140002 --`
4912			`000036 --`
4913			`000000 -- 00, 140002, 000037, 000000, 07`
4914			`140002 --`
4915			`000037 --`
4916			`#----`
4917			`wr2 177776 -- r2=177776 -> psw`
4918			`wr3 000067 -- r3=67 (55.) -> test count`
4919			`wr4 036000 -- r4=36000 -> input area`
4920			`wr5 037000 -- r5=37000 -> output area`
4921			`wsp 001400 -- sp=1400`
4922			`stapc 012600 -- start @ 12600`
4923			`wtgo`
4924			`rpc d=012636 -- ! pc`
4925			`rr3 d=000000 -- ! r3=0`
4926			`rr4 d=036512 -- ! r4=36512`
4927			`rr5 d=037334 -- ! r5=37334`
4928			`wal 037000 --`
4929			`# test shift amount 0`
4930			`brm 110`
4931			`d=000000 --!00, 000000, 000000, 000000, 04`
4932			`d=000004 --!`
4933			`d=000000 --!17, 000000, 000000, 000000, 04`
4934			`d=000004 --!`
4935			`d=100001 --!17, 100001, 000000, 100001, 10`
4936			`d=000010 --!`
4937			`d=040001 --!17, 040001, 000000, 040001, 00`
4938			`d=000000 --!`
4939			`#37020`
4940			`d=040001 --!17, 040001, 177700, 040001, 00`
4941			`d=000000 --!`
4942			`# right rotate positive values`
4943			`d=000000 --!00, 000000, 000077, 000000, 04`
4944			`d=000004 --!`
4945			`d=000000 --!17, 000000, 000077, 000000, 04`
4946			`d=000004 --!`
4947			`d=000001 --!00, 000002, 000077, 000001, 00`
4948			`d=000000 --!`
4949			`#37040`
4950			`d=100000 --!00, 000001, 000077, 100000, 01 {cc is funny!}`
4951			`d=000001 --!`
4952			`d=140000 --!00, 000003, 000076, 140000, 01`
4953			`d=000001 --!`
4954			`d=040000 --!00, 000001, 000076, 040000, 00`
4955			`d=000000 --!`
4956			`d=040000 --!00, 040000, 000060, 040000, 00`
4957			`d=000000 --!`
4958			`#37060`
4959			`d=000002 --!00, 040000, 000043, 000002, 00`
4960			`d=000000 --!`
4961			`d=000001 --!00, 040000, 000042, 000001, 00`
4962			`d=000000 --!`
4963			`d=000000 --!00, 040000, 000041, 000000, 05`
4964			`d=000005 --!`
4965			`d=000000 --!00, 040000, 000040, 000000, 04`
4966			`d=000004 --!`
4967			`#37100`
4968			`d=000000 --!00, 040000, 100037, 000000, 04`
4969			`d=000006 --! !!04->06`
4970			`d=000001 --!00, 020000, 000043, 000001, 00`
4971			`d=000000 --!`
4972			`d=000000 --!00, 020000, 000042, 000000, 05`
4973			`d=000005 --!`
4974			`d=000000 --!00, 020000, 000041, 000000, 04`
4975			`d=000004 --!`
4976			`#37120 # right rotate negative numbers`
4977			`d=040001 --!00, 100002, 000077, 040001, 10`
4978			`d=000010 --!`
4979			`d=120000 --!00, 100002, 000076, 120000, 11`
4980			`d=000011 --!`
4981			`d=050000 --!00, 100002, 000075, 050000, 10`
4982			`d=000010 --!`
4983			`d=000005 --!00, 100002, 000061, 000005, 10`
4984			`d=000010 --!`
4985			`#37140`
4986			`d=100002 --!00, 100002, 000060, 100002, 11`
4987			`d=000011 --!`
4988			`d=140001 --!00, 100002, 000057, 140001, 10`
4989			`d=000010 --!`
4990			`d=160000 --!00, 100002, 000056, 160000, 11`
4991			`d=000011 --!`
4992			`d=170000 --!00, 100002, 000055, 170000, 10`
4993			`d=000010 --!`
4994			`#37160`
4995			`d=177776 --!00, 100002, 000042, 177776, 10`
4996			`d=000010 --!`
4997			`d=177777 --!00, 100002, 000041, 177777, 10`
4998			`d=000010 --!`
4999			`d=177777 --!00, 100002, 000040, 177777, 11`
5000			`d=000011 --!`
5001			`d=000000 --!00, 100002, 040037, 177777, 11 !!->000000`
5002			`d=000007 --! !!11->07`
5003			`#37200 # left rotate positive numbers`
5004			`d=000000 --!00, 000000, 000001, 000000, 04`
5005			`d=000004 --!`
5006			`d=000000 --!17, 000000, 000001, 000000, 04`
5007			`d=000004 --!`
5008			`d=000200 --!00, 000001, 000007, 000200, 00`
5009			`d=000000 --!`
5010			`d=040000 --!00, 000001, 000016, 040000, 00`
5011			`d=000000 --!`
5012			`#37220`
5013			`d=100000 --!00, 000001, 000017, 100000, 12`
5014			`d=000012 --!`
5015			`d=000000 --!00, 000001, 000020, 000000, 03`
5016			`d=000003 --!`
5017			`d=000000 --!00, 000001, 000021, 000000, 02`
5018			`d=000002 --!`
5019			`d=000000 --!00, 000001, 000036, 000000, 02`
5020			`d=000002 --!`
5021			`#37240`
5022			`d=000000 --!00, 000001, 000037, 000000, 12`
5023			`d=000012 --!`
5024			`d=000000 --!00, 000001, 000040, 000000, 04 {right shift!}`
5025			`d=000004 --!`
5026			`d=000000 --!00, 000001, 010037, 000000, 04 {right shift!}`
5027			`d=000012 --! !!04->12`
5028			`# left rotate negative numbers`
5029			`d=000002 --!00, 100001, 000001, 000002, 03`
5030			`d=000003 --!`
5031			`#37260`
5032			`d=100002 --!00, 140001, 000001, 100002, 11`
5033			`d=000011 --!`
5034			`d=000004 --!00, 140001, 000002, 000004, 03`
5035			`d=000003 --!`
5036			`d=040000 --!00, 140001, 000016, 040000, 02`
5037			`d=000002 --!`
5038			`d=100000 --!00, 140001, 000017, 100000, 12`
5039			`d=000012 --!`
5040			`#37300`
5041			`d=000000 --!00, 140001, 000020, 000000, 13`
5042			`d=000013 --!`
5043			`d=000000 --!00, 140001, 000021, 000000, 13`
5044			`d=000013 --!`
5045			`d=000000 --!00, 140001, 000022, 000000, 03`
5046			`d=000003 --!`
5047			`d=000000 --!00, 140001, 000023, 000000, 02`
5048			`d=000002 --!`
5049			`#37320`
5050			`d=000000 --!00, 140002, 000035, 000000, 02`
5051			`d=000002 --!`
5052			`d=000000 --!00, 140002, 000036, 000000, 12`
5053			`d=000012 --!`
5054			`d=000000 --!00, 140002, 000037, 000000, 07`
5055			`d=000007 --!`
5056			`#-----------------------------------------------------------------------------`
5057			`C Setup code 43 [base 12700] (Begemot MARK instruction test)`
5058			`# test data and code adapted from Mark.s11 code of Begemot p11-2.10c`
5059			`#`
5060			`wal 012700 -- code test 1: (basics)`
5061			`bwm 14`
5062			`012705 -- mov #77077,r5 ; cookie`
5063			`077077`
5064			`010546 -- mov r5,-(sp) ; push r5`
5065			`012746 -- mov #12,-(sp) ; parameter 1`
5066			`000012`
5067			`012746 -- mov #23,-(sp) ; parameter 2`
5068			`000023`
5069			`012746 -- mov #mark+2,-(sp) ; now the mark instruction`
5070			`#12720`
5071			`006402`
5072			`010605 -- mov sp,r5 ; let r5 point to mark instruction`
5073			`004737 -- jsr pc,subr ; call subroutine`
5074			`012770`
5075			`000240 -- noop`
5076			`000000 -- halt`
5077			`#-----`
5078			`wal 012740 -- code test 2: (MARK with max. # of args)`
5079			`bwm 10`
5080			`010546 -- mov r5, -(sp) ; push r5`
5081			`162706 -- sub #2*77, sp ; max number`
5082			`000176`
5083			`012746 -- mov #mark+77, -(sp) ; the mark instruction`
5084			`006477`
5085			`010605 -- mov sp, r5 ; let r5 point to mark instruction`
5086			`004737 -- jsr pc, subr ; call subroutine`
5087			`012770`
5088			`#12760`
5089			`000240 -- noop`
5090			`000000 -- halt`
5091			`#-----`
5092			`wal 012770 -- code (procedure):`
5093			`wmi 000205 -- subr: rts r5`
5094			`#-----`
5095			`C Exec code 43 (Begemot MARK test)`
5096			`C Exec test 43.1 (basics)`
5097			`# D RE RQ FU DAT`
5098			`wsp 001400 -- sp=1400`
5099			`stapc 012700 -- start @ 12700`
5100			`wtgo`
5101			`rpc d=012734 -- ! pc`
5102			`rr5 d=077077 -- ! r5`
5103			`rsp d=001400 -- ! sp`
5104			`wal 001366 --`
5105			`brm 5`
5106			`d=012730 -- ! mem(1366)`
5107			`d=006402 -- ! mem(1370)`
5108			`d=000023 -- ! mem(1372)`
5109			`d=000012 -- ! mem(1374)`
5110			`d=077077 -- ! mem(1376)`
5111			`#----`
5112			`C Exec test 43.2 (MARK with max. # of args)`
5113			`# D RE RQ FU DAT`
5114			`wsp 001400 -- sp=1400`
5115			`stapc 012740 -- start @ 12740`
5116			`wtgo`
5117			`rpc d=012764 -- ! pc`
5118			`rr5 d=077077 -- ! r5`
5119			`rsp d=001400 -- ! sp`
5120			`#-----------------------------------------------------------------------------`
5121			`C Setup code 44 [base 13000] (Implementation variations)`
5122			`# test various PDP11 implementation variations (DCJ11 user guide, table C-1)`
5123			`#`
5124			`wal 013000 -- code: (to be single stepped mostly)`
5125			`bwm 22`
5126			`010424 -- mov r4,(r4)+ ; case 1 and 2`
5127			`010444 -- mov r4,-(r4)`
5128			`010764 -- mov pc,2(r4)`
5129			`000002`
5130			`000124 -- jmp (r4)+`
5131			`000104 -- jmp r4`
5132			`000304 -- swab r4`
5133			`005214 -- inc (r4)`
5134			`#13020`
5135			`000006 -- rtt`
5136			`000000 -- halt`
5137			`000002 -- rti`
5138			`000000 -- halt`
5139			`010011 -- mov r0,(r1)`
5140			`010046 -- mov r0,-(sp)`
5141			`000114 -- jmp (r4)`
5142			`010021 -- mov r0,(r1)+`
5143			`#13040`
5144			`012100 -- mov (r1)+,r0`
5145			`005221 -- inc (r1)+`
5146			`106621 -- mtpd (r1)+`
5147			`106506 -- mfpd sp`
5148			`106606 -- mtpd sp`
5149			`000003 -- bpt`
5150			`#-----`
5151			`wal 013070 -- code: (target for rtt,rti tests)`
5152			`bwm 2`
5153			`000240 -- noop`
5154			`000000 -- halt`
5155			`#-----`
5156			`C Exec code 44 (Implementation variations)`
5157			`C test 44.1: OPR R,(R)+ : incremented before {J11} or after {70} use as source`
5158			`#`
5159			`rst -- console reset`
5160			`wps 000000 -- clear psw`
5161			`wr4 001600 -- r4=1600`
5162			`wsp 001400 -- sp=1400`
5163			`wpc 013000 -- pc=13000`
5164			`step -- step (mov r4,(r4)+)`
5165			`rpc d=013002 -- ! pc=13002`
5166			`rr4 d=001602 -- ! r4=1602`
5167			`wal 001600 -- check target location`
5168			`rmi d=001600 -- ! ; initial content of R expected for 11/70`
5169			`#`
5170			`C test 44.2: OPR R,-(R) : decremented before {J11} or after {70} use as source`
5171			`#`
5172			`wr4 001600 -- r4=1600`
5173			`wsp 001400 -- sp=1400`
5174			`wpc 013002 -- pc=13002`
5175			`step -- step (mov r4,-(r4))`
5176			`rpc d=013004 -- ! pc=13004`
5177			`rr4 d=001576 -- ! r4=1576`
5178			`wal 001600 -- check target location`
5179			`rmi d=001600 -- ! ; initial content of R expected for 11/70`
5180			`#`
5181			`C test 44.3: OPR PC,A(R) : store PC+2 {70} or PC+4 {J11}`
5182			`#`
5183			`wr4 001600 -- r4=1600`
5184			`wsp 001400 -- sp=1400`
5185			`wpc 013004 -- pc=13004`
5186			`step -- step (mov pc,2(r4))`
5187			`rpc d=013010 -- ! pc=13010`
5188			`wal 001602 -- check target location`
5189			`rmi d=013006 -- ! ; PC+2 expected for 11/70`
5190			`#`
5191			`C test 44.4: JMP (R)+ : R used {70;J11} or R+2 used {05,10,15,20}`
5192			`#`
5193			`wr4 013074 -- r4=13074`
5194			`wsp 001400 -- sp=1400`
5195			`wpc 013010 -- pc=13010`
5196			`step -- step (jmp (r4)+)`
5197			`rpc d=013074 -- ! pc=13074 ; R expected for 11/70`
5198			`rr4 d=013076 -- ! r4=13076`
5199			`#`
5200			`C test 44.5: JMP R : traps to 10 {44,45,70;J11} or 4 {all others}`
5201			`C Note: J11 doc is wrong, 11/70 traps 10, not 4, as stated`
5202			`#`
5203			`wal 177766 -- clear CPUERR`
5204			`wm 000000 --`
5205			`wr4 000000 -- r4=0`
5206			`wsp 001400 -- sp=1400`
5207			`wpc 013012 -- pc=13012`
5208			`step -- step (jmp r4) [[s:2]]`
5209			`rpc d=000012 -- ! pc=12 ; trap 10 expected for 11/70 [[s:10]]`
5210			`rsp d=001374 -- ! sp=1374`
5211			`wal 177766 -- check CPUERR`
5212			`rm d=000000 -- ! CPUERR: no bit set`
5213			`wm 000000 -- clear CPUERR`
5214			`#`
5215			`C test 44.6: SWAB does not change V {15,20} or clears V {all others}`
5216			`#`
5217			`wr4 000300 -- r4=3000`
5218			`wsp 001400 -- sp=1400`
5219			`wpc 013014 -- pc=13014`
5220			`wps 000017 -- psw: set all cc flags in psw`
5221			`step -- step (swab r4)`
5222			`rpc d=013016 -- ! pc=13074`
5223			`rr4 d=140000 -- ! r4=140000`
5224			`rps d=000004 -- ! psw: Z=1 ; clear V expected for 11/70`
5225			`#`
5226			`C test 44.7: CPU access to 177700-177717 (regs) timesout {70,J11} or not {05,10}`
5227			`#`
5228			`wr4 177700 -- r4=177700`
5229			`wsp 001400 -- sp=1400`
5230			`wpc 013016 -- pc=13016`
5231			`step -- step (inc (r4)) [[s:2]]`
5232			`rpc d=000006 -- ! pc=6 ; trap 4 expected for 11/70 [[s:10]]`
5233			`rsp d=001374 -- ! sp=1374`
5234			`wal 177766 -- check CPUERR`
5235			`rm d=000020 -- ! CPUERR: (iobto=1)`
5236			`wm 000000 -- clear CPUERR`
5237			`#`
5238			`C test 44.10: If RTT sets T bit, trap occurs after instr. following RTT {70,J11}`
5239			`#`
5240			`wal 001374 -- setup stack with rtt return frame setting T flag`
5241			`bwm 2`
5242			`013070 -- start address (points to: noop, halt)`
5243			`000020 -- set T flag in PSW`
5244			`wsp 001374 -- sp=1374`
5245			`wpc 013020 -- pc=13020`
5246			`cont -- cont (rtt)`
5247			`wtgo`
5248			`rpc d=000020 -- ! pc=20 ; T-trap executed`
5249			`rsp d=001374 -- ! sp=1374`
5250			`wal 001374 -- check stack`
5251			`brm 2`
5252			`d=013072 -- trap address: address after noop expected for 11/70`
5253			`d=000020 -- PSW`
5254			`rst -- console reset (to clear T flag)`
5255			`#`
5256			`C test 44.11: If RTI sets T bit, T trap occurs immediately {70,J11}`
5257			`#`
5258			`wal 001374 -- setup stack with rtt return frame setting T flag`
5259			`bwm 2`
5260			`013070 -- start address (points to: noop, halt)`
5261			`000020 -- set T flag in PSW`
5262			`wsp 001374 -- sp=1374`
5263			`wpc 013024 -- pc=13024`
5264			`cont -- cont (rti)`
5265			`wtgo`
5266			`rpc d=000020 -- ! pc=20 ; T-trap executed`
5267			`rsp d=001374 -- ! sp=1374`
5268			`wal 001374 -- check stack`
5269			`brm 2`
5270			`d=013070 -- trap address: address of noop expected for 11/70`
5271			`d=000020 -- PSW`
5272			`rst -- console reset (to clear T flag)`
5273			`#`
5274			`C test 44.14: Direct access to PSW can {05..20} / cannot {others} set T bit`
5275			`#`
5276			`wr0 000030 -- r0=30 (set T bit, N also)`
5277			`wr1 177776 -- r1=177776 (PSW address)`
5278			`wsp 001400 -- sp=1400`
5279			`wpc 013030 -- pc=13030`
5280			`step -- step (mov r0,(r1))`
5281			`rpc d=013032 -- ! pc=13032`
5282			`rps d=000010 -- ! psw: T bit not set expected for 11/70`
5283			`#`
5284			`C test 44.15: odd address using SP causes HALT {<=20} or emmergency stack {>35}`
5285			`#`
5286			`wsp 001401 -- sp=1401`
5287			`wpc 013032 -- pc=13032`
5288			`step -- step (mov r0,-(sp)) [[s:2]]`
5289			`rpc d=000006 -- ! pc=6 ; trap 4 [[s:13034]]`
5290			`rsp d=000000 -- ! sp=0 ; emergency stack expected for 11/70 [[s:4]]`
5291			`wal 000000 -- check emergency stack`
5292			`brm 2`
5293			`d=013034 -- ! PC of abort [[s:0]]`
5294			`d=000000 -- ! PS of abort (currently gets lost...)`
5295			`rst -- console reset (to clear CPUERR reg)`
5296			`wal 000000 -- clean tainted memory`
5297			`bwm 2`
5298			`000000 --`
5299			`000000 --`
5300			`#`
5301			`# simh notes:`
5302			`# 1. apparently not consistently implemented in simh. SP is set to 4, but`
5303			`# interrupt/trap sequence isn't executed. Effectively, simh halt's.`
5304			`#`
5305			`# for the test 28/29/30x enable MMU and make address 100000 unavailable`
5306			`#`
5307			`wal 172310 -- kernel I space DR segment 4 (base 100000)`
5308			`wmi 077400 -- slf=127; ed=0(up); acf=0 (non resident)`
5309			`#`
5310			`C test 44.28: If PC->bad memory, PC incremented {others} / not inc'ed {35,40}`
5311			`#`
5312			`wal 177572 -- SSR0`
5313			`wmi 000001 -- set enable bit`
5314			`wr4 100000 -- r4=100000`
5315			`wsp 001400 -- sp=1400`
5316			`wpc 013034 -- pc=13034`
5317			`cont -- cont (jmp (r4))`
5318			`wtgo`
5319			`rpc d=000254 -- ! pc=254 ; trap 240 ; Note: halt is executed, was cont !`
5320			`rsp d=001374 -- ! sp=1374`
5321			`wal 001374 -- check stack`
5322			`brm 2`
5323			`d=100002 -- trap address: PC inc'ed expected for 11/70 [[s:100000]]`
5324			`d=000340 -- PSW`
5325			`rst -- console reset (to clear CPUERR reg)`
5326			`#`
5327			`# simh notes:`
5328			`# 1. simh reads instruction, later increments PC. Thus PC not inc'ed in simh.`
5329			`#`
5330			`C test 44.29/30a: If R->bad in mode 2, R inc'ed {others} / or not {4,34,44}`
5331			`C test for dstw chain (mov r0,(r1)+)`
5332			`#`
5333			`wal 177572 -- SSR0`
5334			`wmi 000001 -- set enable bit`
5335			`wr1 100000 -- r1=100000`
5336			`wsp 001400 -- sp=1400`
5337			`wpc 013036 -- pc=13036`
5338			`step -- step (mov r0,(r1)+) [[s:2]]`
5339			`rpc d=000252 -- ! pc=252 ; trap 250 [[s:254]]`
5340			`rsp d=001374 -- ! sp=1374`
5341			`rr1 d=100002 -- ! r1=100002`
5342			`wal 177572 -- check SSR0/1`
5343			`brm 2`
5344			`d=100011 -- ! SSR0: (abo_nonres=1,seg=4,ena=1) see note [[s:100211]]`
5345			`d=000021 -- ! SSR1: ra=1,2`
5346			`rst -- console reset (to clear CPUERR reg)`
5347			`#`
5348			`C test 44.29/30b: If R->bad in mode 2, R inc'ed {others} / or not {4,34,44}`
5349			`C test for srcr chain (mov (r1)+,r0)`
5350			`#`
5351			`wal 177572 -- SSR0`
5352			`wmi 000001 -- set enable bit`
5353			`wr1 100000 -- r1=100000`
5354			`wsp 001400 -- sp=1400`
5355			`wpc 013040 -- pc=13040`
5356			`step -- step ((mov (r1)+,r0) [[s:2]]`
5357			`rpc d=000252 -- ! pc=252 ; trap 250 [[s:254]]`
5358			`rsp d=001374 -- ! sp=1374`
5359			`rr1 d=100002 -- ! r1=100002`
5360			`wal 177572 -- check SSR0/1`
5361			`brm 2`
5362			`d=100011 -- ! SSR0: (abo_nonres=1,seg=4,ena=1) see note [[s:100211]]`
5363			`d=000021 -- ! SSR1: ra=1,2`
5364			`rst -- console reset (to clear CPUERR reg)`
5365			`#`
5366			`C test 44.29/30c: If R->bad in mode 2, R inc'ed {others} / or not {4,34,44}`
5367			`C test for dstr chain (inc (r1)+)`
5368			`#`
5369			`wal 177572 -- SSR0`
5370			`wmi 000001 -- set enable bit`
5371			`wr1 100000 -- r1=100000`
5372			`wsp 001400 -- sp=1400`
5373			`wpc 013042 -- pc=13042`
5374			`step -- step (inc (r1)+) [[s:2]]`
5375			`rpc d=000252 -- ! pc=252 ; trap 250 [[s:254]]`
5376			`rsp d=001374 -- ! sp=1374`
5377			`rr1 d=100002 -- ! r1=100002`
5378			`wal 177572 -- check SSR0/1`
5379			`brm 2`
5380			`d=100011 -- ! SSR0: (abo_nonres=1,seg=4,ena=1) see note [[s:100211]]`
5381			`d=000021 -- ! SSR1: ra=1,2`
5382			`rst -- console reset (to clear CPUERR reg)`
5383			`C test 44.29/30d: If R->bad in mode 2, R inc'ed {others} / or not {4,34,44}`
5384			`C test for dsta chain (mtpd (r1)+)`
5385			`#`
5386			`wal 177572 -- SSR0`
5387			`wmi 000001 -- set enable bit`
5388			`wr1 100000 -- r1=100000`
5389			`wsp 001376 -- sp=1376`
5390			`wpc 013044 -- pc=13044`
5391			`wal 001376 -- push a word on stack for mtpd`
5392			`wmi 123456 --`
5393			`step -- step (mtpd (r1)+) [[s:2]]`
5394			`rpc d=000252 -- ! pc=252 ; trap 250 [[s:254]]`
5395			`rsp d=001374 -- ! sp=1374`
5396			`rr1 d=100002 -- ! r1=100002`
5397			`wal 177572 -- check SSR0/1`
5398			`brm 2`
5399			`d=100011 -- ! SSR0: (abo_nonres=1,seg=4,ena=1) see note [[s:100211]]`
5400			`d=010426 -- ! SSR1: rb=1,2; ra=6,2`
5401			`rst -- console reset (to clear CPUERR reg)`
5402			`#`
5403			`# simh notes:`
5404			`# 1. simh first pops, than writes to destination, reversing ra,rb in SSR1`
5405			`#`
5406			`# now reset MMU to default`
5407			`#`
5408			`wal 172310 -- kernel I space DR segment 4 (base 100000)`
5409			`wmi 077406 -- slf=127; ed=0(up); acf=6 (r/w)`
5410			`#`
5411			`C test 44.39: cmode=10 will cause abort {70,J11}, treated as kmode {23,24}`
5412			`#`
5413			`wal 177572 -- SSR0`
5414			`wmi 000001 -- set enable bit`
5415			`wr1 001400 -- r1=1400`
5416			`wsp 001400 -- sp=1400`
5417			`wps 100000 -- psw: set cm=10, pm=00`
5418			`wpc 013042 -- pc=13042`
5419			`step -- step (inc (r1)+) [[s:2]]`
5420			`rpc d=000252 -- ! pc=252 ; trap 250; as expected for 11/70 [[s:254]]`
5421			`rsp d=001374 -- ! sp=1374`
5422			`rr1 d=001400 -- ! r1=1400`
5423			`wal 177572 -- check SSR0/1`
5424			`brm 3`
5425			`d=140101 -- ! SSR0: (abo_nr=1,abo_l=1,m=10,seg=0,ena=1) [[s:140301]]`
5426			`d=000000 -- ! SSR1: ra=none`
5427			`d=013042 -- ! SSR2: PC of failed instruction`
5428			`wal 001374 -- check stack`
5429			`brm 2`
5430			`d=013044 -- ! PC after failed instruction [[s:013042]]`
5431			`d=100000 -- ! PS`
5432			`rst -- console reset (to clear CPUERR reg, PSW)`
5433			`#`
5434			`# simh notes:`
5435			`# 1. simh saves PC of failed instruction on stack, not PC after instruction`
5436			`#`
5437			`C test 44.43: user mode HALT: trap 4 {70} or 10 {others}`
5438			`#`
5439			`wal 177766 -- check CPUERR ;??? remove if console reset fixed`
5440			`wm 000000 -- clear`
5441			`wsp 001400 -- sp=1400`
5442			`wps 170000 -- psw: set cm=11, pm=11`
5443			`wpc 013022 -- pc=13022`
5444			`step -- step (halt in user mode) [[s:2]]`
5445			`rpc d=000006 -- ! pc=6 ; trap 4; as expected for 11/70 [[s:10]]`
5446			`rsp d=001374 -- ! sp=1374`
5447			`wal 001374 -- check stack`
5448			`brm 2`
5449			`d=013024 -- ! PC after failed instruction`
5450			`d=170000 -- ! PS`
5451			`wal 177766 -- check CPUERR`
5452			`rm d=000200 -- ! CPUERR: (illhalt=1)`
5453			`rst -- console reset (to clear CPUERR reg, PSW)`
5454			`#`
5455			`C test 44.44: PDR bit<0> implemented {70} or not {others}`
5456			`#`
5457			`wal 172310 -- kernel I space DR, segment 4`
5458			`wm 077401 -- set acf bit 0: slf=127; ed=0(up); acf=1 (r+trap)`
5459			`rm d=077401 -- ! check; works as expected for 11/70`
5460			`wm 077406 -- restore: slf=127; ed=0(up); acf=6(w/r)`
5461			`#`
5462			`C test 44.45: PDR bit<7>(AIB any access) implemented {70} or not {others}`
5463			`#`
5464			`wal 172300 -- kernel I space DR, reset segment 0 and 1`
5465			`bwm 2`
5466			`077404 -- slf=127; ed=0(up); acf=4(w/r and trap)`
5467			`077404 -- slf=127; ed=0(up); acf=4(w/r and trap)`
5468			`wal 172300 -- check kernel I space DR, segment 0 and 1`
5469			`brm 2`
5470			`d=077404 -- !`
5471			`d=077404 -- !`
5472			`wal 177572 -- SSR0`
5473			`wmi 000001 -- set enable bit`
5474			`wr0 123456 -- r0=123456`
5475			`wr1 030000 -- r1=30000`
5476			`wsp 001400 -- sp=1400`
5477			`wpc 013030 -- pc=13030`
5478			`step -- step (mov r0,(r1))`
5479			`rpc d=013032 -- ! pc=next`
5480			`rsp d=001400 -- ! sp=1400`
5481			`wal 030000 -- check target memory, untaint`
5482			`rm d=123456 -- !`
5483			`wm 000000 --`
5484			`wal 172300 -- check kernel I space DR, segment 0 and 1`
5485			`brm 2`
5486			`d=077604 -- ! slf=127; ed=0(up); acf=4(w/r+trap); aib=10 (A=1,W=0)`
5487			`d=077704 -- ! slf=127; ed=0(up); acf=4(w/r+trap); aib=11 (A=1,W=1)`
5488			`wal 172300 -- kernel I space DR, reset segment 0 and 1`
5489			`bwm 2`
5490			`077406 -- slf=127; ed=0(up); acf=6(w/r)`
5491			`077406 -- slf=127; ed=0(up); acf=6(w/r)`
5492			`rst -- console reset (to clear CPUERR reg)`
5493			`#`
5494			`C test 44.46: Full PAR implemented {44,70,J11} or not {others}`
5495			`#`
5496			`wal 172350 -- kernel I space AR, segment 4`
5497			`wm 177777 -- set all bits`
5498			`rm d=177777 -- ! check; works as expected for 11/70`
5499			`wm 001000 -- restore: 1000 100000 base`
5500			`#`
5501			`C test 44.47: MMR0<9>(mmu trap) implemented {70} or not {others}`
5502			`#`
5503			`wal 177572 -- SSR0`
5504			`wm 001000 -- set trap enable`
5505			`rm d=001000 -- ! check; works as expected for 11/70`
5506			`wm 000000 -- restore`
5507			`#`
5508			`C test 44.48: MMR3<2:0>(D space) implemented {44,70,J11} or not {others}`
5509			`#`
5510			`wal 172516 -- SSR3`
5511			`wm 000007 -- set D space bis`
5512			`rm d=000007 -- ! check; works as expected for 11/70`
5513			`wm 000000 -- restore`
5514			`#`
5515			`C test 44.49: MMR3<5:4>(UMAP, 22 bit) implemented {44,70,J11} or not {others}`
5516			`#`
5517			`wal 172516 -- SSR3`
5518			`wm 000060 -- set D space bits`
5519			`rm d=000060 -- ! check; available, as expected for 11/70`
5520			`wm 000000 -- restore`
5521			`#`
5522			`C test 44.50: MMR3<3>(CSM enable) implemented {44,J11} or not {others}`
5523			`#`
5524			`wal 172516 -- SSR3`
5525			`wm 000010 -- set D space bit`
5526			`rm d=000000 -- ! check; not available, as expected for 11/70`
5527			`wm 000000 -- restore`
5528			`#`
5529			`C test 44.51: MMR2 tracks fetches {70} or instructions only {others}`
5530			`C here W11 behaves like {others}, fetches are not tracked in SSR2`
5531			`C Also: instruction complete flag set in SSR0 after bpt.`
5532			`#`
5533			`wal 177572 -- SSR0`
5534			`wmi 000001 -- set enable bit`
5535			`wsp 001400 -- sp=1400`
5536			`wpc 013052 -- pc=13052`
5537			`step -- step (bpt)`
5538			`rpc d=000016 -- ! pc=16; trap 14 see note [[s:13054]]`
5539			`wal 177572 -- check SSR0/1/2`
5540			`brm 3`
5541			`d=000001 -- ! SSR0: (ena=1)`
5542			`d=000000 -- ! SSR1: ra=none`
5543			`d=013052 -- ! SSR2: PC of bpt`
5544			`step -- step (halt)`
5545			`rpc d=000020 -- ! pc=20 (after halt)`
5546			`wal 177572 -- check SSR0/1/2`
5547			`brm 3`
5548			`d=000001 -- ! SSR0: (ena=1)`
5549			`d=000000 -- ! SSR1: ra=none`
5550			`d=000016 -- ! SSR2: PC of halt`
5551			`rst -- console reset (to clear CPUERR reg, PSW)`
5552			`#`
5553			`# simh notes:`
5554			`# 1. when simh steps over a BPT,IOT,..., the PC is pointing after the`
5555			`# instruction. The trap sequence together with first instruction is`
5556			`# executed in next step.`
5557			`#`
5558			`C test 44.52: MT/FPx SP for pmode=10 unpredictable {others} / user SP {J11}`
5559			`# write registers`
5560			`#`
5561			`wr0 000001 -- set r0,..,r7`
5562			`wr1 000101 --`
5563			`wr2 000201 --`
5564			`wr3 000301 --`
5565			`wr4 000401 --`
5566			`wr5 000501 --`
5567			`wsp 001400 --`
5568			`wpc 000701 --`
5569			`# write register set 1, sm,um stack`
5570			`#`
5571			`wps 004000 -- psw: cm=kernel, set=1`
5572			`wr0 010001 -- set r0,..,r5 [[r10]]`
5573			`wr1 010101 -- [[r11]]`
5574			`wr2 010201 -- [[r12]]`
5575			`wr3 010301 -- [[r13]]`
5576			`wr4 010401 -- [[r14]]`
5577			`wr5 010501 -- [[r15]]`
5578			`wps 044000 -- psw: cm=super(01),set=1`
5579			`wsp 010601 -- set ssp [[ssp]]`
5580			`wps 144000 -- psw: cm=user(11),set=1`
5581			`wsp 110601 -- set usp [[usp]]`
5582			`#`
5583			`C 52a: MFPS for pmode=10`
5584			`#`
5585			`wps 020000 -- psw: set cm=00, pm=10`
5586			`wpc 013046 -- pc=13046`
5587			`step -- step (mfpd sp)`
5588			`rpc d=013050 -- ! pc=next`
5589			`rsp d=001376 -- ! sp=1376`
5590			`wal 001376 -- check stack`
5591			`rmi d=013046 -- ! it returns PC like 11/70 unpredictable [[s:0]]`
5592			`rst -- console reset (to clear CPUERR reg)`
5593			`#`
5594			`# simh note:`
5595			`# 1. simh returns 0 here, just unpredictable in a different way ...`
5596			`#`
5597			`C 52a: MTPS for pmode=10`
5598			`#`
5599			`wal 001376 -- setup stack with value for mtpd`
5600			`wmi 123446 --`
5601			`wps 020000 -- psw: set cm=00, pm=10`
5602			`wpc 013050 -- pc=13050`
5603			`step -- step (mtpd sp)`
5604			`rpc d=013052 -- ! pc=next`
5605			`rsp d=001400 -- ! sp=1400`
5606			`# check registers`
5607			`#`
5608			`rr0 d=000001 -- ! r0,..,r7`
5609			`rr1 d=000101 -- !`
5610			`rr2 d=000201 -- !`
5611			`rr3 d=000301 -- !`
5612			`rr4 d=000401 -- !`
5613			`rr5 d=000501 -- !`
5614			`# check register set 1, sm,um stack`
5615			`#`
5616			`wps 004000 -- psw: cm=kernel, set=1`
5617			`rr0 d=010001 -- ! r0,..,r5 [[r10]]`
5618			`rr1 d=010101 -- ! [[r11]]`
5619			`rr2 d=010201 -- ! [[r12]]`
5620			`rr3 d=010301 -- ! [[r13]]`
5621			`rr4 d=010401 -- ! [[r14]]`
5622			`rr5 d=010501 -- ! [[r15]]`
5623			`wps 044000 -- psw: cm=super(01),set=1`
5624			`rsp d=010601 -- ! ssp [[ssp]]`
5625			`wps 144000 -- psw: cm=user(11),set=1`
5626			`rsp d=110601 -- ! usp [[usp]]`
5627			`# --> all preset values intact; -> mtpd thus noop --> like 11/70 unpredictable`
5628			`#`
5629			`rst -- console reset (to clear CPUERR reg)`
5630			`#`
5631			`# simh notes on MMR0:`
5632			`# 1. simh doesn't freeze MMR0 bit 7, the instr.compl. bit is set again after`
5633			`# executing first instruction of trap handler.`
5634			`#`
5635			`#-----------------------------------------------------------------------------`
5636			`C Setup code 45 [base 13100] (mmr1 and instructions with implicit stack push/pop`
5637			`#`
5638			`wal 013100 -- code: (to be single stepped mostly)`
5639			`bwm 5`
5640			`106621 -- mtpd (r1)+`
5641			`106521 -- mfpd (r1)+`
5642			`004721 -- jsr pc,(r1)+`
5643			`000000 -- halt`
5644			`#13110`
5645			`000207 -- rts pc`
5646			`#-----`
5647			`C Exec code 45 (mmr1 and instructions with implicit stack push/pop)`
5648			`C test 45.1: mtpd (r1)+`
5649			`#`
5650			`wal 177572 -- SSR0`
5651			`wmi 000001 -- set enable bit`
5652			`wal 001376 -- setup stack with value for mtpd`
5653			`wmi 123456 --`
5654			`wr1 030000 -- r1=30000`
5655			`wsp 001376 -- sp=1376`
5656			`wpc 013100 -- pc=13100`
5657			`step -- step (mtpd (r1)+)`
5658			`rpc d=013102 -- ! pc=next`
5659			`rsp d=001400 -- ! sp=1400`
5660			`rr1 d=030002 -- ! r1=30002`
5661			`wal 177572 -- check SSR0/1/2`
5662			`brm 3`
5663			`d=000003 -- ! SSR0: (seg=1,ena=1)`
5664			`d=010426 -- ! SSR1: rb=1,2; ra=6,2`
5665			`d=013100 -- ! SSR2: PC of mtpd`
5666			`wal 030000 -- check target memory`
5667			`rm d=123456 -- !`
5668			`rst -- console reset`
5669			`#`
5670			`C test 45.2: mfpd (r1)+`
5671			`#`
5672			`wal 177572 -- SSR0`
5673			`wmi 000001 -- set enable bit`
5674			`wr1 030000 -- r1=30000`
5675			`wsp 001400 -- sp=1400`
5676			`wpc 013102 -- pc=13102`
5677			`step -- step (mfpd (r1)+)`
5678			`rpc d=013104 -- ! pc=next`
5679			`rsp d=001376 -- ! sp=1376`
5680			`rr1 d=030002 -- ! r1=30002`
5681			`wal 177572 -- check SSR0/1/2`
5682			`brm 3`
5683			`d=000001 -- ! SSR0: (seg=0,ena=1)`
5684			`d=173021 -- ! SSR1: rb=6,-2; ra=1,2`
5685			`d=013102 -- ! SSR2: PC of mtpd`
5686			`wal 001376 -- check stack`
5687			`rmi d=123456 -- !`
5688			`wal 030000 -- clear tainted target memory`
5689			`wm 000000 --`
5690			`rst -- console reset`
5691			`#`
5692			`C test 45.3: jsr pc,(r1)+ and rts pc`
5693			`#`
5694			`wal 177572 -- SSR0`
5695			`wmi 000001 -- set enable bit`
5696			`wr1 013110 -- r1=13110`
5697			`wsp 001400 -- sp=1400`
5698			`wpc 013104 -- pc=13104`
5699			`step -- step (jsr pc,(r1)+)`
5700			`rpc d=013110 -- ! pc=target`
5701			`rsp d=001376 -- ! sp=1376`
5702			`rr1 d=013112 -- ! r1=13112`
5703			`wal 177572 -- check SSR0/1/2`
5704			`brm 3`
5705			`d=000001 -- ! SSR0: (seg=0,ena=1)`
5706			`d=173021 -- ! SSR1: rb=6,-2; ra=1,2`
5707			`d=013104 -- ! SSR2: PC of jsr`
5708			`wal 001376 -- check stack`
5709			`rmi d=013106 -- ! PC after jsr`
5710			`step -- step (rts pc)`
5711			`rpc d=013106 -- ! pc=target`
5712			`rsp d=001400 -- ! sp=1400`
5713			`wal 177572 -- check SSR0/1/2`
5714			`brm 3`
5715			`d=000001 -- ! SSR0: (seg=0,ena=1)`
5716			`d=000026 -- ! SSR1: ra=6,2 [[s:0]]`
5717			`d=013110 -- ! SSR2: PC of rts`
5718			`rst -- console reset`
5719			`#`
5720			`# simh notes:`
5721			`# 1. simh reads stack and incremets sp later. In case of an MMU abort on`
5722			`# stack read, simh SSR1 will be 0, while W11 shows the sp increment`
5723			`#`
5724			`#-----------------------------------------------------------------------------`
5725			`C Setup code 46 [base 13200] (systematic result+cc test of 1+2op instructions)`
5726			`# the following codes expect:`
5727			`# r0-> psw`
5728			`# r1-> loop count`
5729			`# r2-> input ptr`
5730			`# r3-> output ptr`
5731			`# r4-> src reg`
5732			`# r5-> dst reg`
5733			`#`
5734			`wal 013200 -- code 1: test 1op register`
5735			`bwm 8`
5736			`000230 -- spl 0`
5737			`012205 -- L1: mov (r2)+,r5 ; load dst`
5738			`000000 -- halt ; ccmov set cc's`
5739			`000000 -- halt ; iut instr. under test`
5740			`011023 -- mov (r0),(r3)+ ; save psw`
5741			`010523 -- mov r5,(r3)+ ; save dst`
5742			`077106 -- sob r1,L1 (.-6)`
5743			`000000 -- halt`
5744			`#----`
5745			`wal 013220 -- code 2: test 1op memory`
5746			`bwm 8`
5747			`000230 -- spl 0`
5748			`012215 -- L1: mov (r2)+,(r5) ; load dst`
5749			`000000 -- halt ; ccmov set cc's`
5750			`000000 -- halt ; iut instr. under test`
5751			`011023 -- mov (r0),(r3)+ ; save psw`
5752			`011523 -- mov (r5),(r3)+ ; save dst`
5753			`077106 -- sob r1,L1 (.-6)`
5754			`000000 -- halt`
5755			`#-----`
5756			`wal 013240 -- code 3: test 2op register`
5757			`bwm 9`
5758			`000230 -- spl 0`
5759			`012204 -- L1: mov (r2)+,r4 ; load src`
5760			`012205 -- mov (r2)+,r5 ; load dst`
5761			`000000 -- halt ; ccmov set cc's`
5762			`000000 -- halt ; iut instr. under test`
5763			`011023 -- mov (r0),(r3)+ ; save psw`
5764			`010523 -- mov r5,(r3)+ ; save dst`
5765			`077107 -- sob r1,L1 (.-7)`
5766			`#13260`
5767			`000000 -- halt`
5768			`#-----`
5769			`wal 013270 -- code 4: test 2op memory`
5770			`bwm 9`
5771			`000230 -- spl 0`
5772			`012214 -- L1: mov (r2)+,(r4) ; load src`
5773			`012215 -- mov (r2)+,(r5) ; load dst`
5774			`000000 -- halt ; ccmov set cc's`
5775			`#13300`
5776			`000000 -- halt ; iut instr. under test`
5777			`011023 -- mov (r0),(r3)+ ; save psw`
5778			`011523 -- mov (r5),(r3)+ ; save dst`
5779			`077107 -- sob r1,L1 (.-7)`
5780			`000000 -- halt`
5781			`#----`
5782			`C Exec code 46 pass 1 (systematic result+cc test of 1+2op instructions; word)`
5783			`C Exec test 46.1wr: COM - reg`
5784			`#`
5785			`wal 036000 -- setup test vector: for com,inc,dec,neg,adc,sbc,tst`
5786			`bwm 5`
5787			`000000 -- com 000000`
5788			`000001 -- com 000001`
5789			`077777 -- com 077777`
5790			`100000 -- com 100000`
5791			`177777 -- com 177777`
5792			`wal 013204 -- setup test instructions:`
5793			`bwm 2`
5794			`000241 -- ccmov= clc`
5795			`005105 -- iut= com r5`
5796			`wr0 177776 -- r0=177776`
5797			`wr1 000005 -- r1=5`
5798			`wr2 036000 -- r2=36000`
5799			`wr3 037000 -- r3=37000`
5800			`wr4 000000 -- r4=0`
5801			`wr5 000000 -- r5=0`
5802			`wsp 001400 -- sp=1400`
5803			`stapc 013200 -- start @ 13200 (1op reg)`
5804			`wtgo`
5805			`rpc d=013220 -- ! pc=halt`
5806			`rr1 d=000000 -- ! r1=0`
5807			`wal 037000 -- check result area`
5808			`brm 10`
5809			`d=000011 -- ! com 000000 -> n1z0v0c1; 177777`
5810			`d=177777 -- !`
5811			`d=000011 -- ! com 000001 -> n1z0v0c1; 177776`
5812			`d=177776 -- !`
5813			`d=000011 -- ! com 077777 -> n1z0v0c1; 100000`
5814			`d=100000 -- !`
5815			`d=000001 -- ! com 100000 -> n0z0v0c1; 077777`
5816			`d=077777 -- !`
5817			`d=000005 -- ! com 177777 -> n0z1v0c1; 000000`
5818			`d=000000 -- !`
5819			`#--------`
5820			`C Exec test 46.1wm: COM - mem`
5821			`#`
5822			`wal 013224 -- setup test instructions:`
5823			`bwm 2`
5824			`000241 -- ccmov= clc`
5825			`005115 -- iut= com (r5)`
5826			`wr0 177776 -- r0=177776`
5827			`wr1 000005 -- r1=5`
5828			`wr2 036000 -- r2=36000`
5829			`wr3 037000 -- r3=37000`
5830			`wr4 001400 -- r4=1400`
5831			`wr5 001402 -- r5=1402`
5832			`wsp 001400 -- sp=1400`
5833			`stapc 013220 -- start @ 13220 (1op mem)`
5834			`wtgo`
5835			`rpc d=013240 -- ! pc=halt`
5836			`rr1 d=000000 -- ! r1=0`
5837			`wal 037000 -- check result area`
5838			`brm 10`
5839			`d=000011 -- ! com 000000 -> n1z0v0c1; 177777`
5840			`d=177777 -- !`
5841			`d=000011 -- ! com 000001 -> n1z0v0c1; 177776`
5842			`d=177776 -- !`
5843			`d=000011 -- ! com 077777 -> n1z0v0c1; 100000`
5844			`d=100000 -- !`
5845			`d=000001 -- ! com 100000 -> n0z0v0c1; 077777`
5846			`d=077777 -- !`
5847			`d=000005 -- ! com 177777 -> n0z1v0c1; 000000`
5848			`d=000000 -- !`
5849			`#--------`
5850			`C Exec test 46.2wrc0: INC - reg,C=0`
5851			`#`
5852			`wal 013204 -- setup test instructions:`
5853			`bwm 2`
5854			`000241 -- ccmov= clc`
5855			`005205 -- iut= inc r5`
5856			`wr0 177776 -- r0=177776`
5857			`wr1 000005 -- r1=5`
5858			`wr2 036000 -- r2=36000`
5859			`wr3 037000 -- r3=37000`
5860			`wr4 000000 -- r4=0`
5861			`wr5 000000 -- r5=0`
5862			`wsp 001400 -- sp=1400`
5863			`stapc 013200 -- start @ 13200 (1op reg)`
5864			`wtgo`
5865			`rpc d=013220 -- ! pc=halt`
5866			`rr1 d=000000 -- ! r1=0`
5867			`wal 037000 -- check result area`
5868			`brm 10`
5869			`d=000000 -- ! inc 000000 -> n0z0v0c0; 000001`
5870			`d=000001 -- !`
5871			`d=000000 -- ! inc 000001 -> n0z0v0c0; 000002`
5872			`d=000002 -- !`
5873			`d=000012 -- ! inc 077777 -> n1z0v1c0; 100000`
5874			`d=100000 -- !`
5875			`d=000010 -- ! inc 100000 -> n1z0v0c0; 100001`
5876			`d=100001 -- !`
5877			`d=000004 -- ! inc 177777 -> n0z1v0c0; 000000`
5878			`d=000000 -- !`
5879			`#--------`
5880			`C Exec test 46.2wrc1: INC - reg,C=1`
5881			`#`
5882			`wal 013204 -- setup test instructions:`
5883			`bwm 2`
5884			`000261 -- ccmov= sec`
5885			`005205 -- iut= inc r5`
5886			`wr0 177776 -- r0=177776`
5887			`wr1 000005 -- r1=5`
5888			`wr2 036000 -- r2=36000`
5889			`wr3 037000 -- r3=37000`
5890			`wr4 000000 -- r4=0`
5891			`wr5 000000 -- r5=0`
5892			`wsp 001400 -- sp=1400`
5893			`stapc 013200 -- start @ 13200 (1op reg)`
5894			`wtgo`
5895			`rpc d=013220 -- ! pc=halt`
5896			`rr1 d=000000 -- ! r1=0`
5897			`wal 037000 -- check result area`
5898			`brm 10`
5899			`d=000001 -- ! inc 000000 -> n0z0v0c1; 000001`
5900			`d=000001 -- !`
5901			`d=000001 -- ! inc 000001 -> n0z0v0c1; 000002`
5902			`d=000002 -- !`
5903			`d=000013 -- ! inc 077777 -> n1z0v1c1; 100000`
5904			`d=100000 -- !`
5905			`d=000011 -- ! inc 100000 -> n1z0v0c1; 100001`
5906			`d=100001 -- !`
5907			`d=000005 -- ! inc 177777 -> n0z1v0c1; 000000`
5908			`d=000000 -- !`
5909			`#--------`
5910			`C Exec test 46.3wrc0: DEC - reg,C=0`
5911			`#`
5912			`wal 013204 -- setup test instructions:`
5913			`bwm 2`
5914			`000241 -- ccmov= clc`
5915			`005305 -- iut= dec r5`
5916			`wr0 177776 -- r0=177776`
5917			`wr1 000005 -- r1=5`
5918			`wr2 036000 -- r2=36000`
5919			`wr3 037000 -- r3=37000`
5920			`wr4 000000 -- r4=0`
5921			`wr5 000000 -- r5=0`
5922			`wsp 001400 -- sp=1400`
5923			`stapc 013200 -- start @ 13200 (1op reg)`
5924			`wtgo`
5925			`rpc d=013220 -- ! pc=halt`
5926			`rr1 d=000000 -- ! r1=0`
5927			`wal 037000 -- check result area`
5928			`brm 10`
5929			`d=000010 -- ! dec 000000 -> n1z0v0c0; 177777`
5930			`d=177777 -- !`
5931			`d=000004 -- ! dec 000001 -> n0z1v0c0; 000000`
5932			`d=000000 -- !`
5933			`d=000000 -- ! dec 077777 -> n0z0v0c0; 077776`
5934			`d=077776 -- !`
5935			`d=000002 -- ! dec 100000 -> n0z0v1c0; 077777`
5936			`d=077777 -- !`
5937			`d=000010 -- ! dec 177777 -> n1z0v0c0; 177776`
5938			`d=177776 -- !`
5939			`#--------`
5940			`C Exec test 46.3wrc1: DEC - reg,C=1`
5941			`#`
5942			`wal 013204 -- setup test instructions:`
5943			`bwm 2`
5944			`000261 -- ccmov= sec`
5945			`005305 -- iut= dec r5`
5946			`wr0 177776 -- r0=177776`
5947			`wr1 000005 -- r1=5`
5948			`wr2 036000 -- r2=36000`
5949			`wr3 037000 -- r3=37000`
5950			`wr4 000000 -- r4=0`
5951			`wr5 000000 -- r5=0`
5952			`wsp 001400 -- sp=1400`
5953			`stapc 013200 -- start @ 13200 (1op reg)`
5954			`wtgo`
5955			`rpc d=013220 -- ! pc=halt`
5956			`rr1 d=000000 -- ! r1=0`
5957			`wal 037000 -- check result area`
5958			`brm 10`
5959			`d=000011 -- ! dec 000000 -> n1z0v0c1; 177777`
5960			`d=177777 -- !`
5961			`d=000005 -- ! dec 000001 -> n0z1v0c1; 000000`
5962			`d=000000 -- !`
5963			`d=000001 -- ! dec 077777 -> n0z0v0c1; 077776`
5964			`d=077776 -- !`
5965			`d=000003 -- ! dec 100000 -> n0z0v1c1; 077777`
5966			`d=077777 -- !`
5967			`d=000011 -- ! dec 177777 -> n1z0v0c1; 177776`
5968			`d=177776 -- !`
5969			`#--------`
5970			`C Exec test 46.4wr: NEG - reg`
5971			`#`
5972			`wal 013204 -- setup test instructions:`
5973			`bwm 2`
5974			`000241 -- ccmov= clc`
5975			`005405 -- iut= neg r5`
5976			`wr0 177776 -- r0=177776`
5977			`wr1 000005 -- r1=5`
5978			`wr2 036000 -- r2=36000`
5979			`wr3 037000 -- r3=37000`
5980			`wr4 000000 -- r4=0`
5981			`wr5 000000 -- r5=0`
5982			`wsp 001400 -- sp=1400`
5983			`stapc 013200 -- start @ 13200 (1op reg)`
5984			`wtgo`
5985			`rpc d=013220 -- ! pc=halt`
5986			`rr1 d=000000 -- ! r1=0`
5987			`wal 037000 -- check result area`
5988			`brm 10`
5989			`d=000004 -- ! neg 000000 -> n0z1v0c0; 000000`
5990			`d=000000 -- !`
5991			`d=000011 -- ! neg 000001 -> n1z0v0c1; 177777`
5992			`d=177777 -- !`
5993			`d=000011 -- ! neg 077777 -> n1z0v0c1; 100001`
5994			`d=100001 -- !`
5995			`d=000013 -- ! neg 100000 -> n1z0v1c1; 100000`
5996			`d=100000 -- !`
5997			`d=000001 -- ! neg 177777 -> n0z0v0c1; 000001`
5998			`d=000001 -- !`
5999			`#--------`
6000			`C Exec test 46.5wrc0: ADC - reg,C=0`
6001			`#`
6002			`wal 013204 -- setup test instructions:`
6003			`bwm 2`
6004			`000241 -- ccmov= clc`
6005			`005505 -- iut= adc r5`
6006			`wr0 177776 -- r0=177776`
6007			`wr1 000005 -- r1=5`
6008			`wr2 036000 -- r2=36000`
6009			`wr3 037000 -- r3=37000`
6010			`wr4 000000 -- r4=0`
6011			`wr5 000000 -- r5=0`
6012			`wsp 001400 -- sp=1400`
6013			`stapc 013200 -- start @ 13200 (1op reg)`
6014			`wtgo`
6015			`rpc d=013220 -- ! pc=halt`
6016			`rr1 d=000000 -- ! r1=0`
6017			`wal 037000 -- check result area`
6018			`brm 10`
6019			`d=000004 -- ! adc 000000 -> n0z1v0c0; 000000`
6020			`d=000000 -- !`
6021			`d=000000 -- ! adc 000001 -> n0z0v0c0; 000001`
6022			`d=000001 -- !`
6023			`d=000000 -- ! adc 077777 -> n0z0v0c0; 077777`
6024			`d=077777 -- !`
6025			`d=000010 -- ! adc 100000 -> n1z0v0c0; 100000`
6026			`d=100000 -- !`
6027			`d=000010 -- ! adc 177777 -> n1z0v0c0; 177777`
6028			`d=177777 -- !`
6029			`#--------`
6030			`C Exec test 46.5wrc1: ADC - reg,C=1`
6031			`#`
6032			`wal 013204 -- setup test instructions:`
6033			`bwm 2`
6034			`000261 -- ccmov= sec`
6035			`005505 -- iut= adc r5`
6036			`wr0 177776 -- r0=177776`
6037			`wr1 000005 -- r1=5`
6038			`wr2 036000 -- r2=36000`
6039			`wr3 037000 -- r3=37000`
6040			`wr4 000000 -- r4=0`
6041			`wr5 000000 -- r5=0`
6042			`wsp 001400 -- sp=1400`
6043			`stapc 013200 -- start @ 13200 (1op reg)`
6044			`wtgo`
6045			`rpc d=013220 -- ! pc=halt`
6046			`rr1 d=000000 -- ! r1=0`
6047			`wal 037000 -- check result area`
6048			`brm 10`
6049			`d=000000 -- ! adc 000000 -> n0z0v0c0; 000001`
6050			`d=000001 -- !`
6051			`d=000000 -- ! adc 000001 -> n0z0v0c0; 000002`
6052			`d=000002 -- !`
6053			`d=000012 -- ! adc 077777 -> n1z0v1c0; 100000`
6054			`d=100000 -- !`
6055			`d=000010 -- ! adc 100000 -> n1z0v0c0; 100001`
6056			`d=100001 -- !`
6057			`d=000005 -- ! adc 177777 -> n0z1v0c1; 000000`
6058			`d=000000 -- !`
6059			`#--------`
6060			`C Exec test 46.6wrc0: SBC - reg,C=0`
6061			`#`
6062			`wal 013204 -- setup test instructions:`
6063			`bwm 2`
6064			`000241 -- ccmov= clc`
6065			`005605 -- iut= sbc r5`
6066			`wr0 177776 -- r0=177776`
6067			`wr1 000005 -- r1=5`
6068			`wr2 036000 -- r2=36000`
6069			`wr3 037000 -- r3=37000`
6070			`wr4 000000 -- r4=0`
6071			`wr5 000000 -- r5=0`
6072			`wsp 001400 -- sp=1400`
6073			`stapc 013200 -- start @ 13200 (1op reg)`
6074			`wtgo`
6075			`rpc d=013220 -- ! pc=halt`
6076			`rr1 d=000000 -- ! r1=0`
6077			`wal 037000 -- check result area`
6078			`brm 10`
6079			`d=000004 -- ! sbc 000000 -> n0z1v0c0; 000000`
6080			`d=000000 -- !`
6081			`d=000000 -- ! sbc 000001 -> n0z0v0c0; 000001`
6082			`d=000001 -- !`
6083			`d=000000 -- ! sbc 077777 -> n0z0v0c0; 077777`
6084			`d=077777 -- !`
6085			`d=000010 -- ! sbc 100000 -> n1z0v0c0; 100000`
6086			`d=100000 -- !`
6087			`d=000010 -- ! sbc 177777 -> n1z0v0c0; 177777`
6088			`d=177777 -- !`
6089			`#--------`
6090			`C Exec test 46.6wrc1: SBC - reg,C=1`
6091			`#`
6092			`wal 013204 -- setup test instructions:`
6093			`bwm 2`
6094			`000261 -- ccmov= sec`
6095			`005605 -- iut= sbc r5`
6096			`wr0 177776 -- r0=177776`
6097			`wr1 000005 -- r1=5`
6098			`wr2 036000 -- r2=36000`
6099			`wr3 037000 -- r3=37000`
6100			`wr4 000000 -- r4=0`
6101			`wr5 000000 -- r5=0`
6102			`wsp 001400 -- sp=1400`
6103			`stapc 013200 -- start @ 13200 (1op reg)`
6104			`wtgo`
6105			`rpc d=013220 -- ! pc=halt`
6106			`rr1 d=000000 -- ! r1=0`
6107			`wal 037000 -- check result area`
6108			`brm 10`
6109			`d=000011 -- ! sbc 000000 -> n1z0v0c1; 177777`
6110			`d=177777 -- !`
6111			`d=000004 -- ! sbc 000001 -> n0z1v0c0; 000000`
6112			`d=000000 -- !`
6113			`d=000000 -- ! sbc 077777 -> n0z0v0c0; 077776`
6114			`d=077776 -- !`
6115			`d=000002 -- ! sbc 100000 -> n0z0v1c0; 077777`
6116			`d=077777 -- !`
6117			`d=000010 -- ! sbc 177777 -> n1z0v0c0; 177776`
6118			`d=177776 -- !`
6119			`#--------`
6120			`C Exec test 46.7wr: TST - reg`
6121			`#`
6122			`wal 013204 -- setup test instructions:`
6123			`bwm 2`
6124			`000261 -- ccmov= sec`
6125			`005705 -- iut= tst r5`
6126			`wr0 177776 -- r0=177776`
6127			`wr1 000005 -- r1=5`
6128			`wr2 036000 -- r2=36000`
6129			`wr3 037000 -- r3=37000`
6130			`wr4 000000 -- r4=0`
6131			`wr5 000000 -- r5=0`
6132			`wsp 001400 -- sp=1400`
6133			`stapc 013200 -- start @ 13200 (1op reg)`
6134			`wtgo`
6135			`rpc d=013220 -- ! pc=halt`
6136			`rr1 d=000000 -- ! r1=0`
6137			`wal 037000 -- check result area`
6138			`brm 10`
6139			`d=000004 -- ! tst 000000 -> n0z1v0c0;`
6140			`d=000000 -- !`
6141			`d=000000 -- ! tst 000001 -> n0z0v0c0;`
6142			`d=000001 -- !`
6143			`d=000000 -- ! tst 077777 -> n0z0v0c0;`
6144			`d=077777 -- !`
6145			`d=000010 -- ! tst 100000 -> n1z0v0c0;`
6146			`d=100000 -- !`
6147			`d=000010 -- ! tst 177777 -> n1z0v0c0;`
6148			`d=177777 -- !`
6149			`#--------`
6150			`C Exec test 46.7wm: TST - mem`
6151			`#`
6152			`wal 013224 -- setup test instructions:`
6153			`bwm 2`
6154			`000261 -- ccmov= sec`
6155			`005715 -- iut= tst (r5)`
6156			`wr0 177776 -- r0=177776`
6157			`wr1 000005 -- r1=5`
6158			`wr2 036000 -- r2=36000`
6159			`wr3 037000 -- r3=37000`
6160			`wr4 001400 -- r4=1400`
6161			`wr5 001402 -- r5=1402`
6162			`wsp 001400 -- sp=1400`
6163			`stapc 013220 -- start @ 13220 (1op mem)`
6164			`wtgo`
6165			`rpc d=013240 -- ! pc=halt`
6166			`rr1 d=000000 -- ! r1=0`
6167			`wal 037000 -- check result area`
6168			`brm 10`
6169			`d=000004 -- ! tst 000000 -> n0z1v0c0;`
6170			`d=000000 -- !`
6171			`d=000000 -- ! tst 000001 -> n0z0v0c0;`
6172			`d=000001 -- !`
6173			`d=000000 -- ! tst 077777 -> n0z0v0c0;`
6174			`d=077777 -- !`
6175			`d=000010 -- ! tst 100000 -> n1z0v0c0;`
6176			`d=100000 -- !`
6177			`d=000010 -- ! tst 177777 -> n1z0v0c0;`
6178			`d=177777 -- !`
6179			`#--------`
6180			`C Exec test 46.8wrc0: ROR - reg, C=0`
6181			`#`
6182			`wal 036000 -- setup test vector: for ror,rol,ars,asl`
6183			`bwm 7`
6184			`000000 -- ror 000000`
6185			`000001 -- ror 000001`
6186			`100000 -- ror 100000`
6187			`000100 -- ror 000100`
6188			`000101 -- ror 000101`
6189			`040100 -- ror 040100`
6190			`100100 -- ror 100100`
6191			`wal 013204 -- setup test instructions:`
6192			`bwm 2`
6193			`000241 -- ccmov= clc`
6194			`006005 -- iut= ror r5`
6195			`wr0 177776 -- r0=177776`
6196			`wr1 000007 -- r1=7`
6197			`wr2 036000 -- r2=36000`
6198			`wr3 037000 -- r3=37000`
6199			`wr4 000000 -- r4=0`
6200			`wr5 000000 -- r5=0`
6201			`wsp 001400 -- sp=1400`
6202			`stapc 013200 -- start @ 13200 (1op reg)`
6203			`wtgo`
6204			`rpc d=013220 -- ! pc=halt`
6205			`rr1 d=000000 -- ! r1=0`
6206			`wal 037000 -- check result area (Note: V = N xor C !)`
6207			`brm 14`
6208			`d=000004 -- ! ror 000000 -> n0z1v0c0; 000000`
6209			`d=000000 -- !`
6210			`d=000007 -- ! ror 000001 -> n0z1v1c1; 000000`
6211			`d=000000 -- !`
6212			`d=000000 -- ! ror 100000 -> n0z0v0c0; 040000`
6213			`d=040000 -- !`
6214			`d=000000 -- ! ror 000100 -> n0z0v0c0; 000040`
6215			`d=000040 -- !`
6216			`d=000003 -- ! ror 000101 -> n0z0v1c1; 000040`
6217			`d=000040 -- !`
6218			`d=000000 -- ! ror 040100 -> n0z0v0c0; 020040`
6219			`d=020040 -- !`
6220			`d=000000 -- ! ror 100100 -> n0z0v0c0; 040040`
6221			`d=040040 -- !`
6222			`#--------`
6223			`C Exec test 46.8wrc1: ROR - reg, C=1`
6224			`#`
6225			`wal 013204 -- setup test instructions:`
6226			`bwm 2`
6227			`000261 -- ccmov= sec`
6228			`006005 -- iut= ror r5`
6229			`wr0 177776 -- r0=177776`
6230			`wr1 000007 -- r1=7`
6231			`wr2 036000 -- r2=36000`
6232			`wr3 037000 -- r3=37000`
6233			`wr4 000000 -- r4=0`
6234			`wr5 000000 -- r5=0`
6235			`wsp 001400 -- sp=1400`
6236			`stapc 013200 -- start @ 13200 (1op reg)`
6237			`wtgo`
6238			`rpc d=013220 -- ! pc=halt`
6239			`rr1 d=000000 -- ! r1=0`
6240			`wal 037000 -- check result area (Note: V = N xor C !)`
6241			`brm 14`
6242			`d=000012 -- ! ror 000000 -> n1z0v1c0; 100000`
6243			`d=100000 -- !`
6244			`d=000011 -- ! ror 000001 -> n1z0v0c1; 100000`
6245			`d=100000 -- !`
6246			`d=000012 -- ! ror 100000 -> n1z0v1c0; 140000`
6247			`d=140000 -- !`
6248			`d=000012 -- ! ror 000100 -> n1z0v1c0; 100040`
6249			`d=100040 -- !`
6250			`d=000011 -- ! ror 000101 -> n1z0v0c1; 100040`
6251			`d=100040 -- !`
6252			`d=000012 -- ! ror 040100 -> n1z0v1c0; 120040`
6253			`d=120040 -- !`
6254			`d=000012 -- ! ror 100100 -> n1z0v1c0; 140040`
6255			`d=140040 -- !`
6256			`#--------`
6257			`C Exec test 46.9wrc0: ROL - reg, C=0`
6258			`#`
6259			`wal 013204 -- setup test instructions:`
6260			`bwm 2`
6261			`000241 -- ccmov= clc`
6262			`006105 -- iut= rol r5`
6263			`wr0 177776 -- r0=177776`
6264			`wr1 000007 -- r1=7`
6265			`wr2 036000 -- r2=36000`
6266			`wr3 037000 -- r3=37000`
6267			`wr4 000000 -- r4=0`
6268			`wr5 000000 -- r5=0`
6269			`wsp 001400 -- sp=1400`
6270			`stapc 013200 -- start @ 13200 (1op reg)`
6271			`wtgo`
6272			`rpc d=013220 -- ! pc=halt`
6273			`rr1 d=000000 -- ! r1=0`
6274			`wal 037000 -- check result area (Note: V = N xor C !)`
6275			`brm 14`
6276			`d=000004 -- ! rol 000000 -> n0z1v0c0; 000000`
6277			`d=000000 -- !`
6278			`d=000000 -- ! rol 000001 -> n0z0v0c0; 000002`
6279			`d=000002 -- !`
6280			`d=000007 -- ! rol 100000 -> n0z1v1c1; 000000`
6281			`d=000000 -- !`
6282			`d=000000 -- ! rol 000100 -> n0z0v0c0; 000200`
6283			`d=000200 -- !`
6284			`d=000000 -- ! rol 000101 -> n0z0v0c0; 000202`
6285			`d=000202 -- !`
6286			`d=000012 -- ! rol 040100 -> n1z0v1c0; 100200`
6287			`d=100200 -- !`
6288			`d=000003 -- ! rol 100100 -> n0z0v1c1; 000200`
6289			`d=000200 -- !`
6290			`#--------`
6291			`C Exec test 46.9wrc1: ROL - reg, C=1`
6292			`#`
6293			`wal 013204 -- setup test instructions:`
6294			`bwm 2`
6295			`000261 -- ccmov= sec`
6296			`006105 -- iut= rol r5`
6297			`wr0 177776 -- r0=177776`
6298			`wr1 000007 -- r1=7`
6299			`wr2 036000 -- r2=36000`
6300			`wr3 037000 -- r3=37000`
6301			`wr4 000000 -- r4=0`
6302			`wr5 000000 -- r5=0`
6303			`wsp 001400 -- sp=1400`
6304			`stapc 013200 -- start @ 13200 (1op reg)`
6305			`wtgo`
6306			`rpc d=013220 -- ! pc=halt`
6307			`rr1 d=000000 -- ! r1=0`
6308			`wal 037000 -- check result area (Note: V = N xor C !)`
6309			`brm 14`
6310			`d=000000 -- ! rol 000000 -> n0z0v0c0; 000001`
6311			`d=000001 -- !`
6312			`d=000000 -- ! rol 000001 -> n0z0v0c0; 000003`
6313			`d=000003 -- !`
6314			`d=000003 -- ! rol 100000 -> n0z0v1c1; 000001`
6315			`d=000001 -- !`
6316			`d=000000 -- ! rol 000100 -> n0z0v0c0; 000201`
6317			`d=000201 -- !`
6318			`d=000000 -- ! rol 000101 -> n0z0v0c0; 000203`
6319			`d=000203 -- !`
6320			`d=000012 -- ! rol 040100 -> n1z0v1c0; 100201`
6321			`d=100201 -- !`
6322			`d=000003 -- ! rol 100100 -> n0z0v1c1; 000201`
6323			`d=000201 -- !`
6324			`#--------`
6325			`C Exec test 46.10wrc0: ASR - reg, C=0`
6326			`#`
6327			`wal 013204 -- setup test instructions:`
6328			`bwm 2`
6329			`000241 -- ccmov= clc`
6330			`006205 -- iut= asr r5`
6331			`wr0 177776 -- r0=177776`
6332			`wr1 000007 -- r1=7`
6333			`wr2 036000 -- r2=36000`
6334			`wr3 037000 -- r3=37000`
6335			`wr4 000000 -- r4=0`
6336			`wr5 000000 -- r5=0`
6337			`wsp 001400 -- sp=1400`
6338			`stapc 013200 -- start @ 13200 (1op reg)`
6339			`wtgo`
6340			`rpc d=013220 -- ! pc=halt`
6341			`rr1 d=000000 -- ! r1=0`
6342			`wal 037000 -- check result area (Note: V = N xor C !)`
6343			`brm 14`
6344			`d=000004 -- ! asr 000000 -> n0z1v0c0; 000000`
6345			`d=000000 -- !`
6346			`d=000007 -- ! asr 000001 -> n0z1v1c1; 000000`
6347			`d=000000 -- !`
6348			`d=000012 -- ! asr 100000 -> n1z0v1c0; 140000`
6349			`d=140000 -- !`
6350			`d=000000 -- ! asr 000100 -> n0z0v0c0; 000040`
6351			`d=000040 -- !`
6352			`d=000003 -- ! asr 000101 -> n0z0v1c1; 000040`
6353			`d=000040 -- !`
6354			`d=000000 -- ! asr 040100 -> n0z0v0c0; 020040`
6355			`d=020040 -- !`
6356			`d=000012 -- ! asr 100100 -> n1z0v1c0; 140040`
6357			`d=140040 -- !`
6358			`#--------`
6359			`C Exec test 46.10wrc1: ASR - reg, C=1`
6360			`#`
6361			`wal 013204 -- setup test instructions:`
6362			`bwm 2`
6363			`000261 -- ccmov= sec`
6364			`006205 -- iut= asr r5`
6365			`wr0 177776 -- r0=177776`
6366			`wr1 000007 -- r1=7`
6367			`wr2 036000 -- r2=36000`
6368			`wr3 037000 -- r3=37000`
6369			`wr4 000000 -- r4=0`
6370			`wr5 000000 -- r5=0`
6371			`wsp 001400 -- sp=1400`
6372			`stapc 013200 -- start @ 13200 (1op reg)`
6373			`wtgo`
6374			`rpc d=013220 -- ! pc=halt`
6375			`rr1 d=000000 -- ! r1=0`
6376			`wal 037000 -- check result area (Note: V = N xor C !)`
6377			`brm 14`
6378			`d=000004 -- ! asr 000000 -> n0z1v0c0; 000000`
6379			`d=000000 -- !`
6380			`d=000007 -- ! asr 000001 -> n0z1v1c1; 000000`
6381			`d=000000 -- !`
6382			`d=000012 -- ! asr 100000 -> n1z0v1c0; 140000`
6383			`d=140000 -- !`
6384			`d=000000 -- ! asr 000100 -> n0z0v0c0; 000040`
6385			`d=000040 -- !`
6386			`d=000003 -- ! asr 000101 -> n0z0v1c1; 000040`
6387			`d=000040 -- !`
6388			`d=000000 -- ! asr 040100 -> n0z0v0c0; 020040`
6389			`d=020040 -- !`
6390			`d=000012 -- ! asr 100100 -> n1z0v1c0; 140040`
6391			`d=140040 -- !`
6392			`#--------`
6393			`C Exec test 46.11wrc0: ASL - reg, C=0`
6394			`#`
6395			`wal 013204 -- setup test instructions:`
6396			`bwm 2`
6397			`000241 -- ccmov= clc`
6398			`006305 -- iut= asl r5`
6399			`wr0 177776 -- r0=177776`
6400			`wr1 000007 -- r1=7`
6401			`wr2 036000 -- r2=36000`
6402			`wr3 037000 -- r3=37000`
6403			`wr4 000000 -- r4=0`
6404			`wr5 000000 -- r5=0`
6405			`wsp 001400 -- sp=1400`
6406			`stapc 013200 -- start @ 13200 (1op reg)`
6407			`wtgo`
6408			`rpc d=013220 -- ! pc=halt`
6409			`rr1 d=000000 -- ! r1=0`
6410			`wal 037000 -- check result area (Note: V = N xor C !)`
6411			`brm 14`
6412			`d=000004 -- ! asl 000000 -> n0z1v0c0; 000000`
6413			`d=000000 -- !`
6414			`d=000000 -- ! asl 000001 -> n0z0v0c0; 000002`
6415			`d=000002 -- !`
6416			`d=000007 -- ! asl 100000 -> n0z1v1c1; 000000`
6417			`d=000000 -- !`
6418			`d=000000 -- ! asl 000100 -> n0z0v0c0; 000200`
6419			`d=000200 -- !`
6420			`d=000000 -- ! asl 000101 -> n0z0v0c0; 000202`
6421			`d=000202 -- !`
6422			`d=000012 -- ! asl 040100 -> n1z0v1c0; 100200`
6423			`d=100200 -- !`
6424			`d=000003 -- ! asl 100100 -> n0z0v1c1; 000200`
6425			`d=000200 -- !`
6426			`#--------`
6427			`C Exec test 46.11wrc1: ASL - reg, C=1`
6428			`#`
6429			`wal 013204 -- setup test instructions:`
6430			`bwm 2`
6431			`000261 -- ccmov= sec`
6432			`006305 -- iut= asl r5`
6433			`wr0 177776 -- r0=177776`
6434			`wr1 000007 -- r1=7`
6435			`wr2 036000 -- r2=36000`
6436			`wr3 037000 -- r3=37000`
6437			`wr4 000000 -- r4=0`
6438			`wr5 000000 -- r5=0`
6439			`wsp 001400 -- sp=1400`
6440			`stapc 013200 -- start @ 13200 (1op reg)`
6441			`wtgo`
6442			`rpc d=013220 -- ! pc=halt`
6443			`rr1 d=000000 -- ! r1=0`
6444			`wal 037000 -- check result area (Note: V = N xor C !)`
6445			`brm 14`
6446			`d=000004 -- ! asl 000000 -> n0z1v0c0; 000000`
6447			`d=000000 -- !`
6448			`d=000000 -- ! asl 000001 -> n0z0v0c0; 000002`
6449			`d=000002 -- !`
6450			`d=000007 -- ! asl 100000 -> n0z1v1c1; 000000`
6451			`d=000000 -- !`
6452			`d=000000 -- ! asl 000100 -> n0z0v0c0; 000200`
6453			`d=000200 -- !`
6454			`d=000000 -- ! asl 000101 -> n0z0v0c0; 000202`
6455			`d=000202 -- !`
6456			`d=000012 -- ! asl 040100 -> n1z0v1c0; 100200`
6457			`d=100200 -- !`
6458			`d=000003 -- ! asl 100100 -> n0z0v1c1; 000200`
6459			`d=000200 -- !`
6460			`#--------`
6461			`C Exec test 46.12wrc0: MOV - reg, C=0`
6462			`#`
6463			`wal 036000 -- setup test vector: for mov`
6464			`bwm 6`
6465			`000000 -- mov 000000,000000`
6466			`000000 --`
6467			`000001 -- mov 000001,000000`
6468			`000000 --`
6469			`100000 -- mov 100000,000000`
6470			`000000 --`
6471			`wal 013246 -- setup test instructions:`
6472			`bwm 2`
6473			`000241 -- ccmov= clc`
6474			`010405 -- iut= mov r4,r5`
6475			`wr0 177776 -- r0=177776`
6476			`wr1 000003 -- r1=3`
6477			`wr2 036000 -- r2=36000`
6478			`wr3 037000 -- r3=37000`
6479			`wr4 000000 -- r4=0`
6480			`wr5 000000 -- r5=0`
6481			`wsp 001400 -- sp=1400`
6482			`stapc 013240 -- start @ 13240 (2op reg)`
6483			`wtgo`
6484			`rpc d=013262 -- ! pc=halt`
6485			`rr1 d=000000 -- ! r1=0`
6486			`wal 037000 -- check result area`
6487			`brm 6`
6488			`d=000004 -- ! mov 000000,000000 -> n0z1v0c0; 000000`
6489			`d=000000 -- !`
6490			`d=000000 -- ! mov 000001,000000 -> n0z0v0c0; 000001`
6491			`d=000001 -- !`
6492			`d=000010 -- ! mov 100000,000000 -> n1z0v0c0; 100000`
6493			`d=100000 -- !`
6494			`#--------`
6495			`C Exec test 46.12wrc1: MOV - reg, C=1`
6496			`#`
6497			`wal 013246 -- setup test instructions:`
6498			`bwm 2`
6499			`000261 -- ccmov= sec`
6500			`010405 -- iut= mov r4,r5`
6501			`wr0 177776 -- r0=177776`
6502			`wr1 000003 -- r1=3`
6503			`wr2 036000 -- r2=36000`
6504			`wr3 037000 -- r3=37000`
6505			`wr4 000000 -- r4=0`
6506			`wr5 000000 -- r5=0`
6507			`wsp 001400 -- sp=1400`
6508			`stapc 013240 -- start @ 13240 (2op reg)`
6509			`wtgo`
6510			`rpc d=013262 -- ! pc=halt`
6511			`rr1 d=000000 -- ! r1=0`
6512			`wal 037000 -- check result area`
6513			`brm 6`
6514			`d=000005 -- ! mov 000000,000000 -> n0z1v0c1; 000000`
6515			`d=000000 -- !`
6516			`d=000001 -- ! mov 000001,000000 -> n0z0v0c1; 000001`
6517			`d=000001 -- !`
6518			`d=000011 -- ! mov 100000,000000 -> n1z0v0c1; 100000`
6519			`d=100000 -- !`
6520			`#--------`
6521			`C Exec test 46.12mc0: MOV - mem, C=0`
6522			`#`
6523			`wal 013276 -- setup test instructions:`
6524			`bwm 2`
6525			`000241 -- ccmov= clc`
6526			`011415 -- iut= mov (r4),(r5)`
6527			`wr0 177776 -- r0=177776`
6528			`wr1 000003 -- r1=3`
6529			`wr2 036000 -- r2=36000`
6530			`wr3 037000 -- r3=37000`
6531			`wr4 001400 -- r4=1400`
6532			`wr5 001402 -- r5=1402`
6533			`wsp 001400 -- sp=1400`
6534			`stapc 013270 -- start @ 13270 (2op mem)`
6535			`wtgo`
6536			`rpc d=013312 -- ! pc=halt`
6537			`rr1 d=000000 -- ! r1=0`
6538			`wal 037000 -- check result area`
6539			`brm 6`
6540			`d=000004 -- ! mov 000000,000000 -> n0z1v0c0; 000000`
6541			`d=000000 -- !`
6542			`d=000000 -- ! mov 000001,000000 -> n0z0v0c0; 000001`
6543			`d=000001 -- !`
6544			`d=000010 -- ! mov 100000,000000 -> n1z0v0c0; 100000`
6545			`d=100000 -- !`
6546			`#--------`
6547			`C Exec test 46.13wrc0: BIT - reg, C=0`
6548			`#`
6549			`wal 036000 -- setup test vector: for bit,bic,bis,xor`
6550			`bwm 12`
6551			`000000 -- bit 000000,000000`
6552			`000000 --`
6553			`000011 -- bit 000011,000000`
6554			`000000 --`
6555			`000011 -- bit 000011,000110`
6556			`000110 --`
6557			`000011 -- bit 000011,001100`
6558			`001100 --`
6559			`110000 -- bit 110000,011000`
6560			`011000 --`
6561			`110000 -- bit 110000,110000`
6562			`110000 --`
6563			`wal 013246 -- setup test instructions:`
6564			`bwm 2`
6565			`000241 -- ccmov= clc`
6566			`030405 -- iut= bit r4,r5`
6567			`wr0 177776 -- r0=177776`
6568			`wr1 000006 -- r1=6`
6569			`wr2 036000 -- r2=36000`
6570			`wr3 037000 -- r3=37000`
6571			`wr4 000000 -- r4=0`
6572			`wr5 000000 -- r5=0`
6573			`wsp 001400 -- sp=1400`
6574			`stapc 013240 -- start @ 13240 (2op reg)`
6575			`wtgo`
6576			`rpc d=013262 -- ! pc=halt`
6577			`rr1 d=000000 -- ! r1=0`
6578			`wal 037000 -- check result area`
6579			`brm 12`
6580			`d=000004 -- ! bit 000000,000000 -> n0z1v0c0; (000000)`
6581			`d=000000 -- !`
6582			`d=000004 -- ! bit 000011,000000 -> n0z1v0c0; (000000)`
6583			`d=000000 -- !`
6584			`d=000000 -- ! bit 000011,000110 -> n0z0v0c0; (000010)`
6585			`d=000110 -- !`
6586			`d=000004 -- ! bit 000011,001100 -> n0z1v0c0; (000000)`
6587			`d=001100 -- !`
6588			`d=000000 -- ! bit 110000,011000 -> n0z0v0c0; (010000)`
6589			`d=011000 -- !`
6590			`d=000010 -- ! bit 110000,110000 -> n1z0v0c0; (100000)`
6591			`d=110000 -- !`
6592			`#--------`
6593			`C Exec test 46.13wrc1: BIT - reg, C=1`
6594			`#`
6595			`wal 013246 -- setup test instructions:`
6596			`bwm 2`
6597			`000261 -- ccmov= sec`
6598			`030405 -- iut= bit r4,r5`
6599			`wr0 177776 -- r0=177776`
6600			`wr1 000006 -- r1=6`
6601			`wr2 036000 -- r2=36000`
6602			`wr3 037000 -- r3=37000`
6603			`wr4 000000 -- r4=0`
6604			`wr5 000000 -- r5=0`
6605			`wsp 001400 -- sp=1400`
6606			`stapc 013240 -- start @ 13240 (2op reg)`
6607			`wtgo`
6608			`rpc d=013262 -- ! pc=halt`
6609			`rr1 d=000000 -- ! r1=0`
6610			`wal 037000 -- check result area`
6611			`brm 12`
6612			`d=000005 -- ! bit 000000,000000 -> n0z1v0c1; (000000)`
6613			`d=000000 -- !`
6614			`d=000005 -- ! bit 000011,000000 -> n0z1v0c1; (000000)`
6615			`d=000000 -- !`
6616			`d=000001 -- ! bit 000011,000110 -> n0z0v0c1; (000010)`
6617			`d=000110 -- !`
6618			`d=000005 -- ! bit 000011,001100 -> n0z1v0c1; (000000)`
6619			`d=001100 -- !`
6620			`d=000001 -- ! bit 110000,011000 -> n0z0v0c1; (010000)`
6621			`d=011000 -- !`
6622			`d=000011 -- ! bit 110000,110000 -> n1z0v0c1; (100000)`
6623			`d=110000 -- !`
6624			`#--------`
6625			`C Exec test 46.13wmc0: BIT - mem, C=0`
6626			`#`
6627			`wal 013276 -- setup test instructions:`
6628			`bwm 2`
6629			`000241 -- ccmov= clc`
6630			`031415 -- iut= bit (r4),(r5)`
6631			`wr0 177776 -- r0=177776`
6632			`wr1 000006 -- r1=6`
6633			`wr2 036000 -- r2=36000`
6634			`wr3 037000 -- r3=37000`
6635			`wr4 001400 -- r4=1400`
6636			`wr5 001402 -- r5=1402`
6637			`wsp 001400 -- sp=1400`
6638			`stapc 013270 -- start @ 13270 (2op mem)`
6639			`wtgo`
6640			`rpc d=013312 -- ! pc=halt`
6641			`rr1 d=000000 -- ! r1=0`
6642			`wal 037000 -- check result area`
6643			`brm 12`
6644			`d=000004 -- ! bit 000000,000000 -> n0z1v0c0; (000000)`
6645			`d=000000 -- !`
6646			`d=000004 -- ! bit 000011,000000 -> n0z1v0c0; (000000)`
6647			`d=000000 -- !`
6648			`d=000000 -- ! bit 000011,000110 -> n0z0v0c0; (000010)`
6649			`d=000110 -- !`
6650			`d=000004 -- ! bit 000011,001100 -> n0z1v0c0; (000000)`
6651			`d=001100 -- !`
6652			`d=000000 -- ! bit 110000,011000 -> n0z0v0c0; (010000)`
6653			`d=011000 -- !`
6654			`d=000010 -- ! bit 110000,110000 -> n1z0v0c0; (100000)`
6655			`d=110000 -- !`
6656			`#--------`
6657			`C Exec test 46.14wrc0: BIC - reg, C=0`
6658			`#`
6659			`wal 013246 -- setup test instructions:`
6660			`bwm 2`
6661			`000241 -- ccmov= clc`
6662			`040405 -- iut= bic r4,r5`
6663			`wr0 177776 -- r0=177776`
6664			`wr1 000006 -- r1=6`
6665			`wr2 036000 -- r2=36000`
6666			`wr3 037000 -- r3=37000`
6667			`wr4 000000 -- r4=0`
6668			`wr5 000000 -- r5=0`
6669			`wsp 001400 -- sp=1400`
6670			`stapc 013240 -- start @ 13240 (2op reg)`
6671			`wtgo`
6672			`rpc d=013262 -- ! pc=halt`
6673			`rr1 d=000000 -- ! r1=0`
6674			`wal 037000 -- check result area`
6675			`brm 12`
6676			`d=000004 -- ! bic 000000,000000 -> n0z1v0c0; 000000`
6677			`d=000000 -- !`
6678			`d=000004 -- ! bic 000011,000000 -> n0z1v0c0; 000000`
6679			`d=000000 -- !`
6680			`d=000000 -- ! bic 000011,000110 -> n0z0v0c0; 000100`
6681			`d=000100 -- !`
6682			`d=000000 -- ! bic 000011,001100 -> n0z0v0c0; 001100`
6683			`d=001100 -- !`
6684			`d=000000 -- ! bic 110000,011000 -> n0z0v0c0; 001000`
6685			`d=001000 -- !`
6686			`d=000004 -- ! bic 110000,110000 -> n0z1v0c0; 000000`
6687			`d=000000 -- !`
6688			`#--------`
6689			`C Exec test 46.14wrc1: BIC - reg, C=1`
6690			`#`
6691			`wal 013246 -- setup test instructions:`
6692			`bwm 2`
6693			`000261 -- ccmov= sec`
6694			`040405 -- iut= bic r4,r5`
6695			`wr0 177776 -- r0=177776`
6696			`wr1 000006 -- r1=6`
6697			`wr2 036000 -- r2=36000`
6698			`wr3 037000 -- r3=37000`
6699			`wr4 000000 -- r4=0`
6700			`wr5 000000 -- r5=0`
6701			`wsp 001400 -- sp=1400`
6702			`stapc 013240 -- start @ 13240 (2op reg)`
6703			`wtgo`
6704			`rpc d=013262 -- ! pc=halt`
6705			`rr1 d=000000 -- ! r1=0`
6706			`wal 037000 -- check result area`
6707			`brm 12`
6708			`d=000005 -- ! bic 000000,000000 -> n0z1v0c1; 000000`
6709			`d=000000 -- !`
6710			`d=000005 -- ! bic 000011,000000 -> n0z1v0c1; 000000`
6711			`d=000000 -- !`
6712			`d=000001 -- ! bic 000011,000110 -> n0z0v0c1; 000100`
6713			`d=000100 -- !`
6714			`d=000001 -- ! bic 000011,001100 -> n0z0v0c1; 001100`
6715			`d=001100 -- !`
6716			`d=000001 -- ! bic 110000,011000 -> n0z0v0c1; 001000`
6717			`d=001000 -- !`
6718			`d=000005 -- ! bic 110000,110000 -> n0z1v0c1; 000000`
6719			`d=000000 -- !`
6720			`#--------`
6721			`C Exec test 46.14wrc0: BIC - mem, C=0`
6722			`#`
6723			`wal 013276 -- setup test instructions:`
6724			`bwm 2`
6725			`000241 -- ccmov= clc`
6726			`041415 -- iut= bic (r4),(r5)`
6727			`wr0 177776 -- r0=177776`
6728			`wr1 000006 -- r1=6`
6729			`wr2 036000 -- r2=36000`
6730			`wr3 037000 -- r3=37000`
6731			`wr4 001400 -- r4=1400`
6732			`wr5 001402 -- r5=1402`
6733			`wsp 001400 -- sp=1400`
6734			`stapc 013270 -- start @ 13270 (2op mem)`
6735			`wtgo`
6736			`rpc d=013312 -- ! pc=halt`
6737			`rr1 d=000000 -- ! r1=0`
6738			`wal 037000 -- check result area`
6739			`brm 12`
6740			`d=000004 -- ! bic 000000,000000 -> n0z1v0c0; 000000`
6741			`d=000000 -- !`
6742			`d=000004 -- ! bic 000011,000000 -> n0z1v0c0; 000000`
6743			`d=000000 -- !`
6744			`d=000000 -- ! bic 000011,000110 -> n0z0v0c0; 000100`
6745			`d=000100 -- !`
6746			`d=000000 -- ! bic 000011,001100 -> n0z0v0c0; 001100`
6747			`d=001100 -- !`
6748			`d=000000 -- ! bic 110000,011000 -> n0z0v0c0; 001000`
6749			`d=001000 -- !`
6750			`d=000004 -- ! bic 110000,110000 -> n0z1v0c0; 000000`
6751			`d=000000 -- !`
6752			`#--------`
6753			`C Exec test 46.15wrc0: BIS - reg, C=0`
6754			`#`
6755			`wal 013246 -- setup test instructions:`
6756			`bwm 2`
6757			`000241 -- ccmov= clc`
6758			`050405 -- iut= bis r4,r5`
6759			`wr0 177776 -- r0=177776`
6760			`wr1 000006 -- r1=6`
6761			`wr2 036000 -- r2=36000`
6762			`wr3 037000 -- r3=37000`
6763			`wr4 000000 -- r4=0`
6764			`wr5 000000 -- r5=0`
6765			`wsp 001400 -- sp=1400`
6766			`stapc 013240 -- start @ 13240 (2op reg)`
6767			`wtgo`
6768			`rpc d=013262 -- ! pc=halt`
6769			`rr1 d=000000 -- ! r1=0`
6770			`wal 037000 -- check result area`
6771			`brm 12`
6772			`d=000004 -- ! bis 000000,000000 -> n0z1v0c0; 000000`
6773			`d=000000 -- !`
6774			`d=000000 -- ! bis 000011,000000 -> n0z0v0c0; 000011`
6775			`d=000011 -- !`
6776			`d=000000 -- ! bis 000011,000110 -> n0z0v0c0; 000111`
6777			`d=000111 -- !`
6778			`d=000000 -- ! bis 000011,001100 -> n0z0v0c0; 001111`
6779			`d=001111 -- !`
6780			`d=000010 -- ! bis 110000,011000 -> n1z0v0c0; 111000`
6781			`d=111000 -- !`
6782			`d=000010 -- ! bis 110000,110000 -> n1z0v0c0; 110000`
6783			`d=110000 -- !`
6784			`#--------`
6785			`C Exec test 46.15wrc1: BIS - reg, C=1`
6786			`#`
6787			`wal 013246 -- setup test instructions:`
6788			`bwm 2`
6789			`000261 -- ccmov= sec`
6790			`050405 -- iut= bis r4,r5`
6791			`wr0 177776 -- r0=177776`
6792			`wr1 000006 -- r1=6`
6793			`wr2 036000 -- r2=36000`
6794			`wr3 037000 -- r3=37000`
6795			`wr4 000000 -- r4=0`
6796			`wr5 000000 -- r5=0`
6797			`wsp 001400 -- sp=1400`
6798			`stapc 013240 -- start @ 13240 (2op reg)`
6799			`wtgo`
6800			`rpc d=013262 -- ! pc=halt`
6801			`rr1 d=000000 -- ! r1=0`
6802			`wal 037000 -- check result area`
6803			`brm 12`
6804			`d=000005 -- ! bis 000000,000000 -> n0z1v0c1; 000000`
6805			`d=000000 -- !`
6806			`d=000001 -- ! bis 000011,000000 -> n0z0v0c1; 000011`
6807			`d=000011 -- !`
6808			`d=000001 -- ! bis 000011,000110 -> n0z0v0c1; 000111`
6809			`d=000111 -- !`
6810			`d=000001 -- ! bis 000011,001100 -> n0z0v0c1; 001111`
6811			`d=001111 -- !`
6812			`d=000011 -- ! bis 110000,011000 -> n1z0v0c1; 111000`
6813			`d=111000 -- !`
6814			`d=000011 -- ! bis 110000,110000 -> n1z0v0c1; 110000`
6815			`d=110000 -- !`
6816			`#--------`
6817			`C Exec test 46.16wrc0: XOR - reg, C=0`
6818			`#`
6819			`wal 013246 -- setup test instructions:`
6820			`bwm 2`
6821			`000241 -- ccmov= clc`
6822			`074405 -- iut= xor r4,r5`
6823			`wr0 177776 -- r0=177776`
6824			`wr1 000006 -- r1=6`
6825			`wr2 036000 -- r2=36000`
6826			`wr3 037000 -- r3=37000`
6827			`wr4 000000 -- r4=0`
6828			`wr5 000000 -- r5=0`
6829			`wsp 001400 -- sp=1400`
6830			`stapc 013240 -- start @ 13240 (2op reg)`
6831			`wtgo`
6832			`rpc d=013262 -- ! pc=halt`
6833			`rr1 d=000000 -- ! r1=0`
6834			`wal 037000 -- check result area`
6835			`brm 12`
6836			`d=000004 -- ! xor 000000,000000 -> n0z1v0c0; 000000`
6837			`d=000000 -- !`
6838			`d=000000 -- ! xor 000011,000000 -> n0z0v0c0; 000011`
6839			`d=000011 -- !`
6840			`d=000000 -- ! xor 000011,000110 -> n0z0v0c0; 000101`
6841			`d=000101 -- !`
6842			`d=000000 -- ! xor 000011,001100 -> n0z0v0c0; 001111`
6843			`d=001111 -- !`
6844			`d=000010 -- ! xor 110000,011000 -> n1z0v0c0; 101000`
6845			`d=101000 -- !`
6846			`d=000004 -- ! xor 110000,110000 -> n1z0v0c0; 000000`
6847			`d=000000 -- !`
6848			`#--------`
6849			`C Exec test 46.16wrc1: XOR - reg, C=1`
6850			`#`
6851			`wal 013246 -- setup test instructions:`
6852			`bwm 2`
6853			`000261 -- ccmov= sec`
6854			`074405 -- iut= xor r4,r5`
6855			`wr0 177776 -- r0=177776`
6856			`wr1 000006 -- r1=6`
6857			`wr2 036000 -- r2=36000`
6858			`wr3 037000 -- r3=37000`
6859			`wr4 000000 -- r4=0`
6860			`wr5 000000 -- r5=0`
6861			`wsp 001400 -- sp=1400`
6862			`stapc 013240 -- start @ 13240 (2op reg)`
6863			`wtgo`
6864			`rpc d=013262 -- ! pc=halt`
6865			`rr1 d=000000 -- ! r1=0`
6866			`wal 037000 -- check result area`
6867			`brm 12`
6868			`d=000005 -- ! xor 000000,000000 -> n0z1v0c1; 000000`
6869			`d=000000 -- !`
6870			`d=000001 -- ! xor 000011,000000 -> n0z0v0c1; 000011`
6871			`d=000011 -- !`
6872			`d=000001 -- ! xor 000011,000110 -> n0z0v0c1; 000101`
6873			`d=000101 -- !`
6874			`d=000001 -- ! xor 000011,001100 -> n0z0v0c1; 001111`
6875			`d=001111 -- !`
6876			`d=000011 -- ! xor 110000,011000 -> n1z0v0c1; 101000`
6877			`d=101000 -- !`
6878			`d=000005 -- ! xor 110000,110000 -> n1z0v0c1; 000000`
6879			`d=000000 -- !`
6880			`#--------`
6881			`C Exec test 46.17wr: CMP - reg`
6882			`#`
6883			`wal 036000 -- setup test vector: for cmp,add,sub`
6884			`bwm 38`
6885			`000000 -- cmp 000000,000000`
6886			`000000 --`
6887			`000001 -- cmp 000001,000000`
6888			`000000 --`
6889			`177777 -- cmp 177777,000000`
6890			`000000 --`
6891			`000000 -- cmp 000000,000001`
6892			`000001 --`
6893			`000001 -- cmp 000001,000001`
6894			`000001 --`
6895			`177777 -- cmp 177777,000001`
6896			`000001 --`
6897			`077776 -- cmp 077776,077777`
6898			`077777 --`
6899			`077777 -- cmp 077777,077777`
6900			`077777 --`
6901			`100000 -- cmp 100000,077777`
6902			`077777 --`
6903			`000001 -- cmp 000001,077777`
6904			`077777 --`
6905			`177777 -- cmp 177777,077777`
6906			`077777 --`
6907			`077777 -- cmp 077777,100000`
6908			`100000 --`
6909			`100000 -- cmp 100000,100000`
6910			`100000 --`
6911			`100001 -- cmp 100001,100000`
6912			`100000 --`
6913			`000001 -- cmp 000001,100000`
6914			`100000 --`
6915			`177777 -- cmp 177777,100000`
6916			`100000 --`
6917			`000000 -- cmp 000000,177777`
6918			`177777 --`
6919			`000001 -- cmp 000001,177777`
6920			`177777 --`
6921			`177777 -- cmp 177777,177777`
6922			`177777 --`
6923			`wal 013246 -- setup test instructions:`
6924			`bwm 2`
6925			`000241 -- ccmov= clc`
6926			`020405 -- iut= cmp r4,r5`
6927			`wr0 177776 -- r0=177776`
6928			`wr1 000023 -- r1=23 (19.)`
6929			`wr2 036000 -- r2=36000`
6930			`wr3 037000 -- r3=37000`
6931			`wr4 000000 -- r4=0`
6932			`wr5 000000 -- r5=0`
6933			`wsp 001400 -- sp=1400`
6934			`stapc 013240 -- start @ 13240 (2op reg)`
6935			`wtgo`
6936			`rpc d=013262 -- ! pc=halt`
6937			`rr1 d=000000 -- ! r1=0 (Note: C=1 if dst > src unsigned)`
6938			`wal 037000 -- check result area (Note: V=1 if s xor d and r eq d)`
6939			`brm 38`
6940			`d=000004 -- ! cmp 000000,000000 -> n0z1v0c0; (000000)`
6941			`d=000000 -- !`
6942			`d=000000 -- ! cmp 000001,000000 -> n0z0v0c0; (000001)`
6943			`d=000000 -- !`
6944			`d=000010 -- ! cmp 177777,000000 -> n1z0v0c0; (177777)`
6945			`d=000000 -- !`
6946			`d=000011 -- ! cmp 000000,000001 -> n1z0v0c1; (177777+C)`
6947			`d=000001 -- !`
6948			`d=000004 -- ! cmp 000001,000001 -> n0z1v0c0; (000000)`
6949			`d=000001 -- !`
6950			`d=000010 -- ! cmp 177777,000001 -> n1z0v0c0; (177776)`
6951			`d=000001 -- !`
6952			`d=000011 -- ! cmp 077776,077777 -> n1z0v0c1; (177777+C)`
6953			`d=077777 -- !`
6954			`d=000004 -- ! cmp 077777,077777 -> n0z1v0c0; (000000)`
6955			`d=077777 -- !`
6956			`d=000002 -- ! cmp 100000,077777 -> n0z0v1c0; (000001)`
6957			`d=077777 -- !`
6958			`d=000011 -- ! cmp 000001,077777 -> n1z0v0c1; (100002+C)`
6959			`d=077777 -- !`
6960			`d=000010 -- ! cmp 177777,077777 -> n1z0v0c0; (100000)`
6961			`d=077777 -- !`
6962			`d=000013 -- ! cmp 077777,100000 -> n1z0v1c1; (177777+C)`
6963			`d=100000 -- !`
6964			`d=000004 -- ! cmp 100000,100000 -> n0z1v0c0; (000000)`
6965			`d=100000 -- !`
6966			`d=000000 -- ! cmp 100001,100000 -> n0z0v0c0; (000001)`
6967			`d=100000 -- !`
6968			`d=000013 -- ! cmp 000001,100000 -> n1z0v1c1; (100001+C)`
6969			`d=100000 -- !`
6970			`d=000000 -- ! cmp 177777,100000 -> n0z0v0c0; (077777)`
6971			`d=100000 -- !`
6972			`d=000001 -- ! cmp 000000,177777 -> n0z0v0c1; (000001+C)`
6973			`d=177777 -- !`
6974			`d=000001 -- ! cmp 000001,177777 -> n0z0v0c1; (000002+C)`
6975			`d=177777 -- !`
6976			`d=000004 -- ! cmp 177777,177777 -> n0z1v0c0; (000000)`
6977			`d=177777 -- !`
6978			`#--------`
6979			`C Exec test 46.18r: ADD - reg`
6980			`#`
6981			`wal 013246 -- setup test instructions:`
6982			`bwm 2`
6983			`000241 -- ccmov= clc`
6984			`060405 -- iut= add r4,r5`
6985			`wr0 177776 -- r0=177776`
6986			`wr1 000023 -- r1=23 (19.)`
6987			`wr2 036000 -- r2=36000`
6988			`wr3 037000 -- r3=37000`
6989			`wr4 000000 -- r4=0`
6990			`wr5 000000 -- r5=0`
6991			`wsp 001400 -- sp=1400`
6992			`stapc 013240 -- start @ 13240 (2op reg)`
6993			`wtgo`
6994			`rpc d=013262 -- ! pc=halt`
6995			`rr1 d=000000 -- ! r1=0`
6996			`wal 037000 -- check result area (Note: V=1 if s eq d and r neq d)`
6997			`brm 38`
6998			`d=000004 -- ! add 000000,000000 -> n0z1v0c0; 000000`
6999			`d=000000 -- !`
7000			`d=000000 -- ! add 000001,000000 -> n0z0v0c0; 000001`
7001			`d=000001 -- !`
7002			`d=000010 -- ! add 177777,000000 -> n1z0v0c0; 177777`
7003			`d=177777 -- !`
7004			`d=000000 -- ! add 000000,000001 -> n0z0v0c0; 000001`
7005			`d=000001 -- !`
7006			`d=000000 -- ! add 000001,000001 -> n0z0v0c0; 000002`
7007			`d=000002 -- !`
7008			`d=000005 -- ! add 177777,000001 -> n0z1v0c1; 000000+C`
7009			`d=000000 -- !`
7010			`d=000012 -- ! add 077776,077777 -> n1z0v1c0; 177775`
7011			`d=177775 -- !`
7012			`d=000012 -- ! add 077777,077777 -> n1z0v1c0; 177776`
7013			`d=177776 -- !`
7014			`d=000010 -- ! add 100000,077777 -> n1z0v0c0; 177777`
7015			`d=177777 -- !`
7016			`d=000012 -- ! add 000001,077777 -> n1z0v1c0; 100000`
7017			`d=100000 -- !`
7018			`d=000001 -- ! add 177777,077777 -> n0z0v0c1; 077776+C`
7019			`d=077776 -- !`
7020			`d=000010 -- ! add 077777,100000 -> n1z0v0c1; 177777+C`
7021			`d=177777 -- !`
7022			`d=000007 -- ! add 100000,100000 -> n0z1v1c1; 000000+C`
7023			`d=000000 -- !`
7024			`d=000003 -- ! add 100001,100000 -> n0z0v1c1; 000001+C`
7025			`d=000001 -- !`
7026			`d=000010 -- ! add 000001,100000 -> n1z0v0c0; 100001`
7027			`d=100001 -- !`
7028			`d=000003 -- ! add 177777,100000 -> n0z0v1c1; 077777+C`
7029			`d=077777 -- !`
7030			`d=000010 -- ! add 000000,177777 -> n1z0v0c0; 177777`
7031			`d=177777 -- !`
7032			`d=000005 -- ! add 000001,177777 -> n0z1v0c1; 000000+C`
7033			`d=000000 -- !`
7034			`d=000011 -- ! add 177777,177777 -> n1z0v0c1; 177776+C`
7035			`d=177776 -- !`
7036			`#--------`
7037			`C Exec test 46.19r: SUB - reg`
7038			`#`
7039			`wal 013246 -- setup test instructions:`
7040			`bwm 2`
7041			`000241 -- ccmov= clc`
7042			`160405 -- iut= sub r4,r5`
7043			`wr0 177776 -- r0=177776`
7044			`wr1 000023 -- r1=23 (19.)`
7045			`wr2 036000 -- r2=36000`
7046			`wr3 037000 -- r3=37000`
7047			`wr4 000000 -- r4=0`
7048			`wr5 000000 -- r5=0`
7049			`wsp 001400 -- sp=1400`
7050			`stapc 013240 -- start @ 13240 (2op reg)`
7051			`wtgo`
7052			`rpc d=013262 -- ! pc=halt`
7053			`rr1 d=000000 -- ! r1=0 (Note: C=1 if src > dst unsigned)`
7054			`wal 037000 -- check result area (Note: V=1 if s xor d and r eq s)`
7055			`brm 38`
7056			`d=000004 -- ! sub 000000,000000 -> n0z1v0c0; 000000`
7057			`d=000000 -- !`
7058			`d=000011 -- ! sub 000001,000000 -> n1z0v0c1; 177777+C`
7059			`d=177777 -- !`
7060			`d=000001 -- ! sub 177777,000000 -> n0z0v0c1; 000001+C`
7061			`d=000001 -- !`
7062			`d=000000 -- ! sub 000000,000001 -> n0z0v0c0; 000001`
7063			`d=000001 -- !`
7064			`d=000004 -- ! sub 000001,000001 -> n0z1v0c0; 000000`
7065			`d=000000 -- !`
7066			`d=000001 -- ! sub 177777,000001 -> n0z0v0c1; 000002+C`
7067			`d=000002 -- !`
7068			`d=000000 -- ! sub 077776,077777 -> n0z0v0c0; 000001`
7069			`d=000001 -- !`
7070			`d=000004 -- ! sub 077777,077777 -> n0z1v0c0; 000000`
7071			`d=000000 -- !`
7072			`d=000013 -- ! sub 100000,077777 -> n1z0v1c1; 177777+C`
7073			`d=177777 -- !`
7074			`d=000000 -- ! sub 000001,077777 -> n0z0v0c0; 077776`
7075			`d=077776 -- !`
7076			`d=000013 -- ! sub 177777,077777 -> n1z0v1c1; 100000+C`
7077			`d=100000 -- !`
7078			`d=000002 -- ! sub 077777,100000 -> n0z0v1c0; 000001`
7079			`d=000001 -- !`
7080			`d=000004 -- ! sub 100000,100000 -> n0z1v0c0; 000000`
7081			`d=000000 -- !`
7082			`d=000011 -- ! sub 100001,100000 -> n1z0v0c1; 177777+C`
7083			`d=177777 -- !`
7084			`d=000002 -- ! sub 000001,100000 -> n0z0v1c0; 077777`
7085			`d=077777 -- !`
7086			`d=000011 -- ! sub 177777,100000 -> n1z0v0c1: 100001+C`
7087			`d=100001 -- !`
7088			`d=000010 -- ! sub 000000,177777 -> n1z0v0c0; 177777`
7089			`d=177777 -- !`
7090			`d=000010 -- ! sub 000001,177777 -> n1z0v0c0; 177776`
7091			`d=177776 -- !`
7092			`d=000004 -- ! sub 177777,177777 -> n0z1v0c0; 000000`
7093			`d=000000 -- !`
7094			`#`
7095			`C Exec test 46.20r: SWAP - reg`
7096			`#`
7097			`wal 036000 -- setup test vector: for swap`
7098			`bwm 9`
7099			`000000 -- swap 000000`
7100			`000001 -- swap 000001`
7101			`000200 -- swap 000200`
7102			`000400 -- swap 000400`
7103			`100000 -- swap 100000`
7104			`000401 -- swap 000401`
7105			`000600 -- swap 000600`
7106			`100001 -- swap 100001`
7107			`100200 -- swap 100200`
7108			`wal 013204 -- setup test instructions:`
7109			`bwm 2`
7110			`000241 -- ccmov= clc`
7111			`000305 -- iut= swap r5`
7112			`wr0 177776 -- r0=177776`
7113			`wr1 000011 -- r1=11 (9.)`
7114			`wr2 036000 -- r2=36000`
7115			`wr3 037000 -- r3=37000`
7116			`wr4 000000 -- r4=0`
7117			`wr5 000000 -- r5=0`
7118			`wsp 001400 -- sp=1400`
7119			`stapc 013200 -- start @ 13200 (1op reg)`
7120			`wtgo`
7121			`rpc d=013220 -- ! pc=halt`
7122			`rr1 d=000000 -- ! r1=0`
7123			`wal 037000 -- check result area (Note: N,Z from lsb of result)`
7124			`brm 18`
7125			`d=000004 -- ! swap 000000 -> n0z1v0c0; 000000`
7126			`d=000000 -- !`
7127			`d=000004 -- ! swap 000001 -> n0z1v0c0; 000400`
7128			`d=000400 -- !`
7129			`d=000004 -- ! swap 000200 -> n0z1v0c0; 100000`
7130			`d=100000 -- !`
7131			`d=000000 -- ! swap 000400 -> n0z0v0c0; 000001`
7132			`d=000001 -- !`
7133			`d=000010 -- ! swap 100000 -> n1z0v0c0; 000200`
7134			`d=000200 -- !`
7135			`d=000000 -- ! swap 000401 -> n0z0v0c0; 000401`
7136			`d=000401 -- !`
7137			`d=000000 -- ! swap 000600 -> n0z0v0c0; 100001`
7138			`d=100001 -- !`
7139			`d=000010 -- ! swap 100001 -> n1z0v0c0; 000600`
7140			`d=000600 -- !`
7141			`d=000010 -- ! swap 100200 -> n1z0v0c0; 100200`
7142			`d=100200 -- !`
7143			`#--------`
7144			`C Exec code 46 pass 2 (systematic result+cc test of 1+2op instructions; byte)`
7145			`C Exec test 46.1br: COMB - reg`
7146			`#`
7147			`wal 036000 -- setup test vector: for com,inc,dec,neg,adc,sbc,tst (b)`
7148			`bwm 5`
7149			`000000 -- comb 000000`
7150			`000001 -- comb 000001`
7151			`000177 -- comb 000177`
7152			`000200 -- comb 000200`
7153			`000377 -- comb 000377`
7154			`wal 013204 -- setup test instructions:`
7155			`bwm 2`
7156			`000241 -- ccmov= clc`
7157			`105105 -- iut= comb r5`
7158			`wr0 177776 -- r0=177776`
7159			`wr1 000005 -- r1=5`
7160			`wr2 036000 -- r2=36000`
7161			`wr3 037000 -- r3=37000`
7162			`wr4 000000 -- r4=0`
7163			`wr5 000000 -- r5=0`
7164			`wsp 001400 -- sp=1400`
7165			`stapc 013200 -- start @ 13200 (1op reg)`
7166			`wtgo`
7167			`rpc d=013220 -- ! pc=halt`
7168			`rr1 d=000000 -- ! r1=0`
7169			`wal 037000 -- check result area`
7170			`brm 10`
7171			`d=000011 -- ! comb 000000 -> n1z0v0c1; 000377`
7172			`d=000377 -- !`
7173			`d=000011 -- ! comb 000001 -> n1z0v0c1; 000376`
7174			`d=000376 -- !`
7175			`d=000011 -- ! comb 000177 -> n1z0v0c1; 000200`
7176			`d=000200 -- !`
7177			`d=000001 -- ! comb 000200 -> n0z0v0c1; 000177`
7178			`d=000177 -- !`
7179			`d=000005 -- ! comb 000377 -> n0z1v0c1; 000000`
7180			`d=000000 -- !`
7181			`#--------`
7182			`C Exec test 46.1bm: COMB - mem`
7183			`#`
7184			`wal 013224 -- setup test instructions:`
7185			`bwm 2`
7186			`000241 -- ccmov= clc`
7187			`105115 -- iut= comb (r5)`
7188			`wr0 177776 -- r0=177776`
7189			`wr1 000005 -- r1=5`
7190			`wr2 036000 -- r2=36000`
7191			`wr3 037000 -- r3=37000`
7192			`wr4 001400 -- r4=1400`
7193			`wr5 001402 -- r5=1402`
7194			`wsp 001400 -- sp=1400`
7195			`stapc 013220 -- start @ 13220 (1op mem)`
7196			`wtgo`
7197			`rpc d=013240 -- ! pc=halt`
7198			`rr1 d=000000 -- ! r1=0`
7199			`wal 037000 -- check result area`
7200			`brm 10`
7201			`d=000011 -- ! comb 000000 -> n1z0v0c1; 000377`
7202			`d=000377 -- !`
7203			`d=000011 -- ! comb 000001 -> n1z0v0c1; 000376`
7204			`d=000376 -- !`
7205			`d=000011 -- ! comb 000177 -> n1z0v0c1; 000200`
7206			`d=000200 -- !`
7207			`d=000001 -- ! comb 000200 -> n0z0v0c1; 000177`
7208			`d=000177 -- !`
7209			`d=000005 -- ! comb 000377 -> n0z1v0c1; 000000`
7210			`d=000000 -- !`
7211			`#--------`
7212			`C Exec test 46.2brc0: INCB - reg,C=0`
7213			`#`
7214			`wal 013204 -- setup test instructions:`
7215			`bwm 2`
7216			`000241 -- ccmov= clc`
7217			`105205 -- iut= incb r5`
7218			`wr0 177776 -- r0=177776`
7219			`wr1 000005 -- r1=5`
7220			`wr2 036000 -- r2=36000`
7221			`wr3 037000 -- r3=37000`
7222			`wr4 000000 -- r4=0`
7223			`wr5 000000 -- r5=0`
7224			`wsp 001400 -- sp=1400`
7225			`stapc 013200 -- start @ 13200 (1op reg)`
7226			`wtgo`
7227			`rpc d=013220 -- ! pc=halt`
7228			`rr1 d=000000 -- ! r1=0`
7229			`wal 037000 -- check result area`
7230			`brm 10`
7231			`d=000000 -- ! incb 000000 -> n0z0v0c0; 000001`
7232			`d=000001 -- !`
7233			`d=000000 -- ! incb 000001 -> n0z0v0c0; 000002`
7234			`d=000002 -- !`
7235			`d=000012 -- ! incb 000177 -> n1z0v1c0; 000200`
7236			`d=000200 -- !`
7237			`d=000010 -- ! incb 000200 -> n1z0v0c0; 000201`
7238			`d=000201 -- !`
7239			`d=000004 -- ! incb 000377 -> n0z1v0c0; 000000`
7240			`d=000000 -- !`
7241			`#--------`
7242			`C Exec test 46.2brc1: INCB - reg,C=1`
7243			`#`
7244			`wal 013204 -- setup test instructions:`
7245			`bwm 2`
7246			`000261 -- ccmov= sec`
7247			`105205 -- iut= incb r5`
7248			`wr0 177776 -- r0=177776`
7249			`wr1 000005 -- r1=5`
7250			`wr2 036000 -- r2=36000`
7251			`wr3 037000 -- r3=37000`
7252			`wr4 000000 -- r4=0`
7253			`wr5 000000 -- r5=0`
7254			`wsp 001400 -- sp=1400`
7255			`stapc 013200 -- start @ 13200 (1op reg)`
7256			`wtgo`
7257			`rpc d=013220 -- ! pc=halt`
7258			`rr1 d=000000 -- ! r1=0`
7259			`wal 037000 -- check result area`
7260			`brm 10`
7261			`d=000001 -- ! incb 000000 -> n0z0v0c1; 000001`
7262			`d=000001 -- !`
7263			`d=000001 -- ! incb 000001 -> n0z0v0c1; 000002`
7264			`d=000002 -- !`
7265			`d=000013 -- ! incb 000177 -> n1z0v1c1; 000200`
7266			`d=000200 -- !`
7267			`d=000011 -- ! incb 000200 -> n1z0v0c1; 000201`
7268			`d=000201 -- !`
7269			`d=000005 -- ! incb 000377 -> n0z1v0c1; 000000`
7270			`d=000000 -- !`
7271			`#--------`
7272			`C Exec test 46.3brc0: DECB - reg,C=0`
7273			`#`
7274			`wal 013204 -- setup test instructions:`
7275			`bwm 2`
7276			`000241 -- ccmov= clc`
7277			`105305 -- iut= decb r5`
7278			`wr0 177776 -- r0=177776`
7279			`wr1 000005 -- r1=5`
7280			`wr2 036000 -- r2=36000`
7281			`wr3 037000 -- r3=37000`
7282			`wr4 000000 -- r4=0`
7283			`wr5 000000 -- r5=0`
7284			`wsp 001400 -- sp=1400`
7285			`stapc 013200 -- start @ 13200 (1op reg)`
7286			`wtgo`
7287			`rpc d=013220 -- ! pc=halt`
7288			`rr1 d=000000 -- ! r1=0`
7289			`wal 037000 -- check result area`
7290			`brm 10`
7291			`d=000010 -- ! decb 000000 -> n1z0v0c0; 000377`
7292			`d=000377 -- !`
7293			`d=000004 -- ! decb 000001 -> n0z1v0c0; 000000`
7294			`d=000000 -- !`
7295			`d=000000 -- ! decb 000177 -> n0z0v0c0; 000176`
7296			`d=000176 -- !`
7297			`d=000002 -- ! decb 000200 -> n0z0v1c0; 000177`
7298			`d=000177 -- !`
7299			`d=000010 -- ! decb 000377 -> n1z0v0c0; 000376`
7300			`d=000376 -- !`
7301			`#--------`
7302			`C Exec test 46.3brc1: DECB - reg,C=1`
7303			`#`
7304			`wal 013204 -- setup test instructions:`
7305			`bwm 2`
7306			`000261 -- ccmov= sec`
7307			`105305 -- iut= decb r5`
7308			`wr0 177776 -- r0=177776`
7309			`wr1 000005 -- r1=5`
7310			`wr2 036000 -- r2=36000`
7311			`wr3 037000 -- r3=37000`
7312			`wr4 000000 -- r4=0`
7313			`wr5 000000 -- r5=0`
7314			`wsp 001400 -- sp=1400`
7315			`stapc 013200 -- start @ 13200 (1op reg)`
7316			`wtgo`
7317			`rpc d=013220 -- ! pc=halt`
7318			`rr1 d=000000 -- ! r1=0`
7319			`wal 037000 -- check result area`
7320			`brm 10`
7321			`d=000011 -- ! decb 000000 -> n1z0v0c1; 000377`
7322			`d=000377 -- !`
7323			`d=000005 -- ! decb 000001 -> n0z1v0c1; 000000`
7324			`d=000000 -- !`
7325			`d=000001 -- ! decb 000177 -> n0z0v0c1; 000176`
7326			`d=000176 -- !`
7327			`d=000003 -- ! decb 000200 -> n0z0v1c1; 000177`
7328			`d=000177 -- !`
7329			`d=000011 -- ! decb 000377 -> n1z0v0c1; 000376`
7330			`d=000376 -- !`
7331			`#--------`
7332			`C Exec test 46.4br: NEGB - reg`
7333			`#`
7334			`wal 013204 -- setup test instructions:`
7335			`bwm 2`
7336			`000241 -- ccmov= clc`
7337			`105405 -- iut= negb r5`
7338			`wr0 177776 -- r0=177776`
7339			`wr1 000005 -- r1=5`
7340			`wr2 036000 -- r2=36000`
7341			`wr3 037000 -- r3=37000`
7342			`wr4 000000 -- r4=0`
7343			`wr5 000000 -- r5=0`
7344			`wsp 001400 -- sp=1400`
7345			`stapc 013200 -- start @ 13200 (1op reg)`
7346			`wtgo`
7347			`rpc d=013220 -- ! pc=halt`
7348			`rr1 d=000000 -- ! r1=0`
7349			`wal 037000 -- check result area`
7350			`brm 10`
7351			`d=000004 -- ! negb 000000 -> n0z1v0c0; 000000`
7352			`d=000000 -- !`
7353			`d=000011 -- ! negb 000001 -> n1z0v0c1; 000377`
7354			`d=000377 -- !`
7355			`d=000011 -- ! negb 000177 -> n1z0v0c1; 000201`
7356			`d=000201 -- !`
7357			`d=000013 -- ! negb 000200 -> n1z0v1c1; 000200`
7358			`d=000200 -- !`
7359			`d=000001 -- ! negb 000377 -> n0z0v0c1; 000001`
7360			`d=000001 -- !`
7361			`#--------`
7362			`C Exec test 46.5brc0: ADCB - reg,C=0`
7363			`#`
7364			`wal 013204 -- setup test instructions:`
7365			`bwm 2`
7366			`000241 -- ccmov= clc`
7367			`105505 -- iut= adcb r5`
7368			`wr0 177776 -- r0=177776`
7369			`wr1 000005 -- r1=5`
7370			`wr2 036000 -- r2=36000`
7371			`wr3 037000 -- r3=37000`
7372			`wr4 000000 -- r4=0`
7373			`wr5 000000 -- r5=0`
7374			`wsp 001400 -- sp=1400`
7375			`stapc 013200 -- start @ 13200 (1op reg)`
7376			`wtgo`
7377			`rpc d=013220 -- ! pc=halt`
7378			`rr1 d=000000 -- ! r1=0`
7379			`wal 037000 -- check result area`
7380			`brm 10`
7381			`d=000004 -- ! adcb 000000 -> n0z1v0c0; 000000`
7382			`d=000000 -- !`
7383			`d=000000 -- ! adcb 000001 -> n0z0v0c0; 000001`
7384			`d=000001 -- !`
7385			`d=000000 -- ! adcb 000177 -> n0z0v0c0; 000177`
7386			`d=000177 -- !`
7387			`d=000010 -- ! adcb 000200 -> n1z0v0c0; 000200`
7388			`d=000200 -- !`
7389			`d=000010 -- ! adcb 000377 -> n1z0v0c0; 000377`
7390			`d=000377 -- !`
7391			`#--------`
7392			`C Exec test 46.5brc1: ADCB - reg,C=1`
7393			`#`
7394			`wal 013204 -- setup test instructions:`
7395			`bwm 2`
7396			`000261 -- ccmov= sec`
7397			`105505 -- iut= adcb r5`
7398			`wr0 177776 -- r0=177776`
7399			`wr1 000005 -- r1=5`
7400			`wr2 036000 -- r2=36000`
7401			`wr3 037000 -- r3=37000`
7402			`wr4 000000 -- r4=0`
7403			`wr5 000000 -- r5=0`
7404			`wsp 001400 -- sp=1400`
7405			`stapc 013200 -- start @ 13200 (1op reg)`
7406			`wtgo`
7407			`rpc d=013220 -- ! pc=halt`
7408			`rr1 d=000000 -- ! r1=0`
7409			`wal 037000 -- check result area`
7410			`brm 10`
7411			`d=000000 -- ! adcb 000000 -> n0z0v0c0; 000001`
7412			`d=000001 -- !`
7413			`d=000000 -- ! adcb 000001 -> n0z0v0c0; 000002`
7414			`d=000002 -- !`
7415			`d=000012 -- ! adcb 000177 -> n1z0v1c0; 000200`
7416			`d=000200 -- !`
7417			`d=000010 -- ! adcb 000200 -> n1z0v0c0; 000201`
7418			`d=000201 -- !`
7419			`d=000005 -- ! adcb 000377 -> n0z1v0c1; 000000`
7420			`d=000000 -- !`
7421			`#--------`
7422			`C Exec test 46.6brc0: SBCB - reg,C=0`
7423			`#`
7424			`wal 013204 -- setup test instructions:`
7425			`bwm 2`
7426			`000241 -- ccmov= clc`
7427			`105605 -- iut= sbcb r5`
7428			`wr0 177776 -- r0=177776`
7429			`wr1 000005 -- r1=5`
7430			`wr2 036000 -- r2=36000`
7431			`wr3 037000 -- r3=37000`
7432			`wr4 000000 -- r4=0`
7433			`wr5 000000 -- r5=0`
7434			`wsp 001400 -- sp=1400`
7435			`stapc 013200 -- start @ 13200 (1op reg)`
7436			`wtgo`
7437			`rpc d=013220 -- ! pc=halt`
7438			`rr1 d=000000 -- ! r1=0`
7439			`wal 037000 -- check result area`
7440			`brm 10`
7441			`d=000004 -- ! sbcb 000000 -> n0z1v0c0; 000000`
7442			`d=000000 -- !`
7443			`d=000000 -- ! sbcb 000001 -> n0z0v0c0; 000001`
7444			`d=000001 -- !`
7445			`d=000000 -- ! sbcb 000177 -> n0z0v0c0; 000177`
7446			`d=000177 -- !`
7447			`d=000010 -- ! sbcb 000200 -> n1z0v0c0; 000200`
7448			`d=000200 -- !`
7449			`d=000010 -- ! sbcb 000377 -> n1z0v0c0; 000377`
7450			`d=000377 -- !`
7451			`#--------`
7452			`C Exec test 46.6brc1: SBCB - reg,C=1`
7453			`#`
7454			`wal 013204 -- setup test instructions:`
7455			`bwm 2`
7456			`000261 -- ccmov= sec`
7457			`105605 -- iut= sbcb r5`
7458			`wr0 177776 -- r0=177776`
7459			`wr1 000005 -- r1=5`
7460			`wr2 036000 -- r2=36000`
7461			`wr3 037000 -- r3=37000`
7462			`wr4 000000 -- r4=0`
7463			`wr5 000000 -- r5=0`
7464			`wsp 001400 -- sp=1400`
7465			`stapc 013200 -- start @ 13200 (1op reg)`
7466			`wtgo`
7467			`rpc d=013220 -- ! pc=halt`
7468			`rr1 d=000000 -- ! r1=0`
7469			`wal 037000 -- check result area`
7470			`brm 10`
7471			`d=000011 -- ! sbcb 000000 -> n1z0v0c1; 000377`
7472			`d=000377 -- !`
7473			`d=000004 -- ! sbcb 000001 -> n0z1v0c0; 000000`
7474			`d=000000 -- !`
7475			`d=000000 -- ! sbcb 000177 -> n0z0v0c0; 000176`
7476			`d=000176 -- !`
7477			`d=000002 -- ! sbcb 000200 -> n0z0v1c0; 000177`
7478			`d=000177 -- !`
7479			`d=000010 -- ! sbcb 000377 -> n1z0v0c0; 000376`
7480			`d=000376 -- !`
7481			`#--------`
7482			`C Exec test 46.7br: TSTB - reg`
7483			`#`
7484			`wal 013204 -- setup test instructions:`
7485			`bwm 2`
7486			`000261 -- ccmov= sec`
7487			`105705 -- iut= tstb r5`
7488			`wr0 177776 -- r0=177776`
7489			`wr1 000005 -- r1=5`
7490			`wr2 036000 -- r2=36000`
7491			`wr3 037000 -- r3=37000`
7492			`wr4 000000 -- r4=0`
7493			`wr5 000000 -- r5=0`
7494			`wsp 001400 -- sp=1400`
7495			`stapc 013200 -- start @ 13200 (1op reg)`
7496			`wtgo`
7497			`rpc d=013220 -- ! pc=halt`
7498			`rr1 d=000000 -- ! r1=0`
7499			`wal 037000 -- check result area`
7500			`brm 10`
7501			`d=000004 -- ! tstb 000000 -> n0z1v0c0;`
7502			`d=000000 -- !`
7503			`d=000000 -- ! tstb 000001 -> n0z0v0c0;`
7504			`d=000001 -- !`
7505			`d=000000 -- ! tstb 000177 -> n0z0v0c0;`
7506			`d=000177 -- !`
7507			`d=000010 -- ! tstb 000200 -> n1z0v0c0;`
7508			`d=000200 -- !`
7509			`d=000010 -- ! tstb 000377 -> n1z0v0c0;`
7510			`d=000377 -- !`
7511			`#--------`
7512			`C Exec test 46.7bm: TSTB - mem`
7513			`#`
7514			`wal 013224 -- setup test instructions:`
7515			`bwm 2`
7516			`000261 -- ccmov= sec`
7517			`105715 -- iut= tstb (r5)`
7518			`wr0 177776 -- r0=177776`
7519			`wr1 000005 -- r1=5`
7520			`wr2 036000 -- r2=36000`
7521			`wr3 037000 -- r3=37000`
7522			`wr4 001400 -- r4=1400`
7523			`wr5 001402 -- r5=1402`
7524			`wsp 001400 -- sp=1400`
7525			`stapc 013220 -- start @ 13220 (1op mem)`
7526			`wtgo`
7527			`rpc d=013240 -- ! pc=halt`
7528			`rr1 d=000000 -- ! r1=0`
7529			`wal 037000 -- check result area`
7530			`brm 10`
7531			`d=000004 -- ! tstb 000000 -> n0z1v0c0;`
7532			`d=000000 -- !`
7533			`d=000000 -- ! tstb 000001 -> n0z0v0c0;`
7534			`d=000001 -- !`
7535			`d=000000 -- ! tstb 000177 -> n0z0v0c0;`
7536			`d=000177 -- !`
7537			`d=000010 -- ! tstb 000200 -> n1z0v0c0;`
7538			`d=000200 -- !`
7539			`d=000010 -- ! tstb 000377 -> n1z0v0c0;`
7540			`d=000377 -- !`
7541			`#--------`
7542			`C Exec test 46.8brc0: RORB - reg, C=0`
7543			`#`
7544			`wal 036000 -- setup test vector: for ror,rol,ars,asl (b)`
7545			`bwm 7`
7546			`000000 -- ror 000000`
7547			`000001 -- ror 000001`
7548			`000200 -- ror 000200`
7549			`000010 -- ror 000010`
7550			`000011 -- ror 000011`
7551			`000110 -- ror 000110`
7552			`000210 -- ror 000210`
7553			`wal 013204 -- setup test instructions:`
7554			`bwm 2`
7555			`000241 -- ccmov= clc`
7556			`106005 -- iut= rorb r5`
7557			`wr0 177776 -- r0=177776`
7558			`wr1 000007 -- r1=7`
7559			`wr2 036000 -- r2=36000`
7560			`wr3 037000 -- r3=37000`
7561			`wr4 000000 -- r4=0`
7562			`wr5 000000 -- r5=0`
7563			`wsp 001400 -- sp=1400`
7564			`stapc 013200 -- start @ 13200 (1op reg)`
7565			`wtgo`
7566			`rpc d=013220 -- ! pc=halt`
7567			`rr1 d=000000 -- ! r1=0`
7568			`wal 037000 -- check result area (Note: V = N xor C !)`
7569			`brm 14`
7570			`d=000004 -- ! rorb 000000 -> n0z1v0c0; 000000`
7571			`d=000000 -- !`
7572			`d=000007 -- ! rorb 000001 -> n0z1v1c1; 000000`
7573			`d=000000 -- !`
7574			`d=000000 -- ! rorb 000200 -> n0z0v0c0; 000100`
7575			`d=000100 -- !`
7576			`d=000000 -- ! rorb 000010 -> n0z0v0c0; 000004`
7577			`d=000004 -- !`
7578			`d=000003 -- ! rorb 000011 -> n0z0v1c1; 000004`
7579			`d=000004 -- !`
7580			`d=000000 -- ! rorb 000110 -> n0z0v0c0; 000044`
7581			`d=000044 -- !`
7582			`d=000000 -- ! rorb 000210 -> n0z0v0c0; 000104`
7583			`d=000104 -- !`
7584			`#--------`
7585			`C Exec test 46.8brc1: RORB - reg, C=1`
7586			`#`
7587			`wal 013204 -- setup test instructions:`
7588			`bwm 2`
7589			`000261 -- ccmov= sec`
7590			`106005 -- iut= rorb r5`
7591			`wr0 177776 -- r0=177776`
7592			`wr1 000007 -- r1=7`
7593			`wr2 036000 -- r2=36000`
7594			`wr3 037000 -- r3=37000`
7595			`wr4 000000 -- r4=0`
7596			`wr5 000000 -- r5=0`
7597			`wsp 001400 -- sp=1400`
7598			`stapc 013200 -- start @ 13200 (1op reg)`
7599			`wtgo`
7600			`rpc d=013220 -- ! pc=halt`
7601			`rr1 d=000000 -- ! r1=0`
7602			`wal 037000 -- check result area (Note: V = N xor C !)`
7603			`brm 14`
7604			`d=000012 -- ! rorb 000000 -> n1z0v1c0; 000200`
7605			`d=000200 -- !`
7606			`d=000011 -- ! rorb 000001 -> n1z0v0c1; 000200`
7607			`d=000200 -- !`
7608			`d=000012 -- ! rorb 000200 -> n1z0v1c0; 000300`
7609			`d=000300 -- !`
7610			`d=000012 -- ! rorb 000010 -> n1z0v1c0; 000204`
7611			`d=000204 -- !`
7612			`d=000011 -- ! rorb 000011 -> n1z0v0c1; 000204`
7613			`d=000204 -- !`
7614			`d=000012 -- ! rorb 000110 -> n1z0v1c0; 000244`
7615			`d=000244 -- !`
7616			`d=000012 -- ! rorb 000210 -> n1z0v1c0; 000304`
7617			`d=000304 -- !`
7618			`#--------`
7619			`C Exec test 46.9brc0: ROLB - reg, C=0`
7620			`#`
7621			`wal 013204 -- setup test instructions:`
7622			`bwm 2`
7623			`000241 -- ccmov= clc`
7624			`106105 -- iut= rolb r5`
7625			`wr0 177776 -- r0=177776`
7626			`wr1 000007 -- r1=7`
7627			`wr2 036000 -- r2=36000`
7628			`wr3 037000 -- r3=37000`
7629			`wr4 000000 -- r4=0`
7630			`wr5 000000 -- r5=0`
7631			`wsp 001400 -- sp=1400`
7632			`stapc 013200 -- start @ 13200 (1op reg)`
7633			`wtgo`
7634			`rpc d=013220 -- ! pc=halt`
7635			`rr1 d=000000 -- ! r1=0`
7636			`wal 037000 -- check result area (Note: V = N xor C !)`
7637			`brm 14`
7638			`d=000004 -- ! rolb 000000 -> n0z1v0c0; 000000`
7639			`d=000000 -- !`
7640			`d=000000 -- ! rolb 000001 -> n0z0v0c0; 000002`
7641			`d=000002 -- !`
7642			`d=000007 -- ! rolb 000200 -> n0z1v1c1; 000000`
7643			`d=000000 -- !`
7644			`d=000000 -- ! rolb 000010 -> n0z0v0c0; 000020`
7645			`d=000020 -- !`
7646			`d=000000 -- ! rolb 000011 -> n0z0v0c0; 000022`
7647			`d=000022 -- !`
7648			`d=000012 -- ! rolb 000110 -> n1z0v1c0; 000220`
7649			`d=000220 -- !`
7650			`d=000003 -- ! rolb 000210 -> n0z0v1c1; 000020`
7651			`d=000020 -- !`
7652			`#--------`
7653			`C Exec test 46.9brc1: ROLB - reg, C=1`
7654			`#`
7655			`wal 013204 -- setup test instructions:`
7656			`bwm 2`
7657			`000261 -- ccmov= sec`
7658			`106105 -- iut= rolb r5`
7659			`wr0 177776 -- r0=177776`
7660			`wr1 000007 -- r1=7`
7661			`wr2 036000 -- r2=36000`
7662			`wr3 037000 -- r3=37000`
7663			`wr4 000000 -- r4=0`
7664			`wr5 000000 -- r5=0`
7665			`wsp 001400 -- sp=1400`
7666			`stapc 013200 -- start @ 13200 (1op reg)`
7667			`wtgo`
7668			`rpc d=013220 -- ! pc=halt`
7669			`rr1 d=000000 -- ! r1=0`
7670			`wal 037000 -- check result area (Note: V = N xor C !)`
7671			`brm 14`
7672			`d=000000 -- ! rolb 000000 -> n0z0v0c0; 000001`
7673			`d=000001 -- !`
7674			`d=000000 -- ! rolb 000001 -> n0z0v0c0; 000003`
7675			`d=000003 -- !`
7676			`d=000003 -- ! rolb 000200 -> n0z0v1c1; 000001`
7677			`d=000001 -- !`
7678			`d=000000 -- ! rolb 000010 -> n0z0v0c0; 000021`
7679			`d=000021 -- !`
7680			`d=000000 -- ! rolb 000011 -> n0z0v0c0; 000023`
7681			`d=000023 -- !`
7682			`d=000012 -- ! rolb 000110 -> n1z0v1c0; 000221`
7683			`d=000221 -- !`
7684			`d=000003 -- ! rolb 000210 -> n0z0v1c1; 000021`
7685			`d=000021 -- !`
7686			`#--------`
7687			`C Exec test 46.10brc0: ASRB - reg, C=0`
7688			`#`
7689			`wal 013204 -- setup test instructions:`
7690			`bwm 2`
7691			`000241 -- ccmov= clc`
7692			`106205 -- iut= asrb r5`
7693			`wr0 177776 -- r0=177776`
7694			`wr1 000007 -- r1=7`
7695			`wr2 036000 -- r2=36000`
7696			`wr3 037000 -- r3=37000`
7697			`wr4 000000 -- r4=0`
7698			`wr5 000000 -- r5=0`
7699			`wsp 001400 -- sp=1400`
7700			`stapc 013200 -- start @ 13200 (1op reg)`
7701			`wtgo`
7702			`rpc d=013220 -- ! pc=halt`
7703			`rr1 d=000000 -- ! r1=0`
7704			`wal 037000 -- check result area (Note: V = N xor C !)`
7705			`brm 14`
7706			`d=000004 -- ! asrb 000000 -> n0z1v0c0; 000000`
7707			`d=000000 -- !`
7708			`d=000007 -- ! asrb 000001 -> n0z1v1c1; 000000`
7709			`d=000000 -- !`
7710			`d=000012 -- ! asrb 000200 -> n1z0v1c0; 000300`
7711			`d=000300 -- !`
7712			`d=000000 -- ! asrb 000010 -> n0z0v0c0; 000004`
7713			`d=000004 -- !`
7714			`d=000003 -- ! asrb 000011 -> n0z0v1c1; 000004`
7715			`d=000004 -- !`
7716			`d=000000 -- ! asrb 000110 -> n0z0v0c0; 000044`
7717			`d=000044 -- !`
7718			`d=000012 -- ! asrb 000210 -> n1z0v1c0; 000304`
7719			`d=000304 -- !`
7720			`#--------`
7721			`C Exec test 46.10brc1: ASRB - reg, C=1`
7722			`#`
7723			`wal 013204 -- setup test instructions:`
7724			`bwm 2`
7725			`000261 -- ccmov= sec`
7726			`106205 -- iut= asrb r5`
7727			`wr0 177776 -- r0=177776`
7728			`wr1 000007 -- r1=7`
7729			`wr2 036000 -- r2=36000`
7730			`wr3 037000 -- r3=37000`
7731			`wr4 000000 -- r4=0`
7732			`wr5 000000 -- r5=0`
7733			`wsp 001400 -- sp=1400`
7734			`stapc 013200 -- start @ 13200 (1op reg)`
7735			`wtgo`
7736			`rpc d=013220 -- ! pc=halt`
7737			`rr1 d=000000 -- ! r1=0`
7738			`wal 037000 -- check result area (Note: V = N xor C !)`
7739			`brm 14`
7740			`d=000004 -- ! asrb 000000 -> n0z1v0c0; 000000`
7741			`d=000000 -- !`
7742			`d=000007 -- ! asrb 000001 -> n0z1v1c1; 000000`
7743			`d=000000 -- !`
7744			`d=000012 -- ! asrb 000200 -> n1z0v1c0; 000300`
7745			`d=000300 -- !`
7746			`d=000000 -- ! asrb 000010 -> n0z0v0c0; 000004`
7747			`d=000004 -- !`
7748			`d=000003 -- ! asrb 000011 -> n0z0v1c1; 000004`
7749			`d=000004 -- !`
7750			`d=000000 -- ! asrb 000110 -> n0z0v0c0; 000044`
7751			`d=000044 -- !`
7752			`d=000012 -- ! asrb 000210 -> n1z0v1c0; 000304`
7753			`d=000304 -- !`
7754			`#--------`
7755			`C Exec test 46.11brc0: ASLB - reg, C=0`
7756			`#`
7757			`wal 013204 -- setup test instructions:`
7758			`bwm 2`
7759			`000241 -- ccmov= clc`
7760			`106305 -- iut= aslb r5`
7761			`wr0 177776 -- r0=177776`
7762			`wr1 000007 -- r1=7`
7763			`wr2 036000 -- r2=36000`
7764			`wr3 037000 -- r3=37000`
7765			`wr4 000000 -- r4=0`
7766			`wr5 000000 -- r5=0`
7767			`wsp 001400 -- sp=1400`
7768			`stapc 013200 -- start @ 13200 (1op reg)`
7769			`wtgo`
7770			`rpc d=013220 -- ! pc=halt`
7771			`rr1 d=000000 -- ! r1=0`
7772			`wal 037000 -- check result area (Note: V = N xor C !)`
7773			`brm 14`
7774			`d=000004 -- ! aslb 000000 -> n0z1v0c0; 000000`
7775			`d=000000 -- !`
7776			`d=000000 -- ! aslb 000001 -> n0z0v0c0; 000002`
7777			`d=000002 -- !`
7778			`d=000007 -- ! aslb 000200 -> n0z1v1c1; 000000`
7779			`d=000000 -- !`
7780			`d=000000 -- ! aslb 000010 -> n0z0v0c0; 000020`
7781			`d=000020 -- !`
7782			`d=000000 -- ! aslb 000011 -> n0z0v0c0; 000022`
7783			`d=000022 -- !`
7784			`d=000012 -- ! aslb 000110 -> n1z0v1c0; 000220`
7785			`d=000220 -- !`
7786			`d=000003 -- ! aslb 000210 -> n0z0v1c1; 000020`
7787			`d=000020 -- !`
7788			`#--------`
7789			`C Exec test 46.11brc1: ASLB - reg, C=1`
7790			`#`
7791			`wal 013204 -- setup test instructions:`
7792			`bwm 2`
7793			`000261 -- ccmov= sec`
7794			`106305 -- iut= aslb r5`
7795			`wr0 177776 -- r0=177776`
7796			`wr1 000007 -- r1=7`
7797			`wr2 036000 -- r2=36000`
7798			`wr3 037000 -- r3=37000`
7799			`wr4 000000 -- r4=0`
7800			`wr5 000000 -- r5=0`
7801			`wsp 001400 -- sp=1400`
7802			`stapc 013200 -- start @ 13200 (1op reg)`
7803			`wtgo`
7804			`rpc d=013220 -- ! pc=halt`
7805			`rr1 d=000000 -- ! r1=0`
7806			`wal 037000 -- check result area (Note: V = N xor C !)`
7807			`brm 14`
7808			`d=000004 -- ! aslb 000000 -> n0z1v0c0; 000000`
7809			`d=000000 -- !`
7810			`d=000000 -- ! aslb 000001 -> n0z0v0c0; 000002`
7811			`d=000002 -- !`
7812			`d=000007 -- ! aslb 000200 -> n0z1v1c1; 000000`
7813			`d=000000 -- !`
7814			`d=000000 -- ! aslb 000010 -> n0z0v0c0; 000020`
7815			`d=000020 -- !`
7816			`d=000000 -- ! aslb 000011 -> n0z0v0c0; 000022`
7817			`d=000022 -- !`
7818			`d=000012 -- ! aslb 000110 -> n1z0v1c0; 000220`
7819			`d=000220 -- !`
7820			`d=000003 -- ! aslb 000210 -> n0z0v1c1; 000020`
7821			`d=000020 -- !`
7822			`#--------`
7823			`C Exec test 46.12brc0: MOVB - reg, C=0`
7824			`#`
7825			`wal 036000 -- setup test vector: for mov`
7826			`bwm 6`
7827			`000000 -- movb 000000,000000`
7828			`000000 --`
7829			`000001 -- movb 000001,000000`
7830			`000000 --`
7831			`000200 -- movb 000200,000000`
7832			`000000 --`
7833			`wal 013246 -- setup test instructions:`
7834			`bwm 2`
7835			`000241 -- ccmov= clc`
7836			`110405 -- iut= movb r4,r5`
7837			`wr0 177776 -- r0=177776`
7838			`wr1 000003 -- r1=3`
7839			`wr2 036000 -- r2=36000`
7840			`wr3 037000 -- r3=37000`
7841			`wr4 000000 -- r4=0`
7842			`wr5 000000 -- r5=0`
7843			`wsp 001400 -- sp=1400`
7844			`stapc 013240 -- start @ 13240 (2op reg)`
7845			`wtgo`
7846			`rpc d=013262 -- ! pc=halt`
7847			`rr1 d=000000 -- ! r1=0`
7848			`wal 037000 -- check result area`
7849			`brm 6`
7850			`d=000004 -- ! movb 000000,000000 -> n0z1v0c0; 000000`
7851			`d=000000 -- !`
7852			`d=000000 -- ! movb 000001,000000 -> n0z0v0c0; 000001`
7853			`d=000001 -- !`
7854			`d=000010 -- ! movb 000200,000000 -> n1z0v0c0; 177600`
7855			`d=177600 -- !`
7856			`#--------`
7857			`C Exec test 46.12brc1: MOVB - reg, C=1`
7858			`#`
7859			`wal 013246 -- setup test instructions:`
7860			`bwm 2`
7861			`000261 -- ccmov= sec`
7862			`110405 -- iut= movb r4,r5`
7863			`wr0 177776 -- r0=177776`
7864			`wr1 000003 -- r1=3`
7865			`wr2 036000 -- r2=36000`
7866			`wr3 037000 -- r3=37000`
7867			`wr4 000000 -- r4=0`
7868			`wr5 000000 -- r5=0`
7869			`wsp 001400 -- sp=1400`
7870			`stapc 013240 -- start @ 13240 (2op reg)`
7871			`wtgo`
7872			`rpc d=013262 -- ! pc=halt`
7873			`rr1 d=000000 -- ! r1=0`
7874			`wal 037000 -- check result area`
7875			`brm 6`
7876			`d=000005 -- ! movb 000000,000000 -> n0z1v0c1; 000000`
7877			`d=000000 -- !`
7878			`d=000001 -- ! movb 000001,000000 -> n0z0v0c1; 000001`
7879			`d=000001 -- !`
7880			`d=000011 -- ! movb 000200,000000 -> n1z0v0c1; 177600`
7881			`d=177600 -- !`
7882			`#--------`
7883			`C Exec test 46.12bmc0: MOVB - mem, C=0`
7884			`#`
7885			`wal 013276 -- setup test instructions:`
7886			`bwm 2`
7887			`000241 -- ccmov= clc`
7888			`111415 -- iut= movb (r4),(r5)`
7889			`wr0 177776 -- r0=177776`
7890			`wr1 000003 -- r1=3`
7891			`wr2 036000 -- r2=36000`
7892			`wr3 037000 -- r3=37000`
7893			`wr4 001400 -- r4=1400`
7894			`wr5 001402 -- r5=1402`
7895			`wsp 001400 -- sp=1400`
7896			`stapc 013270 -- start @ 13270 (2op mem)`
7897			`wtgo`
7898			`rpc d=013312 -- ! pc=halt`
7899			`rr1 d=000000 -- ! r1=0`
7900			`wal 037000 -- check result area`
7901			`brm 6`
7902			`d=000004 -- ! movb 000000,000000 -> n0z1v0c0; 000000`
7903			`d=000000 -- !`
7904			`d=000000 -- ! movb 000001,000000 -> n0z0v0c0; 000001`
7905			`d=000001 -- !`
7906			`d=000010 -- ! movb 000200,000000 -> n1z0v0c0; 000200`
7907			`d=000200 -- !`
7908			`#--------`
7909			`C Exec test 46.13brc0: BITB - reg, C=0`
7910			`#`
7911			`wal 036000 -- setup test vector: for bit,bic,bis (b)`
7912			`bwm 12`
7913			`000000 -- bitb 000000,000000`
7914			`000000 --`
7915			`000003 -- bitb 000003,000000`
7916			`000000 --`
7917			`000003 -- bitb 000003,000006`
7918			`000006 --`
7919			`000003 -- bitb 000003,000014`
7920			`000014 --`
7921			`000300 -- bitb 000300,000140`
7922			`000140 --`
7923			`000300 -- bitb 000300,000300`
7924			`000300 --`
7925			`wal 013246 -- setup test instructions:`
7926			`bwm 2`
7927			`000241 -- ccmov= clc`
7928			`130405 -- iut= bitb r4,r5`
7929			`wr0 177776 -- r0=177776`
7930			`wr1 000006 -- r1=6`
7931			`wr2 036000 -- r2=36000`
7932			`wr3 037000 -- r3=37000`
7933			`wr4 000000 -- r4=0`
7934			`wr5 000000 -- r5=0`
7935			`wsp 001400 -- sp=1400`
7936			`stapc 013240 -- start @ 13240 (2op reg)`
7937			`wtgo`
7938			`rpc d=013262 -- ! pc=halt`
7939			`rr1 d=000000 -- ! r1=0`
7940			`wal 037000 -- check result area`
7941			`brm 12`
7942			`d=000004 -- ! bitb 000000,000000 -> n0z1v0c0; (000000)`
7943			`d=000000 -- !`
7944			`d=000004 -- ! bitb 000003,000000 -> n0z1v0c0; (000000)`
7945			`d=000000 -- !`
7946			`d=000000 -- ! bitb 000003,000006 -> n0z0v0c0; (000002)`
7947			`d=000006 -- !`
7948			`d=000004 -- ! bitb 000003,000014 -> n0z1v0c0; (000000)`
7949			`d=000014 -- !`
7950			`d=000000 -- ! bitb 000300,000140 -> n0z0v0c0; (000100)`
7951			`d=000140 -- !`
7952			`d=000010 -- ! bitb 000300,000300 -> n1z0v0c0; (000300)`
7953			`d=000300 -- !`
7954			`#--------`
7955			`C Exec test 46.13brc1: BITB - reg, C=1`
7956			`#`
7957			`wal 013246 -- setup test instructions:`
7958			`bwm 2`
7959			`000261 -- ccmov= sec`
7960			`130405 -- iut= bitb r4,r5`
7961			`wr0 177776 -- r0=177776`
7962			`wr1 000006 -- r1=6`
7963			`wr2 036000 -- r2=36000`
7964			`wr3 037000 -- r3=37000`
7965			`wr4 000000 -- r4=0`
7966			`wr5 000000 -- r5=0`
7967			`wsp 001400 -- sp=1400`
7968			`stapc 013240 -- start @ 13240 (2op reg)`
7969			`wtgo`
7970			`rpc d=013262 -- ! pc=halt`
7971			`rr1 d=000000 -- ! r1=0`
7972			`wal 037000 -- check result area`
7973			`brm 12`
7974			`d=000005 -- ! bitb 000000,000000 -> n0z1v0c1; (000000)`
7975			`d=000000 -- !`
7976			`d=000005 -- ! bitb 000003,000000 -> n0z1v0c1; (000000)`
7977			`d=000000 -- !`
7978			`d=000001 -- ! bitb 000003,000006 -> n0z0v0c1; (000002)`
7979			`d=000006 -- !`
7980			`d=000005 -- ! bitb 000003,000014 -> n0z1v0c1; (000000)`
7981			`d=000014 -- !`
7982			`d=000001 -- ! bitb 000300,000140 -> n0z0v0c1; (000100)`
7983			`d=000140 -- !`
7984			`d=000011 -- ! bitb 000300,000300 -> n1z0v0c1; (000300)`
7985			`d=000300 -- !`
7986			`#--------`
7987			`C Exec test 46.13bmc0: BITB - mem, C=0`
7988			`#`
7989			`wal 013276 -- setup test instructions:`
7990			`bwm 2`
7991			`000241 -- ccmov= clc`
7992			`131415 -- iut= bitb (r4),(r5)`
7993			`wr0 177776 -- r0=177776`
7994			`wr1 000006 -- r1=6`
7995			`wr2 036000 -- r2=36000`
7996			`wr3 037000 -- r3=37000`
7997			`wr4 001400 -- r4=1400`
7998			`wr5 001402 -- r5=1402`
7999			`wsp 001400 -- sp=1400`
8000			`stapc 013270 -- start @ 13270 (2op mem)`
8001			`wtgo`
8002			`rpc d=013312 -- ! pc=halt`
8003			`rr1 d=000000 -- ! r1=0`
8004			`wal 037000 -- check result area`
8005			`brm 12`
8006			`d=000004 -- ! bitb 000000,000000 -> n0z1v0c0; (000000)`
8007			`d=000000 -- !`
8008			`d=000004 -- ! bitb 000003,000000 -> n0z1v0c0; (000000)`
8009			`d=000000 -- !`
8010			`d=000000 -- ! bitb 000003,000006 -> n0z0v0c0; (000002)`
8011			`d=000006 -- !`
8012			`d=000004 -- ! bitb 000003,000014 -> n0z1v0c0; (000000)`
8013			`d=000014 -- !`
8014			`d=000000 -- ! bitb 000300,000140 -> n0z0v0c0; (000100)`
8015			`d=000140 -- !`
8016			`d=000010 -- ! bitb 000300,000300 -> n1z0v0c0; (000300)`
8017			`d=000300 -- !`
8018			`#--------`
8019			`C Exec test 46.14brc0: BICB - reg, C=0`
8020			`#`
8021			`wal 013246 -- setup test instructions:`
8022			`bwm 2`
8023			`000241 -- ccmov= clc`
8024			`140405 -- iut= bicb r4,r5`
8025			`wr0 177776 -- r0=177776`
8026			`wr1 000006 -- r1=6`
8027			`wr2 036000 -- r2=36000`
8028			`wr3 037000 -- r3=37000`
8029			`wr4 000000 -- r4=0`
8030			`wr5 000000 -- r5=0`
8031			`wsp 001400 -- sp=1400`
8032			`stapc 013240 -- start @ 13240 (2op reg)`
8033			`wtgo`
8034			`rpc d=013262 -- ! pc=halt`
8035			`rr1 d=000000 -- ! r1=0`
8036			`wal 037000 -- check result area`
8037			`brm 12`
8038			`d=000004 -- ! bicb 000000,000000 -> n0z1v0c0; 000000`
8039			`d=000000 -- !`
8040			`d=000004 -- ! bicb 000003,000000 -> n0z1v0c0; 000000`
8041			`d=000000 -- !`
8042			`d=000000 -- ! bicb 000003,000006 -> n0z0v0c0; 000004`
8043			`d=000004 -- !`
8044			`d=000000 -- ! bicb 000003,000014 -> n0z0v0c0; 000014`
8045			`d=000014 -- !`
8046			`d=000000 -- ! bicb 000300,000140 -> n0z0v0c0; 000040`
8047			`d=000040 -- !`
8048			`d=000004 -- ! bicb 000300,000300 -> n0z1v0c0; 000000`
8049			`d=000000 -- !`
8050			`#--------`
8051			`C Exec test 46.14brc1: BICB - reg, C=1`
8052			`#`
8053			`wal 013246 -- setup test instructions:`
8054			`bwm 2`
8055			`000261 -- ccmov= sec`
8056			`140405 -- iut= bicb r4,r5`
8057			`wr0 177776 -- r0=177776`
8058			`wr1 000006 -- r1=6`
8059			`wr2 036000 -- r2=36000`
8060			`wr3 037000 -- r3=37000`
8061			`wr4 000000 -- r4=0`
8062			`wr5 000000 -- r5=0`
8063			`wsp 001400 -- sp=1400`
8064			`stapc 013240 -- start @ 13240 (2op reg)`
8065			`wtgo`
8066			`rpc d=013262 -- ! pc=halt`
8067			`rr1 d=000000 -- ! r1=0`
8068			`wal 037000 -- check result area`
8069			`brm 12`
8070			`d=000005 -- ! bicb 000000,000000 -> n0z1v0c1; 000000`
8071			`d=000000 -- !`
8072			`d=000005 -- ! bicb 000003,000000 -> n0z1v0c1; 000000`
8073			`d=000000 -- !`
8074			`d=000001 -- ! bicb 000003,000006 -> n0z0v0c1; 000004`
8075			`d=000004 -- !`
8076			`d=000001 -- ! bicb 000003,000014 -> n0z0v0c1; 000014`
8077			`d=000014 -- !`
8078			`d=000001 -- ! bicb 000300,000140 -> n0z0v0c1; 000040`
8079			`d=000040 -- !`
8080			`d=000005 -- ! bicb 000300,000300 -> n0z1v0c1; 000000`
8081			`d=000000 -- !`
8082			`#--------`
8083			`C Exec test 46.14bmrc0: BICB - mem, C=0`
8084			`#`
8085			`wal 013276 -- setup test instructions:`
8086			`bwm 2`
8087			`000241 -- ccmov= clc`
8088			`141415 -- iut= bicb (r4),(r5)`
8089			`wr0 177776 -- r0=177776`
8090			`wr1 000006 -- r1=6`
8091			`wr2 036000 -- r2=36000`
8092			`wr3 037000 -- r3=37000`
8093			`wr4 001400 -- r4=1400`
8094			`wr5 001402 -- r5=1402`
8095			`wsp 001400 -- sp=1400`
8096			`stapc 013270 -- start @ 13270 (2op mem)`
8097			`wtgo`
8098			`rpc d=013312 -- ! pc=halt`
8099			`rr1 d=000000 -- ! r1=0`
8100			`wal 037000 -- check result area`
8101			`brm 12`
8102			`d=000004 -- ! bicb 000000,000000 -> n0z1v0c0; 000000`
8103			`d=000000 -- !`
8104			`d=000004 -- ! bicb 000003,000000 -> n0z1v0c0; 000000`
8105			`d=000000 -- !`
8106			`d=000000 -- ! bicb 000003,000006 -> n0z0v0c0; 000004`
8107			`d=000004 -- !`
8108			`d=000000 -- ! bicb 000003,000014 -> n0z0v0c0; 000014`
8109			`d=000014 -- !`
8110			`d=000000 -- ! bicb 000300,000140 -> n0z0v0c0; 000040`
8111			`d=000040 -- !`
8112			`d=000004 -- ! bicb 000300,000300 -> n0z1v0c0; 000000`
8113			`d=000000 -- !`
8114			`#--------`
8115			`C Exec test 46.15brc0: BISB - reg, C=0`
8116			`#`
8117			`wal 013246 -- setup test instructions:`
8118			`bwm 2`
8119			`000241 -- ccmov= clc`
8120			`150405 -- iut= bisb r4,r5`
8121			`wr0 177776 -- r0=177776`
8122			`wr1 000006 -- r1=6`
8123			`wr2 036000 -- r2=36000`
8124			`wr3 037000 -- r3=37000`
8125			`wr4 000000 -- r4=0`
8126			`wr5 000000 -- r5=0`
8127			`wsp 001400 -- sp=1400`
8128			`stapc 013240 -- start @ 13240 (2op reg)`
8129			`wtgo`
8130			`rpc d=013262 -- ! pc=halt`
8131			`rr1 d=000000 -- ! r1=0`
8132			`wal 037000 -- check result area`
8133			`brm 12`
8134			`d=000004 -- ! bisb 000000,000000 -> n0z1v0c0; 000000`
8135			`d=000000 -- !`
8136			`d=000000 -- ! bisb 000003,000000 -> n0z0v0c0; 000003`
8137			`d=000003 -- !`
8138			`d=000000 -- ! bisb 000003,000006 -> n0z0v0c0; 000007`
8139			`d=000007 -- !`
8140			`d=000000 -- ! bisb 000003,000014 -> n0z0v0c0; 000017`
8141			`d=000017 -- !`
8142			`d=000010 -- ! bisb 000300,000140 -> n1z0v0c0; 000340`
8143			`d=000340 -- !`
8144			`d=000010 -- ! bisb 000300,000300 -> n1z0v0c0; 000300`
8145			`d=000300 -- !`
8146			`#--------`
8147			`C Exec test 46.15brc1: BISB - reg, C=1`
8148			`#`
8149			`wal 013246 -- setup test instructions:`
8150			`bwm 2`
8151			`000261 -- ccmov= sec`
8152			`150405 -- iut= bisb r4,r5`
8153			`wr0 177776 -- r0=177776`
8154			`wr1 000006 -- r1=6`
8155			`wr2 036000 -- r2=36000`
8156			`wr3 037000 -- r3=37000`
8157			`wr4 000000 -- r4=0`
8158			`wr5 000000 -- r5=0`
8159			`wsp 001400 -- sp=1400`
8160			`stapc 013240 -- start @ 13240 (2op reg)`
8161			`wtgo`
8162			`rpc d=013262 -- ! pc=halt`
8163			`rr1 d=000000 -- ! r1=0`
8164			`wal 037000 -- check result area`
8165			`brm 12`
8166			`d=000005 -- ! bisb 000000,000000 -> n0z1v0c1; 000000`
8167			`d=000000 -- !`
8168			`d=000001 -- ! bisb 000003,000000 -> n0z0v0c1; 000003`
8169			`d=000003 -- !`
8170			`d=000001 -- ! bisb 000003,000006 -> n0z0v0c1; 000007`
8171			`d=000007 -- !`
8172			`d=000001 -- ! bisb 000003,000014 -> n0z0v0c1; 000017`
8173			`d=000017 -- !`
8174			`d=000011 -- ! bisb 000300,000140 -> n1z0v0c1; 000340`
8175			`d=000340 -- !`
8176			`d=000011 -- ! bisb 000300,000300 -> n1z0v0c1; 000300`
8177			`d=000300 -- !`
8178			`#--------`
8179			`C Exec test 46.17br: CMPB - reg`
8180			`#`
8181			`wal 036000 -- setup test vector: for cmp (b)`
8182			`bwm 38`
8183			`000000 -- cmpb 000000,000000`
8184			`000000 --`
8185			`000001 -- cmpb 000001,000000`
8186			`000000 --`
8187			`000377 -- cmpb 000377,000000`
8188			`000000 --`
8189			`000000 -- cmpb 000000,000001`
8190			`000001 --`
8191			`000001 -- cmpb 000001,000001`
8192			`000001 --`
8193			`000377 -- cmpb 000377,000001`
8194			`000001 --`
8195			`000176 -- cmpb 000176,000177`
8196			`000177 --`
8197			`000177 -- cmpb 000177,000177`
8198			`000177 --`
8199			`000200 -- cmpb 000200,000177`
8200			`000177 --`
8201			`000001 -- cmpb 000001,000177`
8202			`000177 --`
8203			`000377 -- cmpb 000377,000177`
8204			`000177 --`
8205			`000177 -- cmpb 000177,000200`
8206			`000200 --`
8207			`000200 -- cmpb 000200,000200`
8208			`000200 --`
8209			`000201 -- cmpb 000201,000200`
8210			`000200 --`
8211			`000001 -- cmpb 000001,000200`
8212			`000200 --`
8213			`000377 -- cmpb 000377,000200`
8214			`000200 --`
8215			`000000 -- cmpb 000000,000377`
8216			`000377 --`
8217			`000001 -- cmpb 000001,000377`
8218			`000377 --`
8219			`000377 -- cmpb 000377,000377`
8220			`000377 --`
8221			`wal 013246 -- setup test instructions:`
8222			`bwm 2`
8223			`000241 -- ccmov= clc`
8224			`120405 -- iut= cmpb r4,r5`
8225			`wr0 177776 -- r0=177776`
8226			`wr1 000023 -- r1=23 (19.)`
8227			`wr2 036000 -- r2=36000`
8228			`wr3 037000 -- r3=37000`
8229			`wr4 000000 -- r4=0`
8230			`wr5 000000 -- r5=0`
8231			`wsp 001400 -- sp=1400`
8232			`stapc 013240 -- start @ 13240 (2op reg)`
8233			`wtgo`
8234			`rpc d=013262 -- ! pc=halt`
8235			`rr1 d=000000 -- ! r1=0 (Note: C=1 if dst > src unsigned)`
8236			`wal 037000 -- check result area (Note: V=1 if s xor d and r eq d)`
8237			`brm 38`
8238			`d=000004 -- ! cmpb 000000,000000 -> n0z1v0c0; (000000)`
8239			`d=000000 -- !`
8240			`d=000000 -- ! cmpb 000001,000000 -> n0z0v0c0; (000001)`
8241			`d=000000 -- !`
8242			`d=000010 -- ! cmpb 000377,000000 -> n1z0v0c0; (000377)`
8243			`d=000000 -- !`
8244			`d=000011 -- ! cmpb 000000,000001 -> n1z0v0c1; (000377+C)`
8245			`d=000001 -- !`
8246			`d=000004 -- ! cmpb 000001,000001 -> n0z1v0c0; (000000)`
8247			`d=000001 -- !`
8248			`d=000010 -- ! cmpb 000377,000001 -> n1z0v0c0; (000376)`
8249			`d=000001 -- !`
8250			`d=000011 -- ! cmpb 000176,000177 -> n1z0v0c1; (000377+C)`
8251			`d=000177 -- !`
8252			`d=000004 -- ! cmpb 000177,000177 -> n0z1v0c0; (000000)`
8253			`d=000177 -- !`
8254			`d=000002 -- ! cmpb 000200,000177 -> n0z0v1c0; (000001)`
8255			`d=000177 -- !`
8256			`d=000011 -- ! cmpb 000001,000177 -> n1z0v0c1; (000202+C)`
8257			`d=000177 -- !`
8258			`d=000010 -- ! cmpb 000377,000177 -> n1z0v0c0; (000200)`
8259			`d=000177 -- !`
8260			`d=000013 -- ! cmpb 000177,000200 -> n1z0v1c1; (000377+C)`
8261			`d=000200 -- !`
8262			`d=000004 -- ! cmpb 000200,000200 -> n0z1v0c0; (000000)`
8263			`d=000200 -- !`
8264			`d=000000 -- ! cmpb 000201,000200 -> n0z0v0c0; (000001)`
8265			`d=000200 -- !`
8266			`d=000013 -- ! cmpb 000001,000200 -> n1z0v1c1; (000201+C)`
8267			`d=000200 -- !`
8268			`d=000000 -- ! cmpb 000377,000200 -> n0z0v0c0; (000177)`
8269			`d=000200 -- !`
8270			`d=000001 -- ! cmpb 000000,000377 -> n0z0v0c1; (000001+C)`
8271			`d=000377 -- !`
8272			`d=000001 -- ! cmpb 000001,000377 -> n0z0v0c1; (000002+C)`
8273			`d=000377 -- !`
8274			`d=000004 -- ! cmpb 000377,000377 -> n0z1v0c0; (000000)`
8275			`d=000377 -- !`
8276			`#-----------------------------------------------------------------------------`
8277			`C Setup code 47 [base 13400] (pipeline torture tests)`
8278			`#`
8279			`wal 013400 -- data:`
8280			`wmi 000077 -- marker`
8281			`wal 013402 -- code 1:`
8282			`bwm 13`
8283			`016727 -- mov -6(pc),(pc)+ ;`
8284			`177772`
8285			`000000 -- halt ; will be overwritten`
8286			`016737 -- mov -10(pc),@(pc)+ ;`
8287			`177770`
8288			`013400`
8289			`005200 -- inc r0 ;`
8290			`#13420`
8291			`010317 -- mov r3,(pc) ; will overwrite next instruction`
8292			`000000 -- halt ; will be overwritten`
8293			`005200 -- inc r0 ;`
8294			`010447 -- mov r4,-(pc) ; will overwrite itself`
8295			`005200 -- inc r0 ;`
8296			`000000 -- halt ;`
8297			`#`
8298			`wal 013440 -- code 2: (pipeline tester adapted from KDJ11A.MAC)`
8299			`bwm 15`
8300			`012717 -- mov (pc)+,(pc) ; will replace jmp (r1) with nop`
8301			`000240 -- nop`
8302			`000111 -- jmp (r1)`
8303			`012717 -- mov (pc)+,(pc) ; will replace jmp (r1) with nop`
8304			`000240 -- nop`
8305			`000111 -- jmp (r1)`
8306			`012717 -- mov (pc)+,(pc) ; will replace jmp (r1) with nop`
8307			`000240 -- nop`
8308			`#13460`
8309			`000111 -- jmp (r1)`
8310			`012717 -- mov (pc)+,(pc) ; will replace jmp (r1) with nop`
8311			`000240 -- nop`
8312			`000111 -- jmp (r1)`
8313			`000000 -- halt ; should halt here !`
8314			`000000 -- halt ;`
8315			`000000 -- halt ; should not jmp here !`
8316			`#`
8317			`C Exec code 47 (pipeline torture tests)`
8318			`C Exec test 47.1 (some self-modifying code, use (pc)+, (pc), -(pc)):`
8319			`#`
8320			`wr0 000000 -- r0=0`
8321			`wr1 000000 -- r1=0`
8322			`wr2 000000 -- r2=0`
8323			`wr3 005201 -- r3= inc r1`
8324			`wr4 005202 -- r4= inc r2`
8325			`stapc 013402 -- start @ 13402`
8326			`wtgo`
8327			`rpc d=013434 -- ! pc`
8328			`rr0 d=000003 -- ! r0`
8329			`rr1 d=000001 -- ! r1`
8330			`rr2 d=000001 -- ! r2`
8331			`rr3 d=005201 -- ! r3`
8332			`rr4 d=005202 -- ! r4`
8333			`#`
8334			`wal 013400 -- check data area:`
8335			`rmi d=177772 -- ! new marker ; written by mov -10(pc),@(pc)+`
8336			`wal 013402 -- check code area:`
8337			`brm 13`
8338			`d=016727 -- ! mov -6(pc),(pc)+ ;`
8339			`d=177772 -- !`
8340			`d=000077 -- ! ; written by mov -6(pc),(pc)+`
8341			`d=016737 -- ! mov -10(pc),@(pc)+;`
8342			`d=177770 -- !`
8343			`d=013400 -- !`
8344			`d=005200 -- ! inc r0 ;`
8345			`#13320`
8346			`d=010317 -- ! mov r3,(pc) ;`
8347			`d=005201 -- ! inc r1 ; written by mov r3,(pc); executed`
8348			`d=005200 -- ! inc r0 ;`
8349			`d=005202 -- ! inc r2 ; written by mov r4,-(pc); executed`
8350			`d=005200 -- ! inc r0 ;`
8351			`d=000000 -- ! halt ;`
8352			`#`
8353			`C Exec test 47.1 (pipeline tester adapted from KDJ11A.MAC, test 121, p. 70)`
8354			`#`
8355			`wr1 013474 -- r1=13474 (alternate halt)`
8356			`stapc 013440 -- start @ 13440`
8357			`wtgo`
8358			`rpc d=013472 -- ! pc`
8359			`wal 013440 -- check code area:`
8360			`brm 13`
8361			`d=012717 -- ! mov (pc)+,(pc) ;`
8362			`d=000240 -- ! nop`
8363			`d=000240 -- ! nop ; written; executed`
8364			`d=012717 -- ! mov (pc)+,(pc) ;`
8365			`d=000240 -- ! nop`
8366			`d=000240 -- ! nop ; written; executed`
8367			`d=012717 -- ! mov (pc)+,(pc) ;`
8368			`d=000240 -- ! nop`
8369			`#13360`
8370			`d=000240 -- ! nop ; written; executed`
8371			`d=012717 -- ! mov (pc)+,(pc) ;`
8372			`d=000240 -- ! nop`
8373			`d=000240 -- ! nop ; written; executed`
8374			`d=000000 -- ! halt ;`
8375			`#-----------------------------------------------------------------------------`
8376			`C Setup code 50 [base 13500] (check that all reserved instructions trap to 10)`
8377			`#`
8378			`wal 013500 -- code (to be single stepped...)`
8379			`bwm 17`
8380			`000007 -- 000007`
8381			`000010 -- 000010-000077`
8382			`000077 --`
8383			`000210 -- 000210-000227`
8384			`000227 --`
8385			`007000 -- 007000-007777`
8386			`007777 --`
8387			`075000 -- 075000-076777`
8388			`#13420`
8389			`076777 --`
8390			`106400 -- 106400-106477`
8391			`106477 --`
8392			`106700 -- 106700-106777`
8393			`106777 --`
8394			`107000 -- 107000-107777`
8395			`107777 --`
8396			`170000 -- 170000-177777 (no FPU)`
8397			`#13440`
8398			`177777 --`
8399			`#`
8400			`C Exec code 50 (check that all reserved instructions trap to 10)`
8401			`C Test odd address abort`
8402			`#`
8403			`rst -- console reset`
8404			`wps 000000 -- clear psw`
8405			`wal 001374 -- clean stack`
8406			`bwm 2`
8407			`000000 --`
8408			`000000 --`
8409			`wsp 001400 -- sp=1400`
8410			`wpc 013500 -- pc=13500`
8411			`step -- step (000007): trap 10 [[s:2]]`
8412			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8413			`rsp d=001374 -- ! sp=1374`
8414			`#`
8415			`wsp 001400 -- sp=1400`
8416			`wpc 013502 -- pc=13502`
8417			`step -- step (000010): trap 10 [[s:2]]`
8418			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8419			`rsp d=001374 -- ! sp=1374`
8420			`#`
8421			`wsp 001400 -- sp=1400`
8422			`wpc 013504 -- pc=13504`
8423			`step -- step (000077): trap 10 [[s:2]]`
8424			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8425			`rsp d=001374 -- ! sp=1374`
8426			`#`
8427			`wsp 001400 -- sp=1400`
8428			`wpc 013506 -- pc=13506`
8429			`step -- step (000210): trap 10 [[s:2]]`
8430			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8431			`rsp d=001374 -- ! sp=1374`
8432			`#`
8433			`wsp 001400 -- sp=1400`
8434			`wpc 013510 -- pc=13510`
8435			`step -- step (000227): trap 10 [[s:2]]`
8436			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8437			`rsp d=001374 -- ! sp=1374`
8438			`#`
8439			`wsp 001400 -- sp=1400`
8440			`wpc 013512 -- pc=13512`
8441			`step -- step (007000): trap 10 [[s:2]]`
8442			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8443			`rsp d=001374 -- ! sp=1374`
8444			`#`
8445			`wsp 001400 -- sp=1400`
8446			`wpc 013514 -- pc=13514`
8447			`step -- step (007777): trap 10 [[s:2]]`
8448			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8449			`rsp d=001374 -- ! sp=1374`
8450			`#`
8451			`wsp 001400 -- sp=1400`
8452			`wpc 013516 -- pc=13516`
8453			`step -- step (075000): trap 10 [[s:2]]`
8454			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8455			`rsp d=001374 -- ! sp=1374`
8456			`#`
8457			`wsp 001400 -- sp=1400`
8458			`wpc 013520 -- pc=13520`
8459			`step -- step (076777): trap 10 [[s:2]]`
8460			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8461			`rsp d=001374 -- ! sp=1374`
8462			`#`
8463			`wsp 001400 -- sp=1400`
8464			`wpc 013522 -- pc=13522`
8465			`step -- step (106400): trap 10 [[s:2]]`
8466			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8467			`rsp d=001374 -- ! sp=1374`
8468			`#`
8469			`wsp 001400 -- sp=1400`
8470			`wpc 013524 -- pc=13524`
8471			`step -- step (106477): trap 10 [[s:2]]`
8472			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8473			`rsp d=001374 -- ! sp=1374`
8474			`#`
8475			`wsp 001400 -- sp=1400`
8476			`wpc 013526 -- pc=13526`
8477			`step -- step (106700): trap 10 [[s:2]]`
8478			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8479			`rsp d=001374 -- ! sp=1374`
8480			`#`
8481			`wsp 001400 -- sp=1400`
8482			`wpc 013530 -- pc=13530`
8483			`step -- step (106777): trap 10 [[s:2]]`
8484			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8485			`rsp d=001374 -- ! sp=1374`
8486			`#`
8487			`wsp 001400 -- sp=1400`
8488			`wpc 013532 -- pc=13532`
8489			`step -- step (107000): trap 10 [[s:2]]`
8490			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8491			`rsp d=001374 -- ! sp=1374`
8492			`#`
8493			`wsp 001400 -- sp=1400`
8494			`wpc 013534 -- pc=13534`
8495			`step -- step (107777): trap 10 [[s:2]]`
8496			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8497			`rsp d=001374 -- ! sp=1374`
8498			`#`
8499			`wsp 001400 -- sp=1400`
8500			`wpc 013536 -- pc=13536`
8501			`step -- step (170000): trap 10 [[s:2]]`
8502			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8503			`rsp d=001374 -- ! sp=1374`
8504			`#`
8505			`wsp 001400 -- sp=1400`
8506			`wpc 013540 -- pc=13540`
8507			`step -- step (177777): trap 10 [[s:2]]`
8508			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8509			`rsp d=001374 -- ! sp=1374`
8510			`#-----------------------------------------------------------------------------`
8511			`#`
8512			`C Verify trap catchers integrity`
8513			`#`
8514			`wal 000004 -- vectors: 4...34 (trap catcher)`
8515			`brm 14`
8516			`d=000006 -- ! PC:06 ; vector 4`
8517			`d=000000 -- ! PS:0`
8518			`d=000012 -- ! PC:12 ; vector 10`
8519			`d=000000 -- ! PS:0`
8520			`d=000016 -- ! PC:16 ; vector 14 (T bit; BPT)`
8521			`d=000000 -- ! PS:0`
8522			`d=000022 -- ! PC:22 ; vector 20 (IOT)`
8523			`d=000000 -- ! PS:0`
8524			`d=000026 -- ! PC:26 ; vector 24 (Power fail, not used)`
8525			`d=000000 -- ! PS:0`
8526			`d=000032 -- ! PC:32 ; vector 30 (EMT)`
8527			`d=000000 -- ! PS:0`
8528			`d=000036 -- ! PC:36 ; vector 34 (TRAP)`
8529			`d=000000 -- ! PS:0`
8530			`wal 000240 -- vectors: 240,244,250 (trap catcher)`
8531			`brm 6`
8532			`d=000242 -- ! PC:242 ; vector 240 (PIRQ)`
8533			`d=000000 -- ! PS:0`
8534			`d=000246 -- ! PC:246 ; vector 244 (FPU)`
8535			`d=000000 -- ! PS:0`
8536			`d=000252 -- ! PC:252 ; vector 250 (MMU)`
8537			`d=000000 -- ! PS:0`
8538			`#`
8539			`C Verify setup MMU`
8540			`# to avoid seeing AIB bits:`
8541			`# 1. check ARs; 2. re-write ARs to clear AIBs in DRs; 3. check DRs`
8542			`#`
8543			`wal 172340 -- kernel I space AR`
8544			`brm 8`
8545			`d=000000 -- ! 0`
8546			`d=000200 -- ! 200 020000 base`
8547			`d=000400 -- ! 400 040000 base`
8548			`d=000600 -- ! 600 060000 base`
8549			`d=001000 -- ! 1000 100000 base`
8550			`d=001200 -- ! 1200 120000 base`
8551			`d=001400 -- ! 1400 140000 base`
8552			`d=177600 -- !176000 (map to I/O page)`
8553			`#`
8554			`wal 172340 -- kernel I space AR`
8555			`bwm 8`
8556			`000000 -- 0`
8557			`000200 -- 200 020000 base`
8558			`000400 -- 400 040000 base`
8559			`000600 -- 600 060000 base`
8560			`001000 -- 1000 100000 base`
8561			`001200 -- 1200 120000 base`
8562			`001400 -- 1400 140000 base`
8563			`177600 -- 176000 (map to I/O page)`
8564			`#`
8565			`wal 172300 -- kernel I space DR`
8566			`brm 8`
8567			`d=077406 -- ! slf=127; ed=0(up); acf=6(w/r)`
8568			`d=077406 -- ! slf=127; ed=0(up); acf=6(w/r)`
8569			`d=077406 -- ! slf=127; ed=0(up); acf=6(w/r)`
8570			`d=077406 -- ! slf=127; ed=0(up); acf=6(w/r)`
8571			`d=077406 -- ! slf=127; ed=0(up); acf=6(w/r)`
8572			`d=077406 -- ! slf=127; ed=0(up); acf=6(w/r)`
8573			`d=077406 -- ! slf=127; ed=0(up); acf=6(w/r)`
8574			`d=077406 -- ! slf=127; ed=0(up); acf=6(w/r)`
8575			`#`
8576			`wal 000000 -- last cmd shouldn't be 21 or 23 ...`

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