OpenCores
URL https://opencores.org/ocsvn/w11/w11/trunk

Subversion Repositories w11

[/] [w11/] [tags/] [w11a_V0.74/] [doc/] [INSTALL.txt] - Blame information for rev 21

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 21 wfjm
# $Id: INSTALL.txt 512 2013-04-28 07:44:02Z mueller $
2 5 wfjm
 
3 11 wfjm
Guide to install and build w11a systems, test benches and support software
4 5 wfjm
 
5
  Table of content:
6
 
7 11 wfjm
  1.  Download
8 17 wfjm
  2.  System requirements
9
  3.  Setup system environment
10
       a. Setup environment variables
11
       b. Setup USB access
12
  4.  Compile UNISIM/SIMPRIM libraries for ghdl
13
  5.  Compile and install the support software
14 11 wfjm
       a. Compile sharable libraries
15
       b. Setup Tcl packages
16 17 wfjm
       c. Rebuild Cypress FX2 firmware
17
  6.  The build system
18
  7.  Building test benches
19 11 wfjm
       a. General instructions
20
       b. Available test benches
21 17 wfjm
  8.  Building systems
22 11 wfjm
       a. General instructions
23 17 wfjm
       b. Configuring FPGAs
24
       c. Available systems
25 19 wfjm
  9.  Generate Doxygen based source code view
26 5 wfjm
 
27
1. Download ---------------------------------------------------------------
28
 
29
  All instructions below assume that the project files reside in a
30
  working directory with the name represented as 
31
 
32
  To download latest tagged version (V0.5) of w11a
33
 
34
    cd 
35
    svn co http://opencores.org/ocsvn/w11/w11/tags/w11a_V0.5
36
 
37
  To download latest snapshot of trunk
38
 
39
    cd 
40
    svn co http://opencores.org/ocsvn/w11/w11/trunk
41
 
42 17 wfjm
2. System requirements ----------------------------------------------------
43
 
44
  This project contains not only VHDL code but also support software. Therefore
45
  quite a few software packages are expected to be installed. The following
46
  list gives the Ubuntu/Debian package names, but mapping this to other
47
  distributions should be straight forward.
48 5 wfjm
 
49 17 wfjm
  - building the bit files for the FPGAs requires a Xilinx WebPACK installation
50
 
51
  - building and using the RLink backend software requires:
52
    - full C/C++ development chain (gcc,g++,cpp,make)
53
      -> package: build-essential
54
    - Boost C++ library (>= 1.40), with date-time, thread, and regex
55
      -> package: libboost-dev libboost-date-time-dev libboost-thread-dev
56
                  libboost-regex-dev
57
    - libusb 1.0 (>= 1.0.6)
58
      -> package: libusb-1.0-0-dev
59
    - Perl (>= 5.10)  (usually included in base installations)
60
    - Tcl  (>= 8.4), with tclreadline support
61
      -> package: tcl tcl-dev tcllib tclreadline
62
 
63
  - the download contains pre-build firmware images for the Cypress FX2
64
    USB Interface. Re-building them requires
65
    - Small Device C Compiler
66
      -> package: sdcc sdcc-ucsim
67
 
68
  - for FX2 firmware download and jtag programming over USB one needs
69
    - fxload
70
      -> package: fxload
71
    - urjtag
72
      -> package: urjtag   for Ubuntu 12.04
73
      -> see INSTALL_urjtag.txt for other distributions !!
74
 
75
  - for VHDL simulations one needs
76
    - ghdl
77
      -> see INSTALL_ghdl.txt for the unfortunately gory details
78
 
79 19 wfjm
  - for doxygen documentation an up-to-date installation of doxygen is
80
    required, version 1.8.3.1 or later
81
 
82 17 wfjm
  - optional but very useful is:
83
    - gtkwave
84
      -> package: gtkwave
85
 
86
3. Setup system environment -----------------------------------------------
87
 
88
3a. Setup environment variables --------------------------------------
89
 
90 11 wfjm
  The make flow for building test benches (ghdl and ISim based) and systems
91
  (Xilinx xst based) as well as the support software (mainly the rlink backend
92
  server) requires
93 5 wfjm
 
94 12 wfjm
    - the definition of the environment variables:
95
      - RETROBASE: must refer to the installation root directory
96 17 wfjm
      - TCLINC:    pathname for includes of Tcl runtime library
97
      - RETRO_FX2_VID and RETRO_FX2_PID: default USB VID/PID, see below
98 11 wfjm
    - that the tools binary directory is in the path
99
    - that the tools library directory is in the library path
100 19 wfjm
    - optional environment variables:
101
      - BOOSTINC:  pathname for includes of boost library
102
      - BOOSTLIB:  pathname for libraries of boost library
103
        {Note: Either both must be undefined, or both must be defined}
104 12 wfjm
 
105 5 wfjm
  For bash and alike use
106
 
107
    export RETROBASE=
108
    export PATH=$PATH:$RETROBASE/tools/bin
109 11 wfjm
    export LD_LIBRARY_PATH=$LD_LIBRARY_PATH:$RETROBASE/tools/lib
110 5 wfjm
 
111 12 wfjm
  In most cases the boost library version coming with the distribution will
112 17 wfjm
  work, similar for Tcl, in those cases simply use
113 12 wfjm
 
114 17 wfjm
    export TCLINC=/usr/include/tcl8.5
115 12 wfjm
 
116 19 wfjm
  and don't setup BOOSTINC and BOOSTLIB.
117
 
118 5 wfjm
  After that building functional model based test benches will work. If you
119
  want to also build post-xst or post-par test benches read next section.
120
 
121 17 wfjm
  If the Cypress USB controller available on Digilent Nexys2, Nexys3 and
122
  Atlys boards is used the default USB VID and PID is defined by two
123
  environment variables. For internal lab use one can use
124 5 wfjm
 
125 17 wfjm
    export RETRO_FX2_VID=16c0
126
    export RETRO_FX2_PID=03ef
127
 
128
  !! Carefully read the disclaimer about usage of USB VID/PID numbers  !!
129
  !! in the file README_USB-VID-PID.txt. You'll be responsible for any !!
130
  !! misuse of the defaults provided with the project sources.         !!
131
  !! Usage of this VID/PID in any commercial product is forbidden.     !!
132
 
133
3b. Setup USB access -------------------------------------------------
134
 
135
  For using the Cypress FX2 USB interface on Digilent Nexys2, Nexys3 and
136
  Atlys boards 'udev' rules must be setup to allow user level access to
137
  these devices. A set of rules is provided under
138
 
139
    $RETROBASE/tools/fx2/sys
140
 
141
  Follow the 'README.txt' file in this directory.
142
 
143
  Notes:
144
  - the provided udev rules use the VID/PID for 'internal lab use' as
145
    described above. If other VID/PID used the file must be modified.
146
  - your user account must be in group 'plugdev' (should be the default).
147
 
148
4. Compile UNISIM/SIMPRIM libraries for ghdl ------------------------------
149
 
150 5 wfjm
  The build system for test benches also supports test benches run against
151
  the gate level models derived after the xst, map or par step. In this
152
  case ghdl has to link against a compiled UNISIM or SIMPRIM library.
153
 
154
  To make handling of the parallel installion of several WebPack versions
155
  easy the compiled libraries are stored in sub-directories under $XILINX:
156
 
157
     $XILINX/ghdl/unisim
158
     $XILINX/ghdl/simprim
159
 
160
  Two helper scripts will create these libraries:
161
 
162
    
163
 
164
    cd $RETROBASE
165
    xilinx_ghdl_unisim
166
    xilinx_ghdl_simprim
167
 
168
  If you have several WebPack versions installed, repeat for each version.
169
 
170 17 wfjm
5. Compile and install the support software -------------------------------
171 5 wfjm
 
172 17 wfjm
5a. Compile sharable libraries ---------------------------------------
173 5 wfjm
 
174 12 wfjm
  Required tools and libraries:
175
    g++    >= 4.3    (decltype support assumed in usage of boost::bind)
176
    boost  >= 1.35   (boost::thread api changed, new one is used)
177 17 wfjm
    linusb >= 1.0.5  (timerfd support)
178 12 wfjm
 
179
  Build was tested under:
180 17 wfjm
    ubuntu lucid (12.04 LTS):  gcc 4.6.3  boost 1.46.1  libusb 1.0.9
181
    debian squezze (6.0.6):    gcc 4.4.5  boost 1.46.1  libusb 1.0.8
182 12 wfjm
 
183 11 wfjm
  To build all sharable libraries
184
 
185
    cd $RETROBASE/tools/src
186
    make -j 4
187
 
188
  To cleanup, e.g. before a re-build
189
 
190
    cd $RETROBASE/tools/src
191
    rm_dep
192
    make realclean
193
 
194 17 wfjm
5b. Setup Tcl environment --------------------------------------------
195 11 wfjm
 
196
  The Tcl files are organized in several packages. To create the Tcl
197
  package files (pkgIndex.tcl)
198
 
199
    cd $RETROBASE/tools/tcl
200
    setup_packages
201
 
202
  To use these packages it is convenient to make them available via the
203
  'auto_path' mechanism. To do that add in your .tclshrc or .wishrc
204
 
205
    lappend auto_path [file join $env(RETROBASE) tools tcl]
206
    lappend auto_path [file join $env(RETROBASE) tools lib]
207
 
208
  The w11 distribution contains two ready to use .tclshrc or .wishrc
209
  files which
210
    - include the auto_path statements above
211
    - activate tclreadline (and thus in tclshrc an event loop)
212
 
213
  To use them simply copy them into your home directory (or soft link them)
214
 
215
    cd $HOME
216
    ln -s $RETROBASE/tools/tcl/.tclshrc .
217
    ln -s $RETROBASE/tools/tcl/.wishrc  .
218
 
219 17 wfjm
5c. Rebuild Cypress FX2 firmware -------------------------------------
220 11 wfjm
 
221 17 wfjm
  The download includes pre-build firmware images for the Cypress FX2
222
  USB interface used on the Digilent Nexys2, Nexys3 and Atlys Boards.
223
  These firmware images are under
224 11 wfjm
 
225 17 wfjm
    $RETROBASE/tools/fx2/bin
226
 
227
  To re-build them, e.g. because a different USB VID/PID is to be used
228
 
229
    cd $RETROBASE/tools/fx2/src
230
    make clean
231
    make
232
    make install
233
 
234
  Please read README_USB_VID-PID.txt carefully to understand the usage
235
  of USB VID and PID.
236
 
237
6. The build system -------------------------------------------------------
238
 
239 5 wfjm
  Simulation and synthesis tools usually need a list of the VHDL source
240
  files, often in proper compilation order (libraries before components).
241
  The different tools have different formats of these 'project files'.
242
 
243
  The build system employed in this project is based on
244
     "VHDL bill of material" or 'vbom' files
245
  which list for each vhdl source file the libraries and sources for
246
  the instantiated components, the later via their vbom, and last but
247
  not least the name of the vhdl source file. All file name are relative
248
  to the current directory. A recursive traversal through all vbom's gives
249
  for each vhld module all sources needed to compile it. The vbomconv script
250
  in tools/bin does this, and generates depending on options
251
   - make dependency files
252
   - ISE xst project files
253
   - ISE ISim project files
254
   - ghdl commands for analysis, inspection and make step
255
 
256
  The master make files contain pattern rules like
257
    %.ngc  : %.vbom           -- synthesize with xst
258
    %      : %.vbom           -- build functional model test bench
259
  which encapsulate all the vbomconf magic
260
 
261
  A full w11a is build from more than 80 source files, test benches from
262
  even more. Using the vbom's a large number of designs can be easily
263
  maintained.
264
 
265 17 wfjm
7. Building test benches --------------------------------------------------
266 5 wfjm
 
267 17 wfjm
7a. General instructions ---------------------------------------------
268 11 wfjm
 
269 5 wfjm
  To compile a test bench named  all is needed is
270
 
271
    make 
272
 
273
  The make file will use .vbom, create all make dependency files,
274
  and generate the needed ghdl commands.
275
 
276
  In many cases the test benches can also be compiled against the gate
277
  level models derived after the xst, map or par step. To compile them
278
 
279
    make ghdl_tmp_clean
280
    make _ssim                  # for post-xst
281
    make _fsim                  # for post-map
282
    make _tsim                  # for post-par
283
 
284
  The 'make ghdl_tmp_clean' is needed to flush the ghdl work area from
285
  the compilation remains of earlier functional model compiles.
286
 
287 17 wfjm
7b. Available test benches -------------------------------------------
288 5 wfjm
 
289 11 wfjm
  See file w11a_tb_guide.txt
290
 
291 17 wfjm
8. Building systems -------------------------------------------------------
292 11 wfjm
 
293 17 wfjm
8a. General instructions ---------------------------------------------
294 11 wfjm
 
295 5 wfjm
  To generate a bit file for a system named  all is needed is
296
 
297
    make .bit
298
 
299
  The make file will use .vbom, create all make dependency files, build
300
  the ucf file with cpp, and run the synthesis flow (xst, ngdbuild, par, trce).
301
  The log files will be named
302
 
303
      _xst.log        # xst log file
304
      _tra.log        # translate (ngdbuild) log file (renamed %.bld)
305
      _map.log        # map log file                  (renamed %_map.mrp)
306
      _par.log        # par log file                  (renamed %.par)
307
      _pad.log        # pad file                      (renamed %_pad.txt)
308
      _twr.log        # trce log file                 (renamed %.twr)
309
 
310
  To load the bitfile with WebPack impact into the target board use
311
 
312 12 wfjm
    make .iconfig
313 5 wfjm
 
314 20 wfjm
  For boards with a Cypress FX2 USB controller load the bitfile directly with
315
 
316
    make .jconfig
317
 
318 5 wfjm
  If only the xst or par output is wanted just use
319
 
320
    make .ngc
321
    make .ncd
322 11 wfjm
 
323 17 wfjm
  A simple 'message filter' system is also integrated into the make build flow.
324
  For many (though not all) systems a .mfset file has been provided which
325
  defines the xst,par and bitgen messages which are considered ok. To see
326
  only the remaining message extracted from the vaious .log files simply
327
  use the make target
328 11 wfjm
 
329 17 wfjm
    make .mfsum
330
 
331
  after a re-build.
332
 
333
8b. Configuring FPGAs ------------------------------------------------
334
 
335
  The make flow supports also loading the bitstream into FPGAs, either
336
  via Xilinx Impact, or via the Cypress FX2 USB controller is available.
337
 
338
  For Xilinx Impact a Xilinx USB Cable II has to be properly setup, than
339
  simply use
340
 
341
    make .iconfig
342
 
343 20 wfjm
  For using the Cypress FX2 USB controller on Digilent Nexys2, Nexys3 and
344 17 wfjm
  Atlys boards just connect the USB cable and
345
 
346
    make .jconfig
347
 
348
  This will automatically check and optionaly re-load the FX2 firmware
349
  to a version matching the FPGA design, generate a .svf file from the
350
  .bit file, and configure the FPGA. In case the bit file is out-of-date
351
  the whole design will be re-implemented before.
352
 
353
8c. Available systems ------------------------------------------------
354
 
355 11 wfjm
  Note: Currently ready to build versions exist for
356
          Digilent S3BOARD (-1000 FPGA version)
357
          Digilent Nexys2 board (-1200 FPGA version)
358 15 wfjm
          Digilent Nexys3 board
359 11 wfjm
 
360
  1. rlink tester
361
     a. for Digilent Nexys2 board
362
 
363
        cd $RETROBASE/rtl/sys_gen/tst_rlink/nexys2
364
        make sys_tst_rlink_n2.bit
365
 
366 15 wfjm
     b. for Digilent Nexys3 board
367
 
368
        cd $RETROBASE/rtl/sys_gen/tst_rlink/nexys3
369
        make sys_tst_rlink_n3.bit
370
 
371 17 wfjm
  2. rlink over USB tester
372
     a. for Digilent Nexys2 board
373
 
374
        cd $RETROBASE/rtl/sys_gen/tst_rlink_cuff/nexys2/ic
375
        make sys_tst_rlink_cuff_ic_n2.bit
376
 
377 21 wfjm
     b. for Digilent Nexys3 board
378
 
379
        cd $RETROBASE/rtl/sys_gen/tst_rlink_cuff/nexys3/ic
380
        make sys_tst_rlink_cuff_ic_n3.bit
381
 
382 17 wfjm
  3. w11a systems
383 11 wfjm
     a. for Digilent S3BOARD
384
 
385
        cd $RETROBASE/rtl/sys_gen/w11a/s3board
386
        make sys_w11a_s3.bit
387
 
388
     b. for Digilent Nexys2 board
389
 
390
        cd $RETROBASE/rtl/sys_gen/w11a/nexys2
391
        make sys_w11a_n2.bit
392 15 wfjm
 
393
     c. for Digilent Nexys3 board
394
 
395
        cd $RETROBASE/rtl/sys_gen/w11a/nexys3
396
        make sys_w11a_n3.bit
397 19 wfjm
 
398
9. Generate Doxygen based source code view --------------------------------
399
 
400
   Currently there is not much real documentation included in the source
401
   files. The doxygen generated html output is nevertheless very useful
402
   to browse the code. C++, Tcl and Vhdl source are covered by setup files
403
   contained in the project files.
404
 
405
   To generate the html files
406
 
407
     cd $RETROBASE/tools/dox
408
     export RETRODOXY 
409
     ./make_doxy
410
 
411
   If RETRODOXY is not defined '/tmp' is used. To view the docs use
412
 
413
     firefox $RETRODOXY/w11/cpp/html/index.html &
414
     firefox $RETRODOXY/w11/tcl/html/index.html &
415
     firefox $RETRODOXY/w11/vhd/html/index.html &

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.