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wfjm |
# $Id: sys_tst_sram_n4.vmfset 785 2016-07-10 12:22:41Z mueller $
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#
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# ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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[syn]
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# false_path -hold ignored by synth ----------------------------
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I [Designutils 20-1567] # generic
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# port driven by constant --------------------------------------
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i [Synth 8-3917] O_RGBLED0[\d] # OK 2016-06-05
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# tying undriven pin to constant -------------------------------
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# upper 8 LEDs unused # OK 2016-06-05
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i [Synth 8-3295] HIO:LED[\d*]
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# only few LAMs used # OK 2016-06-05
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i [Synth 8-3295] RLINK:RB_LAM[\d*]
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# unconnected ports --------------------------------------------
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I [Synth 8-3331] RB_MREQ # generic
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# --> I_MEM_WAIT not used by current nx_cram_memctl_as # OK 2016-06-05
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i [Synth 8-3331] nx_cram_memctl_as.*I_MEM_WAIT
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# --> MEM_ACK_W not used by current tst_sram # OK 2016-06-05
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i [Synth 8-3331] tst_sram.*MEM_ACK_W
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# --> rlink_sp2c doesn't use CE_USEC and CE_MSEC # OK 2016-06-05
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i [Synth 8-3331] rlink_sp2c.*CE_(USEC|MSEC)
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# unused sequential element ------------------------------------
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I [Synth 8-3332] R_LREGS_reg[attn][\d*] # generic
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# --> many HIO pins not used # OK 2016-06-05
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i [Synth 8-3332] HIO/IOB_LED/R_DO_reg[\d*]
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i [Synth 8-3332] HIO/IOB_(SWI|BTN)/R_DI_reg[\d*]
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i [Synth 8-3332] HIO/DEB.DEB_(SWI|BTN)/R_REGS_reg[(dref|dout|dchange)][\d*]
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# --> monitor outputs moneop,monattn currently not used # OK 2016-06-05
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i [Synth 8-3332] RLINK/CORE/RL/R_LREGS_reg[moneop]
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i [Synth 8-3332] RLINK/CORE/RL/R_LREGS_reg[monattn]
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# --> only RB_STAT 0,1 used by tst_sram # OK 2016-06-05
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i [Synth 8-3332] RLINK/CORE/RL/R_BREGS_reg[stat][(2|3)]
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# --> CE_USEC isn't used (also not in rlink_sp2c) # OK 2016-06-05
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i [Synth 8-3332] CLKDIV_CLK/R_REGS_reg[usec]
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# --> CES_USEC isn't used # OK 2016-06-05
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i [Synth 8-3332] CLKDIV_CLKS/R_REGS_reg[usec]
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# ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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[imp]
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I [Vivado 12-2489] # multiple of 1 ps
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I [Physopt 32-742] # BRAM Flop Optimization
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