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[/] [w11/] [tags/] [w11a_V0.74/] [rtl/] [w11a/] [tb/] [tb_pdp11core_stim.dat] - Blame information for rev 25

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Line No.	Rev	Author	Line
1	25	wfjm	`# $Id: tb_pdp11core_stim.dat 569 2014-07-13 14:36:32Z mueller $`
2	2	wfjm	`#`
3			`# Revision History:`
4			`# Date Rev Version Comment`
5	25	wfjm	`# 2014-07-13 569 2.3 after ECO-026: correct test 31.1 wrong V=1 cases`
6			`# correct test 37.2: 2 V=1 cases have regs now updated`
7	2	wfjm	`# 2010-06-20 308 2.2.1 add wibrb, ribr, wibr based tests`
8			`# 2010-06-13 305 2.2 adopt to new rri address and function semantics`
9			`# 2009-11-22 252 2.1.14 change SSR0 expects, adapt to ECO-021.`
10			`# 2009-05-02 211 2.1.13 add nop after spl in pirq test, 11/70 spl now !!`
11			`# 2008-08-29 163 2.1.12 add wtlam to harvest attn after sto in test 13`
12			`# 2008-04-27 139 2.1.11 adapt expected ssr1 after mtpi/d after ECO-009 fix`
13			`# 2008-03-15 125 2.1.10 exclude some tests from simh ([[off/on]]`
14			`# 2008-03-09 124 2.1.9 fixed addr-mode in code 34, shifted 47+50`
15			`# 2008-03-02 121 2.1.8 add meory access error tests`
16			`# add Code 13, testing WAIT and bwm/brm while CPU runs`
17			`# 2008-02-24 119 2.1.7 add tests for lah,rps,wps; use rps,wps`
18			`# use 22bit mode for nxm test (now needed!)`
19			`# 2008-02-23 118 2.1.6 for nxm tests use mmu and page below i/o-page`
20			`# in code 35 use access to 160000 to test trap`
21			`# 2007-09-23 84 2.1.5 use .reset to make it re-executable`
22			`# 2007-09-16 83 2.1.4 clear CPUERR in beginning of test 20 {runs in FPGA}`
23			`# 2007-09-02 79 2.1.3 add .mode command (for pi_rri use)`
24			`# 2007-08-25 75 2.1.2 add .cpmon/.rpmon (for use with rri)`
25			`# 2007-08-16 74 2.1.1 adapt to changed LAM handling`
26			`# 2007-08-12 73 2.1 use wtgo (revised conv_stim)`
27			`# 2007-08-03 71 2.0 convert to command mode with conv_stim`
28			`# 2007-07-08 65 1.2 removed 1st 'delay' parameter; use .to_(cmd\|stp\|go)`
29			`# 2007-06-10 51 1.1 consolidate w11a test bench`
30			`# 2007-05-13 29 1.0 initial version (imported)`
31			`#`
32			`.mode pdpcp`
33			`.tocmd 50`
34			`.tostp 100`
35			`.togo 5000`
36	9	wfjm	`.rlmon 0`
37	2	wfjm	`.rbmon 0`
38			`.scntl 13 0`
39			`#`
40			`.reset`
41			`.wait 10`
42			`.anena 1`
43			`#`
44			`C "Code 0" Some elementary initial tests`
45			`C write registers`
46			`#`
47			`wr0 000001 -- set r0,..,r7`
48			`wr1 000101 --`
49			`wr2 000201 --`
50			`wr3 000301 --`
51			`wr4 000401 --`
52			`wr5 000501 --`
53			`wsp 000601 --`
54			`wpc 000701 --`
55			`#`
56			`C read registers`
57			`#`
58			`rr0 d=000001 -- ! r0`
59			`rr1 d=000101 -- ! r1`
60			`rr2 d=000201 -- ! r2`
61			`rr3 d=000301 -- ! r3`
62			`rr4 d=000401 -- ! r4`
63			`rr5 d=000501 -- ! r5`
64			`rsp d=000601 -- ! sp`
65			`rpc d=000701 -- ! pc`
66			`#`
67			`C write memory`
68			`#`
69			`wal 002000 -- write mem(2000,...,2006)`
70			`bwm 4`
71			`007700 --`
72			`007710 --`
73			`007720 --`
74			`007730 --`
75			`#`
76			`C read memory`
77			`#`
78			`wal 002000`
79			`brm 4`
80			`d=007700 -- ! mem(2000)`
81			`d=007710 -- ! mem(2002)`
82			`d=007720 -- ! mem(2004)`
83			`d=007730 -- ! mem(2006)`
84			`#`
85			`C write/read PSW via various mechanisms`
86			`C via wps/rps`
87			`#`
88			`wps 000017`
89			`rps d=000017`
90			`wps 000000`
91			`rps d=000000`
92			`#`
93			`C via 16bit cp addressing (wal 177776)`
94			`#`
95			`wal 177776`
96			`wm 000017 -- set all cc flags in psw`
97			`rm d=000017 -- ! psw`
98			`rps d=000017`
99			`wm 000000 -- clear psw`
100			`rm d=000000 -- ! psw`
101			`rps d=000000`
102			`#`
103			`C via 22bit cp addressing (wal 177776; wah 177)`
104			`#`
105			`wal 177776`
106			`wah 000177`
107			`wm 000017 -- set all cc flags in psw`
108			`rm d=000017 -- ! psw`
109			`rps d=000017`
110			`wm 000000 -- clear psw`
111			`rm d=000000 -- ! psw`
112			`rps d=000000`
113			`#`
114			`C via ibr (ibrb 177700)`
115			`#`
116			`wibrb 177700`
117			`wibr 76 000017 -- set all cc flags in psw`
118			`ribr 76 d=000017 -- ! psw`
119			`rps d=000017`
120			`wibr 76 000000 -- set all cc flags in psw`
121			`ribr 76 d=000000 -- ! psw`
122			`rps d=000000`
123			`#`
124			`C write register set 1, sm,um stack`
125			`#`
126			`wps 004000 -- psw: cm=kernel, set=1`
127			`wr0 010001 -- set r0,..,r5 [[r10]]`
128			`wr1 010101 -- [[r11]]`
129			`wr2 010201 -- [[r12]]`
130			`wr3 010301 -- [[r13]]`
131			`wr4 010401 -- [[r14]]`
132			`wr5 010501 -- [[r15]]`
133			`wps 044000 -- psw: cm=super(01),set=1`
134			`wsp 010601 -- set ssp [[ssp]]`
135			`wps 144000 -- psw: cm=user(11),set=1`
136			`wsp 110601 -- set usp [[usp]]`
137			`#`
138			`C read all registers set 0/1, km,sm,um stack`
139			`#`
140			`wps 000000 -- psw: cm=kernel(00),set=0`
141			`rr0 d=000001 -- ! r0`
142			`rr1 d=000101 -- ! r1`
143			`rr2 d=000201 -- ! r2`
144			`rr3 d=000301 -- ! r3`
145			`rr4 d=000401 -- ! r4`
146			`rr5 d=000501 -- ! r5`
147			`rsp d=000601 -- ! ksp`
148			`rpc d=000701 -- ! pc`
149			`wps 040000 -- psw: cm=super(01),set=0`
150			`rsp d=010601 -- ! ssp [[ssp]]`
151			`wps 140000 -- psw: cm=user(11),set=0`
152			`rsp d=110601 -- ! usp [[usp]]`
153			`wps 144000 -- psw: cm=user(11),set=1`
154			`rr0 d=010001 -- ! r0 [[r10]]`
155			`rr1 d=010101 -- ! r1 [[r11]]`
156			`rr2 d=010201 -- ! r2 [[r12]]`
157			`rr3 d=010301 -- ! r3 [[r13]]`
158			`rr4 d=010401 -- ! r4 [[r14]]`
159			`rr5 d=010501 -- ! r5 [[r15]]`
160			`#`
161			`C write IB space: MMU SAR supervisor mode (16 bit regs)`
162			`#`
163			`wal 172240 -- set first three SM I space address regs`
164			`bwm 3`
165			`012340`
166			`012342`
167			`012344`
168			`#`
169			`C read IB space: MMU SAR supervisor mode (16 bit regs)`
170			`#`
171			`wal 172240 -- ! verify first three SM I space address regs`
172			`brm 3`
173			`d=012340`
174			`d=012342`
175			`d=012344`
176			`#`
177			`C read IB space via ibr: MMU SAR supervisor mode (16 bit regs)`
178			`#`
179			`wibrb 172200`
180			`ribr 40 d=012340`
181			`ribr 42 d=012342`
182			`ribr 44 d=012344`
183			`#`
184			`C byte write IB space via ibr: MMU SAR supervisor mode (16 bit regs)`
185			`#`
186			`wibrb 172201 -- write low byte`
187			`wibr 40 177000`
188			`wibr 42 177002`
189			`wibr 44 177004`
190			`wal 172240 -- ! verify`
191			`brm 3`
192			`d=012000`
193			`d=012002`
194			`d=012004`
195			`#`
196			`wibrb 172202 -- write high byte`
197			`wibr 40 000377`
198			`wibr 42 022377`
199			`wibr 44 044377`
200			`wal 172240 -- ! verify`
201			`brm 3`
202			`d=000000`
203			`d=022002`
204			`d=044004`
205			`#`
206			`wibrb 172203 -- write high and low byte (both be set)`
207			`wibr 40 012340`
208			`wibr 42 012342`
209			`wibr 44 012344`
210			`wal 172240 -- ! verify`
211			`brm 3`
212			`d=012340`
213			`d=012342`
214			`d=012344`
215			`#`
216			`#[[off]] - this tests cp not the cpu - meaningless in simh`
217			`#`
218			`C test access error handling to memory (use 17740000)`
219			`C with wm/rm`
220			`#`
221			`wal 140000`
222			`wah 000177`
223			`.merr 1`
224			`.sdef s=10000001`
225			`wm 000000`
226			`rm d=-`
227			`.merr 0`
228			`.sdef s=00000000,01110000`
229			`#`
230			`C with bwm/brm`
231			`#`
232			`wal 140000`
233			`wah 000177`
234			`.merr 1`
235			`.sdef s=10000001`
236			`bwm 2`
237			`000000`
238			`000000`
239			`.merr 0`
240			`.sdef s=00000000,01110000`
241			`#`
242			`wal 140000`
243			`wah 000177`
244			`.merr 1`
245			`.sdef s=10000001`
246			`brm 2`
247			`d=-`
248			`d=-`
249			`.merr 0`
250			`.sdef s=00000000,01110000`
251			`#`
252			`C test access error handling to IB space (use 00160000)`
253			`C with wm/rm`
254			`wal 160000`
255			`.merr 1`
256			`.sdef s=10000001`
257			`wm 000000`
258			`rm d=-`
259			`.merr 0`
260			`.sdef s=00000000,01110000`
261			`C with bwm/brm`
262			`#`
263			`wal 160000`
264			`.merr 1`
265			`.sdef s=10000001`
266			`bwm 2`
267			`000000`
268			`000000`
269			`.merr 0`
270			`.sdef s=00000000,01110000`
271			`#`
272			`wal 160000`
273			`.merr 1`
274			`.sdef s=10000001`
275			`brm 2`
276			`d=-`
277			`d=-`
278			`.merr 0`
279			`.sdef s=00000000,01110000`
280			`#[[on]]`
281			`#-----------------------------------------------------------------------------`
282			`C Setup trap catchers`
283			`#`
284			`wal 000004 -- vectors: 4...34 (trap catcher)`
285			`bwm 14`
286			`000006 -- PC:06 ; vector 4`
287			`000000 -- PS:0`
288			`000012 -- PC:12 ; vector 10`
289			`000000 -- PS:0`
290			`000016 -- PC:16 ; vector 14 (T bit; BPT)`
291			`000000 -- PS:0`
292			`000022 -- PC:22 ; vector 20 (IOT)`
293			`000000 -- PS:0`
294			`000026 -- PC:26 ; vector 24 (Power fail, not used)`
295			`000000 -- PS:0`
296			`000032 -- PC:32 ; vector 30 (EMT)`
297			`000000 -- PS:0`
298			`000036 -- PC:36 ; vector 34 (TRAP)`
299			`000000 -- PS:0`
300			`wal 000240 -- vectors: 240,244,250 (trap catcher)`
301			`bwm 6`
302			`000242 -- PC:242 ; vector 240 (PIRQ)`
303			`000000 -- PS:0`
304			`000246 -- PC:246 ; vector 244 (FPU)`
305			`000000 -- PS:0`
306			`000252 -- PC:252 ; vector 250 (MMU)`
307			`000000 -- PS:0`
308			`#`
309			`C Setup MMU`
310			`#`
311			`wal 172300 -- kernel I space DR`
312			`bwm 8`
313			`077406 -- slf=127; ed=0(up); acf=6(w/r)`
314			`077406 -- slf=127; ed=0(up); acf=6(w/r)`
315			`077406 -- slf=127; ed=0(up); acf=6(w/r)`
316			`077406 -- slf=127; ed=0(up); acf=6(w/r)`
317			`077406 -- slf=127; ed=0(up); acf=6(w/r)`
318			`077406 -- slf=127; ed=0(up); acf=6(w/r)`
319			`077406 -- slf=127; ed=0(up); acf=6(w/r)`
320			`077406 -- slf=127; ed=0(up); acf=6(w/r)`
321			`wal 172340 -- kernel I space AR`
322			`bwm 8`
323			`000000 -- 0`
324			`000200 -- 200 020000 base`
325			`000400 -- 400 040000 base`
326			`000600 -- 600 060000 base`
327			`001000 -- 1000 100000 base`
328			`001200 -- 1200 120000 base`
329			`001400 -- 1400 140000 base`
330			`177600 -- 176000 (map to I/O page)`
331			`#-----------------------------------------------------------------------------`
332			`C Setup code 1 [base 2100] (very basics: cont,start; 'simple' instructions)`
333			`#`
334			`wal 002100 -- code test 1: (sec+clc+halt)`
335			`bwm 3`
336			`000261 -- sec`
337			`000250 -- cln`
338			`000000 -- halt`
339			`#-----`
340			`wal 002120 -- code test 2: (4 *inc R2, starting from -2)`
341			`bwm 5`
342			`005202 -- inc r2`
343			`005202 -- inc r2`
344			`005202 -- inc r2`
345			`005202 -- inc r2`
346			`#2130`
347			`000000 -- halt`
348			`#-----`
349			`wal 002140 -- code test 3: (dec r3; bne -2; halt)`
350			`bwm 3`
351			`005303 -- dec r3`
352			`001376 -- bne -2`
353			`000000 -- halt`
354			`#-----`
355			`wal 002160 -- code test 4: (inc r1; sob r0,-2; halt)`
356			`bwm 3`
357			`005201 -- inc r1`
358			`077002 -- sob r0,-2`
359			`000000 -- halt`
360			`#`
361			`C Exec code 1 (very basics: cont,start; 'simple' instructions)`
362			`C Exec test 1.1 (sec+clc+halt)`
363			`#`
364			`wpc 002100 -- pc=2100`
365			`wps 000010 -- psw: set N flag`
366			`cont -- cont @ 2100`
367			`wtgo`
368			`rpc d=002106 -- ! pc`
369			`rps d=000001 -- ! N cleared, C set now`
370			`#`
371			`C Exec test 1.2 (4 *inc R2, starting from -2)`
372			`#`
373			`wr2 177776 -- r2=-2`
374			`stapc 002120 -- start @ 2120`
375			`wtgo`
376			`rr2 d=000002 -- ! r2=2`
377			`rpc d=002132 -- ! pc`
378			`#`
379			`C Exec test 1.3 (dec r3; bne -2; halt)`
380			`#`
381			`wr3 000002 -- r3=2`
382			`stapc 002140 -- start @ 2140`
383			`wtgo`
384			`rr3 d=000000 -- ! r3=0`
385			`rpc d=002146 -- ! pc`
386			`#`
387			`C Exec test 1.4 (inc r1; sob r0,-2; halt)`
388			`#`
389			`wr0 000002 -- r0=2`
390			`wr1 000000 -- r1=0`
391			`stapc 002160 -- start @ 2160`
392			`wtgo`
393			`rr0 d=000000 -- ! r0=0`
394			`rr1 d=000002 -- ! r1=2`
395			`rpc d=002166 -- ! pc`
396			`#-----------------------------------------------------------------------------`
397			`C Setup code 2 [base 2200] (bpt against trap catcher @14)`
398			`#`
399			`wal 002200 -- code:`
400			`bwm 4`
401			`000257 -- cl(nzvc)`
402			`000261 -- sec`
403			`000003 -- bpt`
404			`000000 -- halt`
405			`#`
406			`C Exec code 2 (bpt against trap catcher @14)`
407			`#`
408			`wsp 001400 -- sp=1400`
409			`stapc 002200 -- start @ 2200`
410			`wtgo`
411			`rsp d=001374 -- ! sp`
412			`rpc d=000020 -- ! pc`
413			`wal 001374`
414			`brm 2`
415			`d=002206 -- ! (sp) old pc`
416			`d=000341 -- ! 2(sp) old ps`
417			`#-----------------------------------------------------------------------------`
418			`C Setup code 3 [base 2300] (bpt against trap handler doing inc r0; rtt)`
419			`#`
420			`wal 002300 -- code:`
421			`bwm 4`
422			`000257 -- cl(nzvc)`
423			`000003 -- bpt`
424			`005201 -- inc r1`
425			`000000 -- halt`
426			`wal 000014 -- vector: 14`
427			`bwm 2`
428			`002320 -- PC:2320`
429			`000002 -- PS:2`
430			`wal 002320 -- code (trap 14):`
431			`bwm 3`
432			`005200 -- inc r0`
433			`000006 -- rtt`
434			`000000 -- halt`
435			`#`
436			`C Exec code 3 (bpt against trap handler doing inc r0; rtt)`
437			`#`
438			`wr0 000000 -- r0=0`
439			`wr1 000000 -- r1=0`
440			`wsp 001400 -- sp=1400`
441			`stapc 002300 -- start @ 2300`
442			`wtgo`
443			`rr0 d=000001 -- ! r0`
444			`rr1 d=000001 -- ! r1`
445			`rsp d=001400 -- ! sp`
446			`rpc d=002310 -- ! pc`
447			`#-----------------------------------------------------------------------------`
448			`C Setup code 4 [base 2400] (enable T-trap on handler of code 3; run 2* inc r1)`
449			`#`
450			`wal 002400`
451			`bwm 4`
452			`000006 -- rtt`
453			`005201 -- inc r1`
454			`005201 -- inc r1`
455			`000000 -- halt`
456			`#`
457			`C Exec code 4 (enable T-trap on handler of code 3; run 2* inc r1)`
458			`#`
459			`wr0 000000 -- r0=0`
460			`wr1 000000 -- r1=0`
461			`wsp 001374 -- sp=1374`
462			`wal 001374 -- setup stack with rtt return frame setting T flag`
463			`bwm 2`
464			`002402 -- start address`
465			`000020 -- set T flag in PSW`
466			`stapc 002400 -- start @ 2400 -> rtt -> 2402 from stack`
467			`wtgo`
468			`rr0 d=000002 -- ! r0`
469			`rr1 d=000002 -- ! r1`
470			`rsp d=001400 -- ! sp`
471			`rpc d=002410 -- ! pc`
472			`#`
473			`rst -- console reset (to clear T flag)`
474			`wal 000014 -- vector: 14 -> trap catcher again`
475			`bwm 2`
476			`000016 -- PC:16`
477			`000000 -- PS:0`
478			`#-----------------------------------------------------------------------------`
479			`C Setup code 5 [base 2500] (srcr modes: mov xxx,rn: (r0),(r0)+,-(r0),@(r0))`
480			`#`
481			`wal 002500 -- code:`
482			`bwm 6`
483			`011001 -- mov (r0),r1`
484			`012002 -- mov (r0)+,r2`
485			`012003 -- mov (r0)+,r3`
486			`014004 -- mov -(r0),r4`
487			`013005 -- mov @(r0)+,r5`
488			`000000 -- halt`
489			`#`
490			`wal 002540 -- data:`
491			`bwm 2`
492			`000070 --`
493			`002550 --`
494			`wal 002550 -- data:`
495			`bwm 2`
496			`000072 --`
497			`000074 --`
498			`#`
499			`C Exec code 5 (srcr modes: mov xxx,rn: (r0),(r0)+,-(r0),@(r0))`
500			`#`
501			`wr0 002540 -- r0=2540`
502			`wr1 000000 -- r1=0`
503			`wr2 000000 -- r2=0`
504			`wr3 000000 -- r3=0`
505			`wr4 000000 -- r4=0`
506			`wr5 000000 -- r5=0`
507			`wsp 001400 -- sp=1400`
508			`stapc 002500 -- start @ 2500`
509			`wtgo`
510			`rr0 d=002544 -- ! r0`
511			`rr1 d=000070 -- ! r1`
512			`rr2 d=000070 -- ! r2`
513			`rr3 d=002550 -- ! r3`
514			`rr4 d=002550 -- ! r4`
515			`rr5 d=000072 -- ! r5`
516			`rsp d=001400 -- ! sp`
517			`rpc d=002514 -- ! pc`
518			`#-----------------------------------------------------------------------------`
519			`C Setup code 6 [base 2600] (srcr modes: mov xxx,rn: x(r0),@x(r0), pc modes)`
520			`#`
521			`wal 002600 -- code:`
522			`bwm 11`
523			`016001 -- mov 2(r0),r1`
524			`000002`
525			`017002 -- mov @2(r0),r2`
526			`000002`
527			`012703 -- mov (pc)+,r3 ; #377`
528			`000377`
529			`013704 -- mov @(pc)+,r4 ; @#2552 (in previous code !)`
530			`002552`
531			`#2620`
532			`112705 -- movb (pc)+,r5 ; #377`
533			`000377`
534			`000000 -- halt`
535			`#`
536			`C Exec code 6 (srcr modes: mov xxx,rn: x(r0),@x(r0), pc modes)`
537			`#`
538			`wr0 002540 -- r0=2540 (in previous code !)`
539			`wr1 000000 -- r1=0`
540			`wr2 000000 -- r2=0`
541			`wr3 000000 -- r3=0`
542			`wr4 000000 -- r4=0`
543			`wr5 000000 -- r5=0`
544			`wsp 001400 -- sp=1400`
545			`stapc 002600 -- start @ 2600`
546			`wtgo`
547			`rr0 d=002540 -- ! r0`
548			`rr1 d=002550 -- ! r1`
549			`rr2 d=000072 -- ! r2`
550			`rr3 d=000377 -- ! r3`
551			`rr4 d=000074 -- ! r4`
552			`rr5 d=177777 -- ! r5`
553			`rsp d=001400 -- ! sp`
554			`rpc d=002626 -- ! pc`
555			`#-----------------------------------------------------------------------------`
556			`C Setup code 7 [base 2700] (dstw modes: mov rn,xxx: all non-r modes)`
557			`#`
558			`wal 002700 -- code:`
559			`bwm 18`
560			`012710 -- mov #110,(r0) (to 2750)`
561			`000110`
562			`012721 -- mov #120,(r1)+ (to 2752)`
563			`000120`
564			`012732 -- mov #130,@(r2)+ (to 2754)`
565			`000130`
566			`012743 -- mov #140,-(r3) (to 2756)`
567			`000140`
568			`#2720`
569			`012754 -- mov #150,@-(r4) (to 2760)`
570			`000150`
571			`012760 -- mov #160,12(r0) (to 2762)`
572			`000160`
573			`000012`
574			`012770 -- mov #170,@24(r0) (to 2764)`
575			`000170`
576			`000024`
577			`#2740`
578			`010546 -- mov r5,-(r6)`
579			`000000 -- halt`
580			`#`
581			`wal 002770 -- data:`
582			`bwm 3`
583			`002754 -- mem(2770)=2754`
584			`002760 -- mem(2772)=2760`
585			`002764 -- mem(2774)=2764`
586			`#`
587			`C Exec code 7 (dstw modes: mov rn,xxx: all non-r modes)`
588			`#`
589			`wr0 002750 -- r0=2750`
590			`wr1 002752 -- r1=2752`
591			`wr2 002770 -- r2=2770`
592			`wr3 002760 -- r3=2760`
593			`wr4 002774 -- r4=2774`
594			`wr5 000666 -- r5=666`
595			`wsp 001400 -- sp=1400`
596			`stapc 002700 -- start @ 2700`
597			`wtgo`
598			`rr0 d=002750 -- ! r0`
599			`rr1 d=002754 -- ! r1`
600			`rr2 d=002772 -- ! r2`
601			`rr3 d=002756 -- ! r3`
602			`rr4 d=002772 -- ! r4`
603			`rr5 d=000666 -- ! r5`
604			`rsp d=001376 -- ! sp`
605			`rpc d=002744 -- ! pc`
606			`wal 002750`
607			`brm 7`
608			`d=000110 -- ! mem(2750)=110`
609			`d=000120 -- ! mem(2752)=120`
610			`d=000130 -- ! mem(2754)=130`
611			`d=000140 -- ! mem(2756)=140`
612			`d=000150 -- ! mem(2760)=150`
613			`d=000160 -- ! mem(2762)=160`
614			`d=000170 -- ! mem(2764)=170`
615			`wal 001376`
616			`rmi d=000666 -- ! mem(sp)=666`
617			`#-----------------------------------------------------------------------------`
618			`C Setup code 10 [base 3000] (dstm modes: inc xxx: all non-r modes)`
619			`#`
620			`wal 003000 -- code:`
621			`bwm 10`
622			`005210 -- inc (r0) (to 3050)`
623			`005221 -- inc (r1)+ (to 3052)`
624			`005232 -- inc @(r2)+ (to 3054)`
625			`005243 -- inc -(r3) (to 3056)`
626			`005254 -- inc @-(r4) (to 3060)`
627			`005260 -- inc 12(r0) (to 3062)`
628			`000012`
629			`005270 -- inc @24(r0) (to 3064)`
630			`#3020`
631			`000024`
632			`000000 -- halt`
633			`#`
634			`wal 003050 -- data:`
635			`bwm 7`
636			`000110 -- mem(3050)=110`
637			`000120 -- mem(3052)=120`
638			`000130 -- mem(3054)=130`
639			`000140 -- mem(3056)=140`
640			`000150 -- mem(3060)=150`
641			`000160 -- mem(3062)=160`
642			`000170 -- mem(3064)=170`
643			`wal 003070 -- data:`
644			`bwm 3`
645			`003054 -- mem(3070)=3054`
646			`003060 -- mem(3072)=3060`
647			`003064 -- mem(3074)=3064`
648			`#`
649			`C Exec code 10 (dstm modes: inc xxx: all non-r modes)`
650			`#`
651			`wr0 003050 -- r0=3050`
652			`wr1 003052 -- r1=3052`
653			`wr2 003070 -- r2=3070`
654			`wr3 003060 -- r3=3060`
655			`wr4 003074 -- r4=3074`
656			`wsp 001400 -- sp=1400`
657			`stapc 003000 -- start @ 3000`
658			`wtgo`
659			`rr0 d=003050 -- ! r0`
660			`rr1 d=003054 -- ! r1`
661			`rr2 d=003072 -- ! r2`
662			`rr3 d=003056 -- ! r3`
663			`rr4 d=003072 -- ! r4`
664			`rpc d=003024 -- ! pc`
665			`wal 003050`
666			`brm 7`
667			`d=000111 -- ! mem(3050)=111`
668			`d=000121 -- ! mem(3052)=121`
669			`d=000131 -- ! mem(3054)=131`
670			`d=000141 -- ! mem(3056)=141`
671			`d=000151 -- ! mem(3060)=151`
672			`d=000161 -- ! mem(3062)=161`
673			`d=000171 -- ! mem(3064)=171`
674			`#-----------------------------------------------------------------------------`
675			`C Setup code 11 [base 3100; use 31-32] (dsta modes: jsr pc,xxx: all non-r modes)`
676			`#`
677			`wal 003100 -- code:`
678			`bwm 10`
679			`004710 -- jsr pc,(r0) (to 3210) r0->3210`
680			`004721 -- jsr pc,(r1)+ (to 3220) r1->3220`
681			`004732 -- jsr pc,@(r2)+ (to 3230) r2->3140->3230`
682			`004743 -- jsr pc,-(r3) (to 3240) r3->3242`
683			`004754 -- jsr pc,@-(r4) (to 3250) r4->3142->3250`
684			`004760 -- jsr pc,50(r0) (to 3260) r0->3210+50->3260`
685			`000050`
686			`004770 -- jsr pc,@-44(r0) (to 3270) r0->3210-44->3144->3270`
687			`#3120`
688			`177734`
689			`000000 -- halt`
690			`#`
691			`wal 003140 -- data:`
692			`bwm 3`
693			`003230 -- mem(3140)=3230`
694			`003250 -- mem(3142)=3250`
695			`003270 -- mem(3144)=3270`
696			`#`
697			`wal 003210 -- code:`
698			`bwm 28`
699			`012725 -- mov #110,(r5)+`
700			`000110`
701			`000207 -- rts pc`
702			`000000 -- halt`
703			`#3220`
704			`012725 -- mov #120,(r5)+`
705			`000120`
706			`000207 -- rts pc`
707			`000000 -- halt`
708			`012725 -- mov #130,(r5)+`
709			`000130`
710			`000207 -- rts pc`
711			`000000 -- halt`
712			`#3240`
713			`012725 -- mov #140,(r5)+`
714			`000140`
715			`000207 -- rts pc`
716			`000000 -- halt`
717			`012725 -- mov #150,(r5)+`
718			`000150`
719			`000207 -- rts pc`
720			`000000 -- halt`
721			`#3260`
722			`012725 -- mov #160,(r5)+`
723			`000160`
724			`000207 -- rts pc`
725			`000000 -- halt`
726			`012725 -- mov #170,(r5)+`
727			`000170`
728			`000207 -- rts pc`
729			`000000 -- halt`
730			`#`
731			`C Exec code 11 (dsta modes: jsr pc,xxx: all non-r modes)`
732			`#`
733			`wr0 003210 -- r0=3210`
734			`wr1 003220 -- r1=3220`
735			`wr2 003140 -- r2=3140`
736			`wr3 003242 -- r3=3242`
737			`wr4 003144 -- r4=3144`
738			`wr5 003160 -- r5=3160`
739			`wsp 001400 -- sp=1400`
740			`stapc 003100 -- start @ 3100`
741			`wtgo`
742			`rr0 d=003210 -- ! r0=3210`
743			`rr1 d=003222 -- ! r1=3222`
744			`rr2 d=003142 -- ! r2=3142`
745			`rr3 d=003240 -- ! r3=3240`
746			`rr4 d=003142 -- ! r4=3142`
747			`rr5 d=003176 -- ! r5=3176`
748			`rsp d=001400 -- ! sp`
749			`rpc d=003124 -- ! pc`
750			`wal 003160`
751			`brm 7`
752			`d=000110 -- ! mem(3160)=110`
753			`d=000120 -- ! mem(3162)=120`
754			`d=000130 -- ! mem(3164)=130`
755			`d=000140 -- ! mem(3166)=140`
756			`d=000150 -- ! mem(3170)=150`
757			`d=000160 -- ! mem(3172)=160`
758			`d=000170 -- ! mem(3174)=170`
759			`#-----------------------------------------------------------------------------`
760			`C Setup code 12 [base 3300; use 33-34] (PSW access via sex,clx,spl,mov, and clr)`
761			`#`
762			`wal 003300 -- code:`
763			`bwm 23`
764			`011025 -- mov (r0),(r5)+`
765			`012710 -- mov #030000,(r0) ; write full PSW: pmode=um`
766			`030000`
767			`011025 -- mov (r0),(r5)+`
768			`000263 -- se(v,c)`
769			`011025 -- mov (r0),(r5)+`
770			`000237 -- spl 7`
771			`011025 -- mov (r0),(r5)+`
772			`#3320`
773			`000274 -- se(n,z)`
774			`011025 -- mov (r0),(r5)+`
775			`000233 -- spl 3`
776			`011025 -- mov (r0),(r5)+`
777			`000241 -- clc`
778			`011025 -- mov (r0),(r5)+`
779			`112710 -- movb #40,(r0) ; write PSW_low (set pri=1)`
780			`000040`
781			`#3340`
782			`011025 -- mov (r0),(r5)+`
783			`112711 -- movb #20,(r1) ; write PSW_high: pmode=sm`
784			`000020`
785			`011025 -- mov (r0),(r5)+`
786			`005010 -- clr (r0)`
787			`011025 -- mov (r0),(r5)+`
788			`000000 -- halt`
789			`#`
790			`C Exec code 12 (PSW access via sex,clx,spl,mov, and clr)`
791			`#`
792			`wps 000017 -- psw: set all condition codes (to check psw clear @ start)`
793			`#`
794			`wr0 177776 -- r0=177776`
795			`wr1 177777 -- r1=177777`
796			`wr5 003400 -- r5=3400`
797			`wsp 001400 -- sp=1400`
798			`stapc 003300 -- start @ 3300`
799			`wtgo`
800			`rr5 d=003424 -- ! r5=3424`
801			`rpc d=003356 -- ! pc`
802			`wal 003400`
803			`brm 10`
804			`d=000340 -- ! mem(3400) after start`
805			`d=030000 -- ! mem(3402) after mov #030000,(r0)`
806			`d=030003 -- ! mem(3404) after se(v,c) (VC)`
807			`d=030341 -- ! mem(3406) after spl 7 (pri=7,C)`
808			`d=030355 -- ! mem(3410) after se(n,z) (pri=7,NZC)`
809			`d=030141 -- ! mem(3412) after spl 3 (pri=3,C)`
810			`d=030140 -- ! mem(3414) after clc (pri=3)`
811			`d=030040 -- ! mem(3416) after movb #40,(r0) (pri=1)`
812			`d=010040 -- ! mem(3420) after movb #20,(r1) pmode=sm`
813			`d=000000 -- ! mem(3422) after clr (r0)`
814			`#-----------------------------------------------------------------------------`
815			`C Setup code 13 [base 3500] (test WAIT and rdma (bwm/rwm while CPU running)`
816			`#`
817			`#[[off]] - can't emulate 'sto' command in simh, rdma meaningless in simh`
818			`#`
819			`wal 003500 -- code 13.1 (to be stepped)`
820			`bwm 4`
821			`000001 -- wait`
822			`000001 -- wait`
823			`000001 -- wait`
824			`000000 -- halt`
825			`#`
826			`wal 003520 -- code 13.2 (busy loop)`
827			`bwm 3`
828			`005700 -- tst r0`
829			`001776 -- beq .-1`
830			`000000 -- halt`
831			`#`
832			`wal 003540 -- code 13.3 (just a WAIT)`
833			`bwm 2`
834			`000001 -- wait`
835			`000000 -- halt`
836			`#`
837			`C Exec code 13.1a (run WAIT)`
838			`#`
839			`stapc 003500 -- start @ 3500`
840			`.wait 20 -- let it go`
841			`rpc d=003502 -- ! should hang here ...`
842			`.wait 20 -- let it go`
843			`rpc d=003502 -- ! should hang here ...`
844			`sto`
845			`wtlam d=000001 -- harvest attn due to go 1->0 transition of sto command`
846			`rpc d=003502 -- ! should stay there ...`
847			`#`
848			`C Exec code 13.1b (step WAIT)`
849			`wpc 003500 -- pc=3500`
850			`step -- step over 1st WAIT`
851			`rpc d=003502 -- !`
852			`step -- step over 2nd WAIT`
853			`rpc d=003504 -- !`
854			`step -- step over 3rd WAIT`
855			`rpc d=003506 -- !`
856			`step -- step over HALT`
857			`rpc d=003510 -- !`
858			`#`
859			`C Exec code 13.2 (test bwm/brm while CPU busy looping)`
860			`wr0 000000 -- r0=0`
861			`stapc 003520 -- start @ 3520`
862			`#`
863			`wal 003560 -- write data while CPU active`
864			`bwm 8`
865			`003560`
866			`003562`
867			`003564`
868			`003566`
869			`003570`
870			`003572`
871			`003574`
872			`003576`
873			`wal 003560 -- read data while CPU active`
874			`brm 8`
875			`d=003560`
876			`d=003562`
877			`d=003564`
878			`d=003566`
879			`d=003570`
880			`d=003572`
881			`d=003574`
882			`d=003576`
883			`#`
884			`wr0 000001 -- r0=1 --> should end loop`
885			`wtgo`
886			`rpc d=003526 -- !`
887			`#`
888			`C Exec code 13.3 (test bwm/brm while CPU on WAIT)`
889			`#`
890			`stapc 003540 -- start @ 3540`
891			`#`
892			`wal 003560 -- write data while CPU active`
893			`bwm 8`
894			`073560`
895			`073562`
896			`073564`
897			`073566`
898			`073570`
899			`073572`
900			`073574`
901			`073576`
902			`wal 003560 -- read data while CPU active`
903			`brm 8`
904			`d=073560`
905			`d=073562`
906			`d=073564`
907			`d=073566`
908			`d=073570`
909			`d=073572`
910			`d=073574`
911			`d=073576`
912			`#`
913			`sto`
914			`wtlam d=000001 -- harvest attn due to go 1->0 transition of sto command`
915			`rpc d=003542 -- !`
916			`#[[on]]`
917			`#-----------------------------------------------------------------------------`
918			`# Setup code 14 --- code 14 doesn't exist anymore...`
919			`#-----------------------------------------------------------------------------`
920			`C Setup code 15 [base 3600; use 36-37] (test 4 traps)`
921			`#`
922			`wal 003600 -- code:`
923			`bwm 5`
924			`000003 -- bpt (to 14)`
925			`000004 -- iot (to 20)`
926			`104077 -- emt 77 (to 30)`
927			`104477 -- trap 77 (to 34)`
928			`000000 -- halt`
929			`#`
930			`wal 003620 -- code: trap handlers`
931			`bwm 11`
932			`010025 -- mov r0,(r5)+ (@ 3620)`
933			`000405 -- br .+10`
934			`010125 -- mov r1,(r5)+ (@ 3624)`
935			`000403 -- br .+6`
936			`010225 -- mov r2,(r5)+ (@ 3630)`
937			`000401 -- br .+2`
938			`010325 -- mov r3,(r5)+ (@ 3634)`
939			`#3640`
940			`011604 -- mov (sp),r4 ; r4 points after instruction`
941			`016425 -- mov -2(r4),(r5)+ ; load instruction`
942			`177776`
943			`000002 -- rti`
944			`#`
945			`wal 000014 -- vector: 14+20`
946			`bwm 4`
947			`003620 -- PC:3620`
948			`000000 -- PS:0`
949			`003624 -- PC:3624`
950			`000000 -- PS:0`
951			`wal 000030 -- vector: 30+34`
952			`bwm 4`
953			`003630 -- PC:3630`
954			`000000 -- PS:0`
955			`003634 -- PC:3634`
956			`000000 -- PS:0`
957			`#`
958			`C Exec code 15 (test 4 traps)`
959			`#`
960			`wr0 000011 -- r0=11`
961			`wr1 000022 -- r1=22`
962			`wr2 000033 -- r2=33`
963			`wr3 000044 -- r3=44`
964			`wr5 003700 -- r5=3700`
965			`wsp 001400 -- sp=140`
966			`stapc 003600 -- start @ 3600`
967			`wtgo`
968			`rr5 d=003720 -- ! r5=3720`
969			`rsp d=001400 -- ! sp`
970			`rpc d=003612 -- ! pc`
971			`wal 003700`
972			`brm 8`
973			`d=000011 -- ! mem(3700)=11`
974			`d=000003 -- ! mem(3702)=3`
975			`d=000022 -- ! mem(3704)=22`
976			`d=000004 -- ! mem(3706)=4`
977			`d=000033 -- ! mem(3710)=33`
978			`d=104077 -- ! mem(3712)=104077`
979			`d=000044 -- ! mem(3714)=44`
980			`d=104477 -- ! mem(3716)=104477`
981			`wal 000014 -- vector: 14+20 -> trap catcher again`
982			`bwm 4`
983			`000016 -- PC:16`
984			`000000 -- PS:0`
985			`000022 -- PC:22`
986			`000000 -- PS:0`
987			`wal 000030 -- vector: 30+34 -> trap catcher again`
988			`bwm 4`
989			`000032 -- PC:32`
990			`000000 -- PS:0`
991			`000036 -- PC:36`
992			`000000 -- PS:0`
993			`#-----------------------------------------------------------------------------`
994			`C Setup code 16 [base 4000] (enable MMU, check ssr1, ssr2 response)`
995			`#`
996			`wal 172516 -- SSR3`
997			`wmi 000002 -- I/D enabled for sm only (to check CRESET)`
998			`wal 177572 -- SSR0`
999			`wmi 000001 -- set enable bit`
1000			`#`
1001			`wal 004000 -- code (to be single stepped...)`
1002			`bwm 7`
1003			`011105 -- mov (r1),r5`
1004			`012105 -- mov (r1)+,r5`
1005			`014105 -- mov -(r1),r5`
1006			`012122 -- mov (r1)+,(r2)+`
1007			`112105 -- movb (r1)+,r5`
1008			`112721 -- movb #200,(r1)+`
1009			`000200`
1010			`#`
1011			`wal 004030 -- code test 1:`
1012			`wmi 000000 -- halt`
1013			`#`
1014			`wal 004040 -- data:`
1015			`bwm 2`
1016			`000001`
1017			`000300`
1018			`#`
1019			`C Exec code 16 (enable MMU, check ssr1, ssr2 response)`
1020			`#`
1021			`wr1 004040 -- r1=4040`
1022			`wr2 004060 -- r2=4060`
1023			`wsp 001400 -- sp=1400`
1024			`wpc 004000 -- pc=4000`
1025			`step -- step (mov (r1),r5)`
1026			`wal 177572 -- check SSR0/1/2`
1027			`brm 3`
1028			`d=000001 -- ! SSR0: (ena=1)`
1029			`d=000000 -- ! SSR1:`
1030			`d=004000 -- ! SSR2: 4000 (eff. PC)`
1031			`rr1 d=004040 -- ! r1`
1032			`rr5 d=000001 -- ! r5`
1033			`step -- step (mov (r1)+,r5)`
1034			`wal 177572 -- check SSR0/1/2`
1035			`brm 3`
1036			`d=000001 -- ! SSR0: (ena=1)`
1037			`d=000021 -- ! SSR1: rb none; ra=1,+2`
1038			`d=004002 -- ! SSR2: 4002 (eff. PC)`
1039			`rr1 d=004042 -- ! r1`
1040			`rr5 d=000001 -- ! r5`
1041			`step -- step (mov -(r1),r5)`
1042			`wal 177572 -- check SSR0/1/2`
1043			`brm 3`
1044			`d=000001 -- ! SSR0: (ena=1)`
1045			`d=000361 -- ! SSR1: rb none; ra=1,-2`
1046			`d=004004 -- ! SSR2: 4004 (eff. PC)`
1047			`rr1 d=004040 -- ! r1`
1048			`rr5 d=000001 -- ! r5`
1049			`step -- step (mov (r1)+,(r2)+)`
1050			`wal 177572 -- check SSR0/1/2`
1051			`brm 3`
1052			`d=000001 -- ! SSR0: (ena=1)`
1053			`d=011021 -- ! SSR1: rb=2,2; ra=1,2`
1054			`d=004006 -- ! SSR2: 4006 (eff. PC)`
1055			`rr1 d=004042 -- ! r1`
1056			`rr2 d=004062 -- ! r2`
1057			`step -- step (movb (r1)+,r5)`
1058			`wal 177572 -- check SSR0/1/2`
1059			`brm 3`
1060			`d=000001 -- ! SSR0: (ena=1)`
1061			`d=000011 -- ! SSR1: rb=none; ra=1,1`
1062			`d=004010 -- ! SSR2: 4010 (eff. PC)`
1063			`rr1 d=004043 -- ! r1`
1064			`rr5 d=177700 -- ! r5`
1065			`step -- step (movb #200,(r1)+)`
1066			`wal 177572 -- check SSR0/1/2`
1067			`brm 3`
1068			`d=000001 -- ! SSR0: (ena=1)`
1069			`d=004427 -- ! SSR1: rb=1,1; ra=7,2`
1070			`d=004012 -- ! SSR2: 4012 (eff. PC)`
1071			`rr1 d=004044 -- ! r1`
1072			`#`
1073			`C Exec test 16.1 (check CRESET of PSW, SSR0, SSR3 after start)`
1074			`#`
1075			`wps 000000 -- psw: set pri=0`
1076			`stapc 004030 -- start @ 4030 (just HALT, testing console reset)`
1077			`wtgo`
1078			`rpc d=004032 -- ! pc=4032`
1079			`rps d=000340 -- ! psw: reset by CRESET`
1080			`wal 172516 -- SSR3`
1081			`rmi d=000000 -- ! cleared by CRESET`
1082			`wal 177572 -- SSR0`
1083			`rmi d=000000 -- ! cleared by CRESET`
1084			`#-----------------------------------------------------------------------------`
1085			`C Setup code 17 [base 4100; use 41-46] (basic instruction and cc test)`
1086			`#`
1087			`wal 004100 -- code: (length 70)`
1088			`bwm 32`
1089			`010124 -- mov r1,(r4)+ (#4711, #123456)`
1090			`020124 -- cmp r1,(r4)+ (#4711, #123456)`
1091			`020224 -- cmp r2,(r4)+ (#123456,#4711)`
1092			`020124 -- cmp r1,(r4)+ (#4711, #4711)`
1093			`005024 -- clr (r4)+ (#123456)`
1094			`030124 -- bit r1,(r4)+ (#4711, #11)`
1095			`030124 -- bit r1,(r4)+ (#4711, #66)`
1096			`040124 -- bic r1,(r4)+ (#4711, #123456)`
1097			`#4120`
1098			`050124 -- bis r1,(r4)+ (#4711, #123456)`
1099			`060124 -- add r1,(r4)+ (#4711, #123456)`
1100			`160124 -- sub r1,(r4)+ (#4711, #123456)`
1101			`005124 -- com (r4)+ (#123456)`
1102			`005224 -- inc (r4)+ (#123456)`
1103			`005324 -- dec (r4)+ (#123456)`
1104			`005424 -- neg (r4)+ (#123456)`
1105			`005724 -- tst (r4)+ (#123456)`
1106			`#4140`
1107			`006024 -- ror (r4)+ (#100201) Cin=0; Cout=1`
1108			`006024 -- ror (r4)+ (#002201) Cin=1; Cout=1`
1109			`006124 -- rol (r4)+ (#100200) Cin=1; Cout=1`
1110			`006224 -- asr (r4)+ (#200)`
1111			`006224 -- asr (r4)+ (#100200)`
1112			`006324 -- asl (r4)+ (#200)`
1113			`006324 -- asl (r4)+ (#100200)`
1114			`060124 -- add r1,(r4)+ (#4711, #077777)`
1115			`#4160`
1116			`005524 -- adc (r4)+ (#200)`
1117			`160124 -- sub r1,(r4)+ (#4711, #4700)`
1118			`005624 -- sbc (r4)+ (#200)`
1119			`000324 -- swap (r4)+ (#111000)`
1120			`006724 -- sxt (r4)+ (#111111 with N=1)`
1121			`074124 -- xor r1,(r4)+ (#070707,#4711)`
1122			`006724 -- sxt (r4)+ (#111111 with N=0)`
1123			`000000 -- halt`
1124			`#`
1125			`wal 000014 -- vector: 14`
1126			`bwm 2`
1127			`004270 -- PC:4270`
1128			`000000 -- PS:0`
1129			`#-----`
1130			`wal 004270 -- code: (trap 14):`
1131			`bwm 3`
1132			`016625 -- mov 2(sp),(r5)+`
1133			`000002`
1134			`000006 -- rtt`
1135			`#-----`
1136			`wal 004300 -- data 1: (length 66)`
1137			`bwm 31`
1138			`123456 --`
1139			`123456 --`
1140			`004711 --`
1141			`004711 --`
1142			`123456 --`
1143			`000011 --`
1144			`000066 --`
1145			`123456 --`
1146			`#4320`
1147			`123456 --`
1148			`123456 --`
1149			`123456 --`
1150			`123456 --`
1151			`123456 --`
1152			`123456 --`
1153			`123456 --`
1154			`123456 --`
1155			`#4340`
1156			`100201 --`
1157			`002201 --`
1158			`100200 --`
1159			`000200 --`
1160			`100200 --`
1161			`000200 --`
1162			`100200 --`
1163			`177000 --`
1164			`#4360`
1165			`000200 --`
1166			`004701 --`
1167			`000200 --`
1168			`111000 --`
1169			`111111 --`
1170			`070707 --`
1171			`111111 --`
1172			`#`
1173			`C Exec code 17 (basic instruction and cc test)`
1174			`#`
1175			`wr1 004711 -- r1=4711`
1176			`wr2 123456 -- r2=123456`
1177			`wr4 004300 -- r4=4300`
1178			`wr5 004500 -- r5=4500`
1179			`wsp 001374 -- sp=1374`
1180			`wal 001374 -- setup stack with rtt return frame setting T flag`
1181			`bwm 2`
1182			`004100 -- start address (code 17 @ 4100)`
1183			`000020 -- set T flag in PSW`
1184			`stapc 004274 -- start @ 4274 -> rtt -> 4100 from stack`
1185			`wtgo`
1186			`rr1 d=004711 -- ! r1=4711`
1187			`rr2 d=123456 -- ! r2=123456`
1188			`rr4 d=004376 -- ! r4=4376`
1189			`rr5 d=004576 -- ! r5=4576`
1190			`rsp d=001400 -- ! sp=1400`
1191			`rpc d=004200 -- ! pc=4200`
1192			`wal 004300`
1193			`brm 31`
1194			`d=004711 -- ! mem(4300)=004711; mov r1,(r4)+ (#4711, #123456)`
1195			`d=123456 -- ! mem(4302)=123456; cmp r1,(r4)+ (#4711, #123456)`
1196			`d=004711 -- ! mem(4304)=004711; cmp r1,(r4)+ (#123456,#4711)`
1197			`d=004711 -- ! mem(4306)=004711; cmp r1,(r4)+ (#4711, #4711)`
1198			`d=000000 -- ! mem(4310)=000000; clr (r4)+ (#123456)`
1199			`d=000011 -- ! mem(4312)=000011; bit r1,(r4)+ (#4711, #11)`
1200			`d=000066 -- ! mem(4314)=000066; bit r1,(r4)+ (#4711, #66)`
1201			`d=123046 -- ! mem(4316)=123046; bic r1,(r4)+ (#4711, #123456)`
1202			`d=127757 -- ! mem(4320)=127757; bis r1,(r4)+ (#4711, #123456)`
1203			`d=130367 -- ! mem(4322)=130367; add r1,(r4)+ (#4711, #123456)`
1204			`d=116545 -- ! mem(4324)=116545; sub r1,(r4)+ (#4711, #123456)`
1205			`d=054321 -- ! mem(4326)=054321; com (r4)+ (#123456)`
1206			`d=123457 -- ! mem(4330)=123457; inc (r4)+ (#123456)`
1207			`d=123455 -- ! mem(4332)=123455; dec (r4)+ (#123456)`
1208			`d=054322 -- ! mem(4334)=054322; neg (r4)+ (#123456)`
1209			`d=123456 -- ! mem(4336)=123456; tst (r4)+ (#123456)`
1210			`d=040100 -- ! mem(4340)=040100; ror (r4)+ (#100201)`
1211			`d=101100 -- ! mem(4342)=101100; ror (r4)+ (#002201)`
1212			`d=000401 -- ! mem(4344)=000401; rol (r4)+ (#100200)`
1213			`d=000100 -- ! mem(4346)=000100; asr (r4)+ (#200)`
1214			`d=140100 -- ! mem(4350)=140100; asr (r4)+ (#100200)`
1215			`d=000400 -- ! mem(4352)=000400; asl (r4)+ (#200)`
1216			`d=000400 -- ! mem(4354)=000400; asl (r4)+ (#100200)`
1217			`d=003711 -- ! mem(4356)=003711; add r1,(r4)+ (#4711, ,#177000)`
1218			`d=000201 -- ! mem(4360)=000201; adc (r4)+ (#200)`
1219			`d=177770 -- ! mem(4362)=177770; sub r1,(r4)+ (#4711, #4701)`
1220			`d=000177 -- ! mem(4364)=000177; sbc (r4)+ (#200)`
1221			`d=000222 -- ! mem(4366)=000222; swap (r4)+ (#111000)`
1222			`d=177777 -- ! mem(4370)=177777; sxt (r4)+ (#111111)`
1223			`d=074016 -- ! mem(4372)=074016; xor r1,(r4)+ (#070707)`
1224			`d=000000 -- ! mem(4374)=000000; sxt (r4)+ (#111111)`
1225			`#`
1226			`wal 004500 -- NZVC`
1227			`brm 31`
1228			`d=000020 -- ! mem(4500)=0000; mov r1,(r4)+ (#4711, #123456)`
1229			`d=000021 -- ! mem(4502)=000C; cmp r1,(r4)+ (#4711, #123456)`
1230			`d=000030 -- ! mem(4504)=N000; cmp r1,(r4)+ (#123456,#4711)`
1231			`d=000024 -- ! mem(4506)=0Z00; cmp r1,(r4)+ (#4711, #4711)`
1232			`d=000024 -- ! mem(4510)=0Z00; clr (r4)+ (#123456)`
1233			`d=000020 -- ! mem(4512)=0000; bit r1,(r4)+ (#4711, #11)`
1234			`d=000024 -- ! mem(4514)=0Z00; bit r1,(r4)+ (#4711, #66)`
1235			`d=000030 -- ! mem(4516)=N000; bic r1,(r4)+ (#4711, #123456)`
1236			`d=000030 -- ! mem(4520)=N000; bis r1,(r4)+ (#4711, #123456)`
1237			`d=000030 -- ! mem(4522)=N000; add r1,(r4)+ (#4711, #123456)`
1238			`d=000030 -- ! mem(4524)=N000; sub r1,(r4)+ (#4711, #123456)`
1239			`d=000021 -- ! mem(4526)=000C; com (r4)+ (#123456)`
1240			`d=000031 -- ! mem(4530)=N00C; inc (r4)+ (#123456) keep C!`
1241			`d=000031 -- ! mem(4532)=N00C; dec (r4)+ (#123456) keep C!`
1242			`d=000021 -- ! mem(4534)=000C; neg (r4)+ (#123456)`
1243			`d=000030 -- ! mem(4536)=N000; tst (r4)+ (#123456)`
1244			`d=000023 -- ! mem(4540)=00VC; ror (r4)+ (#100201)`
1245			`d=000031 -- ! mem(4542)=N00C; ror (r4)+ (#002201)`
1246			`d=000023 -- ! mem(4544)=00VC; rol (r4)+ (#100200)`
1247			`d=000020 -- ! mem(4546)=0000; asr (r4)+ (#200)`
1248			`d=000032 -- ! mem(4550)=N0V0; asr (r4)+ (#100200)`
1249			`d=000020 -- ! mem(4552)=0000; asl (r4)+ (#200)`
1250			`d=000023 -- ! mem(4554)=00VC; asl (r4)+ (#100200)`
1251			`d=000021 -- ! mem(4556)=000C; add r1,(r4)+ (#4711, ,#177000)`
1252			`d=000020 -- ! mem(4560)=0000; adc (r4)+ (#200)`
1253			`d=000031 -- ! mem(4562)=N00C; sub r1,(r4)+ (#4711, #4701)`
1254			`d=000020 -- ! mem(4564)=0000; sbc (r4)+ (#200)`
1255			`d=000030 -- ! mem(4566)=N000; swap (r4)+ (#111000)`
1256			`d=000030 -- ! mem(4570)=N000; sxt (r4)+ (#111111 with N=1)`
1257			`d=000020 -- ! mem(4572)=0000; xor r1,(r4)+ (#4711, #070707)`
1258			`d=000024 -- ! mem(4574)=0Z00; sxt (r4)+ (#111111 with N=0)`
1259			`#`
1260			`rst -- console reset (to clear T flag)`
1261			`wal 000014 -- vector: 14 -> trap catcher again`
1262			`bwm 2`
1263			`000016 -- PC:16`
1264			`000000 -- PS:0`
1265			`#-----------------------------------------------------------------------------`
1266			`C Setup code 20 [base 4700] (check CPUERR and error handling)`
1267			`#[[off]]`
1268			`wal 004700 -- code (to be single stepped...)`
1269			`bwm 11`
1270			`010025 -- mov r0,(r5)+ (@ 4777)`
1271			`010025 -- mov r0,(r5)+ (@ 150000)`
1272			`010025 -- mov r0,(r5)+ (@ 160000)`
1273			`000101 -- jmp r1`
1274			`004701 -- jsr pc,r1`
1275			`000000 -- halt`
1276			`014321 -- mov -(r3),(r1)+ (@ 20000)`
1277			`024321 -- cmp -(r3),(r1)+ (@ 20400)`
1278			`#4720`
1279			`064321 -- add -(r3),(r1)+ (@ 20000)`
1280			`010046 -- mov r0,-(sp) (@ 340)`
1281			`000004 -- iot (with sp=342,...)`
1282			`#`
1283			`wal 000004 -- vector: 4+10 (trap catch)`
1284			`bwm 4`
1285			`000006 -- PC:6`
1286			`000000 -- PS:0`
1287			`000012 -- PC:12`
1288			`000000 -- PS:0`
1289			`#----------`
1290			`C Exec code 20 (check CPUERR and error handling)`
1291			`C Exec test 20.1 (odd address abort)`
1292			`rst -- console reset`
1293			`wps 000000 -- psw: clear`
1294			`wal 001374 -- clean stack`
1295			`bwm 2`
1296			`000000 --`
1297			`000000 --`
1298			`wal 177766 -- check initial CPUERR (=0!)`
1299			`rm d=000000 -- !`
1300			`wr0 000011 -- r0=11`
1301			`wr5 004775 -- r5=4775`
1302			`wsp 001400 -- sp=1400`
1303			`wpc 004700 -- pc=4700`
1304			`step -- step (mov r0,(r5)+): trap 4 + CPUERR.adderr set [[s:2]]`
1305			`rpc d=000006 -- ! pc=6 (trap 4 catch)`
1306			`rsp d=001374 -- ! sp=1374`
1307			`wal 001374 -- check stack`
1308			`brm 2`
1309			`d=004702 -- ! pc=4702`
1310			`d=000000 -- ! ps=0`
1311			`wal 177766 -- check CPUERR`
1312			`rm d=000100 -- ! CPUERR: (adderr=1)`
1313			`wm 000000 -- any write access will clear CPUERR`
1314			`rm d=000000 -- ! CPUERR: 0`
1315			`#----------`
1316			`C Exec test 20.2 (non-existent memory abort)`
1317			`wal 172354 -- kernel I space AR(6)`
1318			`wm 177400 -- (map to 8 k below I/O page, never available in w11a)`
1319			`wal 177572 -- SSR0`
1320			`wmi 000001 -- enable`
1321			`wal 172516 -- SSR3`
1322			`wmi 000020 -- ena_22bit=1`
1323			`#`
1324			`wr5 140000 -- r5=140000`
1325			`wsp 001400 -- sp=1400`
1326			`wpc 004702 -- pc=4702`
1327			`step -- step (mov r0,(r5)+): trap 4 + CPUERR.nxm set [[s:2]]`
1328			`rpc d=000006 -- ! pc= 6 (trap 4 catch)`
1329			`rsp d=001374 -- ! sp=1374`
1330			`wal 177766 -- check CPUERR`
1331			`rm d=000040 -- ! CPUERR: (nxm=1)`
1332			`wm 000000 -- any write access will clear CPUERR`
1333			`rm d=000000 -- ! CPUERR: 0`
1334			`#`
1335			`wal 177572 -- SSR0`
1336			`wmi 000000 -- disable`
1337			`wal 172354 -- kernel I space AR(6)`
1338			`wm 001400 -- 1400 140000 base (default 1-to-1 map)`
1339			`#----------`
1340			`C Exec test 20.3 (I/O bus timeout abort)`
1341			`wr5 160000 -- r5=160000`
1342			`wsp 001400 -- sp=1400`
1343			`wpc 004704 -- pc=4704`
1344			`step -- step (mov r0,(r5)+): trap 4 + CPUERR.iobto set [[s:2]]`
1345			`rpc d=000006 -- ! pc= 6 (trap 4 catch)`
1346			`rsp d=001374 -- ! sp=1374`
1347			`wal 177766 -- check CPUERR`
1348			`rm d=000020 -- ! CPUERR: (iobto=1)`
1349			`wm 000000 -- clear CPUERR`
1350			`#----------`
1351			`C Exec test 20.4 (address error abort after jmp r1)`
1352			`wsp 001400 -- sp=1400`
1353			`wpc 004706 -- pc=4706`
1354			`step -- step (jmp r1): trap 10 [[s:2]]`
1355			`rpc d=000012 -- ! pc=12 (trap 10 catch)`
1356			`rsp d=001374 -- ! sp=1374`
1357			`wal 177766 -- check CPUERR`
1358			`rm d=000000 -- ! CPUERR: none`
1359			`wm 000000 -- clear CPUERR`
1360			`#----------`
1361			`C Exec test 20.5 (address error abort after jsr pc,r1)`
1362			`wsp 001400 -- sp=1400`
1363			`wpc 004710 -- pc=4710`
1364			`step -- step (jsr pc,r1): trap 10 [[s:2]]`
1365			`rpc d=000012 -- ! pc=12 (trap 10 catch)`
1366			`rsp d=001374 -- ! sp=1374`
1367			`wal 177766 -- check CPUERR`
1368			`rm d=000000 -- ! CPUERR: none`
1369			`wm 000000 -- clear CPUERR`
1370			`#----------`
1371			`C Exec test 20.6 (halt in user mode)`
1372			`wsp 001400 -- sp=1400 (kernel)`
1373			`wpc 004712 -- pc=4712`
1374			`wps 170000 -- psw: cmode=pmode=11 (user)`
1375			`step -- step (halt): trap 4 + CPUERR.illhlt set [[s:2]]`
1376			`rpc d=000006 -- ! pc=6 (trap 4 catch)`
1377			`rsp d=001374 -- ! sp=1374 (now kernel again...)`
1378			`wal 001374 -- check stack`
1379			`brm 2`
1380			`d=004714 -- !`
1381			`d=170000 -- !`
1382			`wal 177766 -- check CPUERR`
1383			`rm d=000200 -- ! CPUERR: (illhlt=1)`
1384			`wm 000000 -- clear CPUERR`
1385			`#`
1386			`wps 000000 -- psw: cmode=pmode=0 (kernel)`
1387			`#----------`
1388			`#`
1389			`# test mmu aborts`
1390			`#`
1391			`wal 000250 -- vector: 250 -> trap catcher`
1392			`bwm 2`
1393			`000252 -- PC:252`
1394			`000000 -- PS:0`
1395			`#`
1396			`wal 177572 -- SSR0`
1397			`wmi 000001 -- enable`
1398			`wal 172302 -- kernel I space DR segment 1 (base 20000)`
1399			`wmi 077400 -- slf=127; ed=0(up); acf=0 (non-resident)`
1400			`#----------`
1401			`C Exec test 20.7 (non resident abort)`
1402			`wr1 020000 -- r1=20000`
1403			`wr3 000016 -- r3=16 ; the -(r3) fetches the mem(14)=16`
1404			`wsp 001400 -- sp=1400`
1405			`wpc 004714 -- pc=4714`
1406			`step -- step (mov -(r3),(r1)+): abort to 250 [[s:2]]`
1407			`rr1 d=020002 -- ! r1=20002 (inc done before trap (here dstw))`
1408			`rr3 d=000014 -- ! r3=16 (dec done before trap)`
1409			`rpc d=000252 -- ! pc=252 (trap 250 catch)`
1410			`rsp d=001374 -- ! sp=1374`
1411			`wal 177572 -- check SSR0/1/2`
1412			`brm 3`
1413			`d=100003 -- ! SSR0: (abo_nonres=1,seg=1,ena=1)`
1414			`d=010763 -- ! SSR1: rb=1,2; ra=3,-2`
1415			`d=004714 -- ! SSR2: 4714 (eff. PC)`
1416			`#`
1417			`wal 177572 -- SSR0`
1418			`wmi 000001 -- enable and clear error bits`
1419			`#----------`
1420			`C Exec test 20.8 (segment length violation abort)`
1421			`wal 172302 -- kernel I space DR segment 1 (base 20000)`
1422			`wmi 001406 -- slf=3; ed=0(up); acf=6 (w/r)`
1423			`#`
1424			`wr1 020400 -- r1=20400`
1425			`wr3 000016 -- r3=16 ; the -(r3) fetches the mem(14)=16`
1426			`wsp 001400 -- sp=1400`
1427			`wpc 004716 -- pc=4716`
1428			`step -- step (cmp -(r3),(r1)+): abort to 250 [[s:2]]`
1429			`rr1 d=020402 -- ! r1=20402 (inc done before trap (here dstr))`
1430			`rr3 d=000014 -- ! r3=16 (dec done before trap)`
1431			`rpc d=000252 -- ! pc=252 (trap 250 catch)`
1432			`rsp d=001374 -- ! sp=1374`
1433			`wal 177572 -- check SSR0/1/2`
1434			`brm 3`
1435			`d=040003 -- ! SSR0: (abo_length=1,seg=1,ena=1)`
1436			`d=010763 -- ! SSR1: rb=1,2; ra=3,-2`
1437			`d=004716 -- ! SSR2: 4716 (eff. PC)`
1438			`#`
1439			`wal 177572 -- SSR0`
1440			`wmi 000001 -- enable and clear error bits`
1441			`#----------`
1442			`C Exec test 20.9 (read-only abort)`
1443			`wal 172302 -- kernel I space DR segment 1 (base 20000)`
1444			`wmi 077402 -- slf=127; ed=0(up); acf=2 (read-only)`
1445			`#`
1446			`wr1 020000 -- r1=20000`
1447			`wr3 000016 -- r3=16 ; the -(r3) fetches the mem(14)=16`
1448			`wsp 001400 -- sp=1400`
1449			`wpc 004720 -- pc=4720`
1450			`step -- step (add -(r3),(r1)+): abort to 250 [[s:2]]`
1451			`rr1 d=020002 -- ! r1=20000 (inc done before trap (here dstm))`
1452			`rr3 d=000014 -- ! r3=16 (dec done before trap)`
1453			`rpc d=000252 -- ! pc=252 (trap 250 catch)`
1454			`rsp d=001374 -- ! sp=1374`
1455			`wal 177572 -- check SSR0/1/2`
1456			`brm 3`
1457			`d=020003 -- ! SSR0: (abo_rdonly=1,seg=1,ena=1)`
1458			`d=010763 -- ! SSR1: rb=1,2; ra=3,-2`
1459			`d=004720 -- ! SSR2: 4720 (eff. PC)`
1460			`#`
1461			`# mmu back to default setup, disable`
1462			`wal 172302 -- kernel I space DR segment 1 (base 20000)`
1463			`wmi 077406 -- slf=127; ed=0(up); acf=6 (r/w)`
1464			`wal 177572 -- SSR0`
1465			`wmi 000000 -- disable`
1466			`#----------`
1467			`#`
1468			`# test mmu trap`
1469			`#`
1470			`wal 177572 -- SSR0`
1471			`wmi 001001 -- enable, trap enable`
1472			`wal 172302 -- kernel I space DR segment 1 (base 20000)`
1473			`wmi 077404 -- slf=127; ed=0(up); acf=4 (r/w, trap on r/w)`
1474			`#----------`
1475			`C Exec test 20.10 (trap on write)`
1476			`wr1 020000 -- r1=20000`
1477			`wr3 000016 -- r3=16 ; the -(r3) fetches the mem(14)=16`
1478			`wsp 001400 -- sp=1400`
1479			`wpc 004714 -- pc=4714`
1480			`step -- step (mov -(r3),(r1)+): trap to 250 [[s:2]]`
1481			`rr1 d=020002 -- ! r1=20002 (inc done before trap)`
1482			`rr3 d=000014 -- ! r3=16 (dec done before trap)`
1483			`rpc d=000252 -- ! pc=252 (trap 250 catch)`
1484			`rsp d=001374 -- ! sp=1374`
1485			`wal 020000 -- check target area`
1486			`rm d=000016 -- ! mem(20000)=16`
1487			`wm 000000 -- clean tainted memory`
1488			`wal 177572 -- check SSR0`
1489			`brm 3`
1490			`d=011001 -- ! SSR0: (trap_mmu=1,ena_trap=1,seg=0,ena=1)`
1491			`d=010763 -- ! SSR1: rb=1,2; ra=3,-2`
1492			`d=004714 -- ! SSR2: 4714 (eff. PC)`
1493			`#----------`
1494			`C Exec test 20.11 (2nd write, should not trap again)`
1495			`wr1 020002 -- r1=20002`
1496			`wr3 000016 -- r3=16 ; the -(r3) fetches the mem(14)=16`
1497			`wsp 001400 -- sp=1400`
1498			`wpc 004714 -- pc=4714`
1499			`step -- step (mov -(r3),(r1)+): no trap [[s:2]]`
1500			`rr1 d=020004 -- ! r1=20004 (inc done before trap)`
1501			`rr3 d=000014 -- ! r3=16 (dec done before trap)`
1502			`rpc d=004716 -- ! pc=252 (trap 250 catch)`
1503			`rsp d=001400 -- ! sp=1374`
1504			`wal 020002 -- check target area`
1505			`rm d=000016 -- ! mem(20002)=16`
1506			`wm 000000 -- clean tainted memory`
1507			`wal 177572 -- check SSR0`
1508			`brm 3`
1509			`d=011003 -- ! SSR0: (trap_mmu=1,ena_trap=1,seg=1,ena=1)`
1510			`d=010763 -- ! SSR1: rb=1,2; ra=3,-2`
1511			`d=004714 -- ! SSR2: 4714 (eff. PC)`
1512			`#`
1513			`# mmu back to default setup, disable`
1514			`wal 172302 -- kernel I space DR segment 1 (base 20000)`
1515			`wmi 077406 -- slf=127; ed=0(up); acf=6 (r/w)`
1516			`wal 177572 -- SSR0`
1517			`wmi 000000 -- disable`
1518			`#----------`
1519			`#`
1520			`# now test stack limit logic`
1521			`#`
1522			`C Exec test 20.12 (red stack abort when pushing data to stack)`
1523			`wr0 123456 -- r0=123456`
1524			`wsp 000340 -- sp=340`
1525			`wpc 004722 -- pc=4722`
1526			`step -- step (mov r0,-(sp)): abort to 4 [[s:2]]`
1527			`rpc d=000006 -- ! pc=6 (trap 4 catch)`
1528			`rsp d=000000 -- ! sp=0`
1529			`wal 000336 -- check that stack wasn't written`
1530			`rm d=000000 -- ! mem(336) untainted`
1531			`wal 000000 -- check emergency stack at 0,2`
1532			`brm 2`
1533			`d=004724 -- ! mem(0): PC`
1534			`d=000010 -- ! mem(2): PS`
1535			`wal 177766 -- check CPUERR`
1536			`rm d=000004 -- ! CPUERR: (rsv=1)`
1537			`wm 000000 -- clear CPUERR`
1538			`#----------`
1539			`C Exec test 20.13 (red stack abort on 2nd word of interrupt/trap push)`
1540			`wps 000017 -- psw: set all cc flags`
1541			`wsp 000342 -- sp=342`
1542			`wpc 004724 -- pc=4724`
1543			`step -- step (iot): abort to 4 [[s:2]]`
1544			`rpc d=000006 -- ! pc=6 (trap 4 catch)`
1545			`rsp d=000000 -- ! sp=0`
1546			`wal 000336 -- check stack`
1547			`brm 2`
1548			`d=000000 -- ! mem(336) untainted`
1549			`d=000017 -- ! mem(340) PS of 1st attempt`
1550			`wal 000000 -- check emergency stack at 0,2`
1551			`brm 2`
1552			`d=004726 -- ! mem(0): PC`
1553			`d=000000 -- ! mem(2): PS (will be 0, orgininal PS lost !!)`
1554			`wal 177766 -- check CPUERR`
1555			`rm d=000004 -- ! CPUERR: (rsv=1)`
1556			`wm 000000 -- clear CPUERR`
1557			`#----------`
1558			`C Exec test 20.14 (yellow stack trap when pushing data to stack; sp=400)`
1559			`wps 000017 -- psw: set all cc flags`
1560			`wr0 123456 -- r0=123456`
1561			`wsp 000400 -- sp=400`
1562			`wpc 004722 -- pc=4722`
1563			`step -- step (mov r0,-(sp)): trap to 4`
1564			`rpc d=000006 -- ! pc=6 (trap 4 catch)`
1565			`rsp d=000372 -- ! sp=372`
1566			`wal 000372 -- check stack`
1567			`brm 3`
1568			`d=004724 -- ! mem(372) PC of trapped instruction`
1569			`d=000011 -- ! mem(374) PS of trapped instruction`
1570			`d=123456 -- ! mem(376) pushed word`
1571			`wal 177766 -- check CPUERR`
1572			`rm d=000010 -- ! CPUERR: (ysv=1)`
1573			`wm 000000 -- clear CPUERR`
1574			`#----------`
1575			`C Exec test 20.15 (yellow stack trap on 2nd word of interrupt/trap push; sp=402)`
1576			`wps 000017 -- psw: set all cc flags`
1577			`wsp 000402 -- sp=402`
1578			`wpc 004724 -- pc=4724`
1579			`step -- step (iot): abort to 4 [[s:2]]`
1580			`rpc d=000006 -- ! pc=6 (trap 4 catch)`
1581			`rsp d=000372 -- ! sp=372`
1582			`wal 000372 -- check stack`
1583			`brm 4`
1584			`d=000022 -- ! mem(372) PC of IOT handler`
1585			`d=000000 -- ! mem(374) PS of IOT handler`
1586			`d=004726 -- ! mem(376) PC of IOT trap`
1587			`d=000017 -- ! mem(400) PS of IOT trap`
1588			`wal 177766 -- check CPUERR`
1589			`rm d=000010 -- ! CPUERR: (ysv=1)`
1590			`wm 000000 -- clear CPUERR`
1591			`#----------`
1592			`# now test red stack escalation`
1593			`#`
1594			`C Exec test 20.16 (red stack escalation: abort kernel stack odd; sp=1001)`
1595			`wr0 123456 -- r0=123456`
1596			`wsp 001001 -- sp=1001`
1597			`wpc 004722 -- pc=4722`
1598			`step -- step (mov r0,-(sp)): abort to 4 [[s:2]]`
1599			`rpc d=000006 -- ! pc=6 (trap 4 catch)`
1600			`rsp d=000000 -- ! sp=0`
1601			`wal 000000 -- check emergency stack at 0,2`
1602			`brm 2`
1603			`d=004724 -- ! mem(0): PC`
1604			`d=000010 -- ! mem(2): PS`
1605			`wal 177766 -- check CPUERR`
1606			`rm d=000104 -- ! CPUERR: (rsv=1,adderr=1)`
1607			`wm 000000 -- clear CPUERR`
1608			`#----------`
1609			`C Exec test 20.17 (red stack escalation: abort kernel stack in non-mem)`
1610			`wal 172354 -- kernel I space AR(6)`
1611			`wm 177400 -- (map to 8 k below I/O page, never available in w11a)`
1612			`wal 177572 -- SSR0`
1613			`wmi 000001 -- enable`
1614			`wal 172516 -- SSR3`
1615			`wmi 000020 -- ena_22bit=1`
1616			`#`
1617			`wr0 123456 -- r0=123456`
1618			`wsp 140004 -- sp=140004`
1619			`wpc 004722 -- pc=4722`
1620			`step -- step (mov r0,-(sp)): abort to 4 [[s:2]]`
1621			`rpc d=000006 -- ! pc=6 (trap 4 catch)`
1622			`rsp d=000000 -- ! sp=0`
1623			`wal 000000 -- check emergency stack at 0,2`
1624			`brm 2`
1625			`d=004724 -- ! mem(0): PC`
1626			`d=000010 -- ! mem(2): PS`
1627			`wal 177766 -- check CPUERR`
1628			`rm d=000044 -- ! CPUERR: (rsv=1,nxm=1)`
1629			`wm 000000 -- clear CPUERR`
1630			`#`
1631			`wal 177572 -- SSR0`
1632			`wmi 000000 -- disable`
1633			`wal 172354 -- kernel I space AR(6)`
1634			`wm 001400 -- 1400 140000 base (default 1-to-1 map)`
1635			`#----------`
1636			`C Exec test 20.18 (red stack escalation: abort kernel stack iob-to;sp=160004)`
1637			`wr0 123456 -- r0=123456`
1638			`wsp 160004 -- sp=160004`
1639			`wpc 004722 -- pc=4722`
1640			`step -- step (mov r0,-(sp)): abort to 4 [[s:2]]`
1641			`rpc d=000006 -- ! pc=6 (trap 4 catch)`
1642			`rsp d=000000 -- ! sp=0`
1643			`wal 000000 -- check emergency stack at 0,2`
1644			`brm 2`
1645			`d=004724 -- ! mem(0): PC`
1646			`d=000010 -- ! mem(2): PS`
1647			`wal 177766 -- check CPUERR`
1648			`rm d=000024 -- ! CPUERR: (rsv=1,iobto=1)`
1649			`wm 000000 -- clear CPUERR`
1650			`#----------`
1651			`C Exec test 20.19 (red stack escalation: abort kernel stack mmu abort;sp=020004)`
1652			`#`
1653			`wal 177572 -- SSR0`
1654			`wmi 000001 -- enable`
1655			`wal 172302 -- kernel I space DR segment 1 (base 20000)`
1656			`wmi 077400 -- slf=127; ed=0(up); acf=0 (non-resident)`
1657			`#`
1658			`wr0 123456 -- r0=123456`
1659			`wsp 020004 -- sp=020004`
1660			`wpc 004722 -- pc=4722`
1661			`step -- step (mov r0,-(sp)): abort to 4 [[s:2]]`
1662			`rpc d=000006 -- ! pc=6 (trap 4 catch)`
1663			`rsp d=000000 -- ! sp=0`
1664			`wal 020002 -- check that stack wasn't written`
1665			`rm d=000000 -- ! mem(20002) untainted`
1666			`wal 000000 -- check emergency stack at 0,2`
1667			`brm 2`
1668			`d=004724 -- ! mem(0): PC`
1669			`d=000010 -- ! mem(2): PS`
1670			`wal 177766 -- check CPUERR`
1671			`rm d=000104 -- ! CPUERR: (rsv=1,adderr=1)`
1672			`wm 000000 -- clear CPUERR`
1673			`# mmu back to default setup`
1674			`wal 172302 -- kernel I space DR segment 1 (base 20000)`
1675			`wmi 077406 -- slf=127; ed=0(up); acf=6 (r/w)`
1676			`wal 177572 -- SSR0`
1677			`wmi 000000 -- disable`
1678			`wal 172516 -- SSR3`
1679			`wmi 000000 -- disable`
1680			`#`
1681			`#[[on]]`
1682			`#-----------------------------------------------------------------------------`
1683			`C Setup code 21 [base 4740] (MTPx/MFPx; MMU for user mode with I/D)`
1684			`#`
1685			`#use setting as for test 22`
1686			`wal 177600 -- user I space DR`
1687			`wmi 077406 -- slf=127; ed=0(up); acf=6(w/r)`
1688			`wal 177620 -- user D space DR`
1689			`wmi 077406 -- slf=127; ed=0(up); acf=6(w/r)`
1690			`wal 177640 -- user I space AR`
1691			`wmi 000053 -- 53 -> maps 0 -> 5300`
1692			`wal 177660 -- user D space AR`
1693			`wmi 000055 -- 55 -> maps 0 -> 5500`
1694			`wal 177572 -- SSR0`
1695			`wmi 000001 -- set enable bit`
1696			`wal 172516 -- SSR3`
1697			`wmi 000001 -- enable D space for user mode`
1698			`#`
1699			`wal 004740 -- code (to be single stepped...)`
1700			`bwm 6`
1701			`006610 -- mtpi (r0)`
1702			`106610 -- mtpd (r0)`
1703			`006606 -- mtpi r6`
1704			`006510 -- mfpi (r0)`
1705			`106510 -- mfpd (r0)`
1706			`006506 -- mfpi r6`
1707			`#`
1708			`C Exec code 21 (MTPx/MFPx; MMU for user mode with I/D)`
1709			`#`
1710			`wps 030000 -- psw: cmode=0, pmode=11`
1711			`wal 001372 -- setup kernel stack`
1712			`bwm 3`
1713			`012300 --`
1714			`001230 --`
1715			`000666 --`
1716			`wr0 000002 -- r0=2`
1717			`wsp 001372 -- sp=1372`
1718			`#`
1719			`wpc 004740 -- pc=4740`
1720			`step -- step (mtpi (r0))`
1721			`rpc d=004742 -- ! pc=next`
1722			`rsp d=001374 -- ! sp=1374 (one popped)`
1723			`wal 005302 -- user I base`
1724			`rm d=012300 -- ! mem_ui(2) = 012300`
1725			`#`
1726			`step -- step (mtpd (r0))`
1727			`rpc d=004744 -- ! pc=next`
1728			`rsp d=001376 -- ! sp=1376 (one popped)`
1729			`wal 005502 -- user D base`
1730			`rm d=001230 -- ! mem_ud(2) = 001230`
1731			`#`
1732			`step -- step (mtpi r6)`
1733			`rpc d=004746 -- ! pc=next`
1734			`rsp d=001400 -- ! sp=1400 (one popped)`
1735			`wps 170000 -- psw: cmode=11, pmode=11`
1736			`rsp d=000666 -- ! sp_um=666 [[usp]]`
1737			`wps 030000 -- psw: cmode=0, pmode=11`
1738			`#`
1739			`wal 001374 -- clear stack`
1740			`bwm 3`
1741			`000000 --`
1742			`000000 --`
1743			`000000 --`
1744			`#`
1745			`step -- step (mfpi (r0))`
1746			`rpc d=004750 -- ! pc=next`
1747			`rsp d=001376 -- ! sp=1376 (one pushed)`
1748			`wal 001376 -- top of stack`
1749			`rm d=012300 -- !`
1750			`#`
1751			`step -- step (mfpd (r0))`
1752			`rpc d=004752 -- ! pc=next`
1753			`rsp d=001374 -- ! sp=1374 (one pushed)`
1754			`wal 001374 -- top of stack`
1755			`rm d=001230 -- !`
1756			`#`
1757			`step -- step (mtpi r6)`
1758			`rpc d=004754 -- ! pc=next`
1759			`rsp d=001372 -- ! sp=1372 (one pushed)`
1760			`wal 001372 -- top of stack`
1761			`rm d=000666 -- !`
1762			`#`
1763			`wal 005302 -- clean tainted memory`
1764			`wm 000000 --`
1765			`wal 005502 --`
1766			`wm 000000 --`
1767			`#`
1768			`wps 000000 -- psw: cmode=pmode=0 (kernel)`
1769			`#-----------------------------------------------------------------------------`
1770			`C Setup code 22 [base 5000, use 50-57] (MMU ; run user mode code with I/D)`
1771			`#`
1772			`wal 177600 -- user I space DR`
1773			`wmi 000002 -- slf=0; ed=0(up); acf=2(read-only)`
1774			`wal 177620 -- user D space DR`
1775			`wmi 000006 -- slf=0; ed=0(up); acf=6(w/r)`
1776			`wal 177640 -- user I space AR`
1777			`wmi 000053 -- 53 -> maps 0 -> 5300`
1778			`wal 177660 -- user D space AR`
1779			`wmi 000055 -- 55 -> maps 0 -> 5500`
1780			`wal 177572 -- SSR0`
1781			`wmi 000001 -- set enable bit`
1782			`wal 172516 -- SSR3`
1783			`wmi 000001 -- enable D space for user mode`
1784			`#`
1785			`wal 005000 -- code (kernel):`
1786			`bwm 5`
1787			`012746 -- mov #144000,-(sp) ;PS for RTI`
1788			`174000 -- cmode=11,pmode=11,rset=1`
1789			`012746 -- mov #0,-(sp) ;PC for RTI`
1790			`000000 --`
1791			`000002 -- rti`
1792			`#-----`
1793			`wal 000034 -- vector: 34 (TRAP)`
1794			`bwm 2`
1795			`005020 -- PC:5020`
1796			`000340 -- PS: pri=7`
1797			`#-----`
1798			`wal 005020 -- code (kernel, trap 34):`
1799			`bwm 4`
1800			`011600 -- mov (sp),r0`
1801			`006560 -- mfpi -2(r0)`
1802			`177776`
1803			`000000 -- halt`
1804			`#-----`
1805			`wal 000250 -- vector: 250 (MMU)`
1806			`bwm 2`
1807			`005040 -- PC:5040`
1808			`000340 -- PS: pri=7`
1809			`#-----`
1810			`wal 005040 -- code (kernel, trap 4):`
1811			`bwm 68`
1812			`005337 -- dec @#5256`
1813			`005256`
1814			`001001 -- bne .+2`
1815			`000000 -- halt`
1816			`013700 -- mov ssr0,r0`
1817			`177572`
1818			`042700 -- bic #177741,r0 ; clear all but id+asn fields`
1819			`177741`
1820			`#5060`
1821			`062700 -- add #177600,r0 ; user DR address base`
1822			`177600`
1823			`# 5 23 062710 0 -- add #400,(r0)`
1824			`# 5 23 000400 0`
1825			`105260 -- incb 1(r0) ; odd address IB access fails !!`
1826			`000001`
1827			`010025 -- mov r0,(r5)+`
1828			`012025 -- mov (r0),(r5)+`
1829			`013700 -- mov ssr1,r0`
1830			`177574`
1831			`#5100`
1832			`010025 -- mov r0,(r5)+`
1833			`012701 -- mov #2,r1`
1834			`000002`
1835			`052737 -- bis #004000,psw`
1836			`004000`
1837			`177776`
1838			`005046 -- clr -(sp)`
1839			`106506 -- mfpd sp`
1840			`#5120`
1841			`010546 -- mov r5,-(sp)`
1842			`010446 -- mov r4,-(sp)`
1843			`010346 -- mov r3,-(sp)`
1844			`010246 -- mov r2,-(sp)`
1845			`010146 -- mov r1,-(sp)`
1846			`010046 -- mov r0,-(sp)`
1847			`042737 -- bic #004000,psw`
1848			`004000`
1849			`#5140`
1850			`177776`
1851			`010002 -- L1: mov r0,r2`
1852			`110003 -- movb r0,r3`
1853			`042702 -- bic #177770,r2 ; mask regnum field`
1854			`177770`
1855			`006302 -- asl r2`
1856			`060602 -- add sp,r2 ; address of reg on stack`
1857			`006203 -- asr r3 ; shift delta field down 3 bit`
1858			`#5160`
1859			`006203 -- asr r3`
1860			`006203 -- asr r3`
1861			`160312 -- sub r3,(r2) ; correct register contents`
1862			`000300 -- swap r0`
1863			`077114 -- sob r1,L1 (.-12)`
1864			`052737 -- bis #004000,psw`
1865			`004000`
1866			`177776`
1867			`#5200`
1868			`012600 -- mov (sp)+,r0`
1869			`012601 -- mov (sp)+,r1`
1870			`012602 -- mov (sp)+,r2`
1871			`012603 -- mov (sp)+,r3`
1872			`012604 -- mov (sp)+,r4`
1873			`012605 -- mov (sp)+,r5`
1874			`106606 -- mtpd sp`
1875			`005726 -- tst (sp)+`
1876			`#5220`
1877			`042737 -- bic #004000,psw`
1878			`004000`
1879			`177776`
1880			`013700 -- mov ssr2,r0`
1881			`177576`
1882			`010025 -- mov r0,(r5)+`
1883			`010016 -- mov r0,(sp)`
1884			`042737 -- bic #160000,ssr0 ; clear abort bits`
1885			`#5240`
1886			`160000`
1887			`177572`
1888			`000002 -- rti`
1889			`000000 -- halt`
1890			`#-----`
1891			`wal 005256 -- data (kernel):`
1892			`wmi 000003 -- stop at 3rd call of MMU handler`
1893			`#-----`
1894			`wal 005300 -- code (user):`
1895			`bwm 8`
1896			`012706 -- mov #100,sp`
1897			`000100`
1898			`005000 -- clr r0`
1899			`012701 -- mov #074,r1`
1900			`000074`
1901			`062021 -- add (r0)+,(r1)+ ; r1 = 74`
1902			`000137 -- jmp @#74`
1903			`000074`
1904			`#`
1905			`wal 005374 -- .=5374`
1906			`bwm 4`
1907			`062021 -- add (r0)+,(r1)+ ; r1 = 76`
1908			`062021 -- add (r0)+,(r1)+ ; r1 = 100`
1909			`#5400`
1910			`062021 -- add (r0)+,(r1)+ ; r1 = 102`
1911			`104417 -- trap 17`
1912			`#`
1913			`wal 005500 -- data (user):`
1914			`bwm 4`
1915			`002001 -- mem_ud(0)=02001`
1916			`002002 -- mem_ud(2)=02002`
1917			`002003 -- mem_ud(4)=02003`
1918			`002004 -- mem_ud(6)=02004`
1919			`wal 005574 -- data (user):`
1920			`bwm 4`
1921			`000300 -- mem_ud(074)=0300`
1922			`000300 -- mem_ud(076)=0300`
1923			`000300 -- mem_ud(100)=0300`
1924			`000300 -- mem_ud(102)=0300`
1925			`#`
1926			`C Exec code 22 (MMU ; run user mode code with I/D)`
1927			`wr5 005260 -- r5=5260`
1928			`wsp 001400 -- sp=1400`
1929			`wpc 005000 -- pc=5000`
1930			`cont -- cont @ 5000`
1931			`wtgo`
1932			`rsp d=001372 -- ! sp`
1933			`rpc d=005030 -- ! pc (halt in TRAP handler)`
1934			`wal 001372 -- check stack (1372)`
1935			`brm 3`
1936			`d=104417 -- ! TRAP instruction`
1937			`d=000104 -- ! PC trap`
1938			`d=174000 -- ! PS trap`
1939			`#`
1940			`wal 005256 --`
1941			`brm 9`
1942			`d=000001 -- ! mem(5256) (mmu 3 - trap count)`
1943			`d=177620 -- ! mem(5260) (1st trap: address fixed DR)`
1944			`d=000406 -- ! mem(5262) (1st trap: new content of DR)`
1945			`d=010420 -- ! mem(5264) (1st trap: ssr1: ra=0,2;rb=1,2)`
1946			`d=000076 -- ! mem(5266) (1st trap: ssr2: pc)`
1947			`d=177600 -- ! mem(5270) (2nd trap: address fixed DR)`
1948			`d=000402 -- ! mem(5272) (2nd trap: new content of DR)`
1949			`d=000000 -- ! mem(5274) (2nd trap: ssr1: none)`
1950			`d=000100 -- ! mem(5276) (2nd trap: ssr2: pc)`
1951			`#`
1952			`wal 005574`
1953			`brm 4`
1954			`d=002301 -- ! mem(5574)=02301 was mem_ud(074)`
1955			`d=002302 -- ! mem(5576)=02302 was mem_ud(076)`
1956			`d=002303 -- ! mem(5600)=02303 was mem_ud(100)`
1957			`d=002304 -- ! mem(5602)=02304 was mem_ud(102)`
1958			`#`
1959			`wal 000034 -- vector: 34 -> trap catcher again`
1960			`bwm 2`
1961			`000036 -- PC:36`
1962			`000000 -- PS:0`
1963			`wal 000250 -- vector: 250 -> trap catcher again`
1964			`bwm 2`
1965			`000252 -- PC:252`
1966			`000000 -- PS:0`
1967			`#`
1968			`wps 000000 -- psw: cmode=pmode=0 (kernel)`
1969			`#-----------------------------------------------------------------------------`
1970			`C Setup code 23 [base 5700; use 57-63] (test cmp and conditional branch)`
1971			`#`
1972			`wal 005700 -- code test 1:`
1973			`bwm 5`
1974			`012012 -- mov (r0)+,(r2) ; load PSW from table`
1975			`004737 -- jsr pc,@#6000`
1976			`006000`
1977			`077104 -- sob r1,-4`
1978			`000000 -- halt`
1979			`#`
1980			`wal 005720 -- code test 2:`
1981			`bwm 6`
1982			`000230 -- spl 0`
1983			`005720 -- tst (r0)+ ; verify tst response`
1984			`004737 -- jsr pc,@#6000`
1985			`006000`
1986			`077104 -- sob r1,-4`
1987			`000000 -- halt`
1988			`#`
1989			`wal 005740 -- code test 3:`
1990			`bwm 6`
1991			`000230 -- spl 0`
1992			`022020 -- cmp (r0+),(r0)+ ; verify cmp response`
1993			`004737 -- jsr pc,@#6000`
1994			`006000`
1995			`077104 -- sob r1,-4`
1996			`000000 -- halt`
1997			`#`
1998			`# test 1 test 2 test 3`
1999			`# - C V Z N < = > < = >`
2000			`# code branch condition mask 1 2 3 4 5 1 2 3 1 2 3 4 5 6 7`
2001			`# BNE if Z = 0 000004 y y y y y y y y y y y y`
2002			`# BEQ if Z = 1 000010 y y y`
2003			`# BGE if (N xor V) = 0 000020 y y y y y y y y y`
2004			`# BLT if (N xor V) = 1 000040 y y y y y y`
2005			`# BGT if (Z or (N xor V)) = 0 000100 y y y y y y`
2006			`# BLE if (Z or (N xor V)) = 1 000200 y y y y y y y y y`
2007			`# BPL if N = 0 000400 y y y y y y y y y y`
2008			`# BMI if N = 1 001000 y y y y y`
2009			`# BHI if (C or Z) = 0 002000 y y y y y y y y`
2010			`# BLOS if (C or Z) = 1 004000 y y y y y y y`
2011			`# BVC if V = 0 010000 y y y y y y y y y y y y`
2012			`# BVS if V = 1 020000 y y y`
2013			`# BCC if C = 0 (aka BHIS) 040000 y y y y y y y y y y y`
2014			`# BCS if C = 1 (aka BLO) 100000 y y y y`
2015			`#`
2016			`wal 006000 -- code check:`
2017			`bwm 63`
2018			`011203 -- mov (r2),r3 ; save PSW`
2019			`012704 -- mov #177774,r4 ; set pattern store`
2020			`177774 --`
2021			`010312 -- mov r3,(r2) ; restore PSW`
2022			`001003 -- bne .+3`
2023			`042704 -- bic #000004,r4`
2024			`000004 --`
2025			`010312 -- mov r3,(r2)`
2026			`#6020`
2027			`001403 -- beq .+3`
2028			`042704 -- bic #000010,r4`
2029			`000010 --`
2030			`010312 -- mov r3,(r2)`
2031			`002003 -- bge .+3`
2032			`042704 -- bic #000020,r4`
2033			`000020 --`
2034			`010312 -- mov r3,(r2)`
2035			`#6040`
2036			`002403 -- blt .+3`
2037			`042704 -- bic #000040,r4`
2038			`000040 --`
2039			`010312 -- mov r3,(r2)`
2040			`003003 -- bgt .+3`
2041			`042704 -- bic #000100,r4`
2042			`000100 --`
2043			`010312 -- mov r3,(r2)`
2044			`#6060`
2045			`003403 -- ble .+3`
2046			`042704 -- bic #000200,r4`
2047			`000200 --`
2048			`010312 -- mov r3,(r2)`
2049			`100003 -- bpl .+3`
2050			`042704 -- bic #000400,r4`
2051			`000400 --`
2052			`010312 -- mov r3,(r2)`
2053			`#6100`
2054			`100403 -- bmi .+3`
2055			`042704 -- bic #001000,r4`
2056			`001000 --`
2057			`010312 -- mov r3,(r2)`
2058			`101003 -- bhi .+3`
2059			`042704 -- bic #002000,r4`
2060			`002000 --`
2061			`010312 -- mov r3,(r2)`
2062			`#6120`
2063			`101403 -- blos .+3`
2064			`042704 -- bic #004000,r4`
2065			`004000 --`
2066			`010312 -- mov r3,(r2)`
2067			`102003 -- bvc .+3`
2068			`042704 -- bic #010000,r4`
2069			`010000 --`
2070			`010312 -- mov r3,(r2)`
2071			`#6140`
2072			`102403 -- bvs .+3`
2073			`042704 -- bic #020000,r4`
2074			`020000 --`
2075			`010312 -- mov r3,(r2)`
2076			`103003 -- bcc .+3`
2077			`042704 -- bic #040000,r4`
2078			`040000 --`
2079			`010312 -- mov r3,(r2)`
2080			`#6160`
2081			`103403 -- bcs .+3`
2082			`042704 -- bic #100000,r4`
2083			`100000 --`
2084			`010312 -- mov r3,(r2)`
2085			`010325 -- mov r3,(r5)+`
2086			`010425 -- mov r4,(r5)+`
2087			`000207 -- rts pc`
2088			`#`
2089			`wal 006200 -- data test 1:`
2090			`bwm 5`
2091			`000000 -- PSW - no cc`
2092			`000001 -- PSW - C=1`
2093			`000002 -- PSW - V=1`
2094			`000004 -- PSW - Z=1`
2095			`000010 -- PSW - N=1`
2096			`#`
2097			`wal 006220 -- data test 2:`
2098			`bwm 3`
2099			`177777 -- tst -1`
2100			`000000 -- tst 0`
2101			`000001 -- tst 1`
2102			`#`
2103			`wal 006230 -- data test 3:`
2104			`bwm 14`
2105			`000001 -- cmp 1,2`
2106			`000002`
2107			`000001 -- cmp 1,1`
2108			`000001`
2109			`#6240`
2110			`000002 -- cmp 2,1`
2111			`000001`
2112			`177777 -- cmp -1,2`
2113			`000002`
2114			`000002 -- cmp 2,-1`
2115			`177777`
2116			`100000 -- cmp 100000,077777`
2117			`077777`
2118			`#6260`
2119			`077777 -- cmp 077777,100000`
2120			`100000`
2121			`#`
2122			`C Exec code 23 (test cmp and conditional branch)`
2123			`C Exec test 23.1 (explict cc setting)`
2124			`#`
2125			`wr0 006200 -- r0=6200 (input data)`
2126			`wr1 000005 -- r1=5`
2127			`wr2 177776 -- r2=177776 (PS address)`
2128			`wr5 006300 -- r5=6300 (output data)`
2129			`wsp 001400 -- sp=1400`
2130			`stapc 005700 -- start @ 5700`
2131			`wtgo`
2132			`rr0 d=006212 -- ! r0`
2133			`rr1 d=000000 -- ! r1`
2134			`rr5 d=006324 -- ! r5`
2135			`rsp d=001400 -- ! sp`
2136			`rpc d=005712 -- ! pc`
2137			`wal 006300 -- use BCC/BCS naming below`
2138			`brm 10`
2139			`d=000000 -- ! mem(6300) 1 PS: none`
2140			`d=052524 -- ! mem(6302) 1 BNE,BGE,BGT,BPL,BHI,BVC,BCC`
2141			`d=000001 -- ! mem(6304) 2 PS: C=1`
2142			`d=114524 -- ! mem(6306) 2 BNE,BGE,BGT,BPL,BLOS,BVC,BCS`
2143			`d=000002 -- ! mem(6310) 3 PS: V=1`
2144			`d=062644 -- ! mem(6312) 3 BNE,BLT,BLE,BPL,BHI,BVS,BCC`
2145			`d=000004 -- ! mem(6314) 4 PS: Z=1`
2146			`d=054630 -- ! mem(6316) 4 BEQ,BGE,BLE,BPL,BLOS,BVC,BCC`
2147			`d=000010 -- ! mem(6320) 5 PS: N=1`
2148			`d=053244 -- ! mem(6322) 5 BNE,BLT,BLE,BMI,BHI,BVC,BCC`
2149			`#`
2150			`C Exec test 23.2 (tst testing)`
2151			`#`
2152			`wr0 006220 -- r0=6220 (input data)`
2153			`wr1 000003 -- r1=3`
2154			`wr2 177776 -- r2=177776 (PS address)`
2155			`wr5 006330 -- sp=6330 (output data)`
2156			`wsp 001400 -- sp=1400`
2157			`stapc 005720 -- start @ 5720`
2158			`wtgo`
2159			`rr0 d=006226 -- ! r0`
2160			`rr1 d=000000 -- ! r1`
2161			`rr5 d=006344 -- ! r5`
2162			`rsp d=001400 -- ! sp`
2163			`rpc d=005734 -- ! pc`
2164			`wal 006330 -- use BHIS(BCC)/BLO(BLO) naming below`
2165			`brm 6`
2166			`d=000010 -- ! mem(6330) 1 PS: tst -1: N=1`
2167			`d=053244 -- ! mem(6332) 1 BNE,BLT,BLE,BMI,BHI,BVC,BHIS`
2168			`d=000004 -- ! mem(6334) 2 PS: tst 0: Z=1`
2169			`d=054630 -- ! mem(6336) 2 BEQ,BGE,BLE,BPL,BLOS,BVC,BHIS`
2170			`d=000000 -- ! mem(6340) 3 PS: tst 1: all 0`
2171			`d=052524 -- ! mem(6342) 3 BNE,BGE,BGT,BPL,BHI,BVC,BHIS`
2172			`#`
2173			`C Exec test 23.3 (cmp testing)`
2174			`#`
2175			`wr0 006230 -- r0=6230 (input data)`
2176			`wr1 000007 -- r1=7`
2177			`wr2 177776 -- r2=177776 (PS address)`
2178			`wr5 006344 -- sp=6344 (output data)`
2179			`wsp 001400 -- sp=1400`
2180			`stapc 005740 -- start @ 5740`
2181			`wtgo`
2182			`rr0 d=006264 -- ! r0`
2183			`rr1 d=000000 -- ! r1`
2184			`rr5 d=006400 -- ! r5`
2185			`rsp d=001400 -- ! sp`
2186			`rpc d=005754 -- ! pc`
2187			`wal 006344 -- cmp= S-D !`
2188			`brm 14`
2189			`d=000011 -- ! mem(6344) 1 PS: cmp 1,2: N=1,C=1 ok`
2190			`d=115244 -- ! mem(6346) 1 BNE,BLT,BLE,BMI,BLOS,BVC,BLO`
2191			`d=000004 -- ! mem(6350) 2 PS: cmp 1,1: Z=1 ok`
2192			`d=054630 -- ! mem(6352) 2 BEQ,BGE,BLE,BPL,BLOS,BVC,BHIS`
2193			`d=000000 -- ! mem(6354) 3 PS: cmp 2,1: none ok`
2194			`d=052524 -- ! mem(6356) 3 BNE,BGE,BGT,BPL,BHI,BVC,BHIS`
2195			`d=000010 -- ! mem(6360) 4 PS: cmp -1,2: N=1`
2196			`d=053244 -- ! mem(6362) 4 BNE,BLT,BLE,BMI,BHI,BVC,BHIS ok`
2197			`d=000001 -- ! mem(6364) 5 PS: cmp 2,-1: C=1`
2198			`d=114524 -- ! mem(6366) 5 BNE,BGE,BGT,BPL,BLOS,BVC,BLO ok`
2199			`d=000002 -- ! mem(6370) 6 PS: cmp 10..,07..: V=1`
2200			`d=062644 -- ! mem(6372) 6 BNE,BLT,BLE,BPL,BHI,BVS,BHIS ok`
2201			`d=000013 -- ! mem(6374) 7 PS: cmp 07..,10..: N=1,V=1,C=1`
2202			`d=125124 -- ! mem(6376) 7 BNE,BGE,BGT,BMI,BLOS,BVS,BLO ok`
2203			`#`
2204			`#-----------------------------------------------------------------------------`
2205			`C Setup code 24 [base 6400] (test MARK instruction)`
2206			`#`
2207			`wal 006400 -- code (main):`
2208			`bwm 13`
2209			`010546 -- mov r5,-(sp) ; push old r5 on stack`
2210			`012746 -- mov #101,-(sp) ; push 1st parameter`
2211			`000101`
2212			`012746 -- mov #102,-(sp) ; push 2nd parameter`
2213			`000102`
2214			`012746 -- mov #103,-(sp) ; push 3rd parameter`
2215			`000103`
2216			`012746 -- mov #mark3,-(sp) ; push MARK 3`
2217			`#6420`
2218			`006403`
2219			`010605 -- mov sp,r5 ; address of MARK N`
2220			`004737 -- jsr pc,@#6440 ; call procedure`
2221			`006440`
2222			`000000 -- halt`
2223			`#`
2224			`# stack of procedure when called:`
2225			`# addr content`
2226			`# 576 12(sp) 10(r5) old r5`
2227			`# 574 10(sp) 6(r5) param1`
2228			`# 572 6(sp) 4(r5) param2`
2229			`# 570 4(sp) 2(r5) param3`
2230			`# 566 2(sp) (r5) mark 3`
2231			`# 564 (sp) return pc`
2232			`#`
2233			`wal 006440 -- code (procedure):`
2234			`bwm 7`
2235			`016520 -- mov 6(r5),(r0)+ ; get 1st param`
2236			`000006`
2237			`016520 -- mov 4(r5),(r0)+ ; get 2nd param`
2238			`000004`
2239			`016520 -- mov 2(r5),(r0)+ ; get 3rd param`
2240			`000002`
2241			`000205 -- rts r5`
2242			`#`
2243			`C Exec code 24 (test MARK instruction)`
2244			`#`
2245			`wr0 006470 -- r0=6470`
2246			`wr5 123456 -- r5=123456`
2247			`wsp 001400 -- sp=1400`
2248			`stapc 006400 -- start @ 6400`
2249			`wtgo`
2250			`rr0 d=006476 -- ! r0=6476 (3 words written)`
2251			`rr5 d=123456 -- ! r5 (restored)`
2252			`rsp d=001400 -- ! sp`
2253			`rpc d=006432 -- ! pc`
2254			`wal 001364 -- check stack`
2255			`brm 6`
2256			`d=006430 -- ! mem(1364)`
2257			`d=006403 -- ! mem(1366)`
2258			`d=000103 -- ! mem(1370)`
2259			`d=000102 -- ! mem(1372)`
2260			`d=000101 -- ! mem(1374)`
2261			`d=123456 -- ! mem(1376)`
2262			`wal 006470 -- check stored values`
2263			`brm 3`
2264			`d=000101 -- ! mem(6470) (1st param)`
2265			`d=000102 -- ! mem(6472) (2nd param)`
2266			`d=000103 -- ! mem(6474) (3rd param)`
2267			`#`
2268			`# probably first and last time MARK is used. It's a bastard anyway.`
2269			`#`
2270			`#-----------------------------------------------------------------------------`
2271			`C Setup code 25 [base 6500; use 65-66] (basic byte instruction and cc test)`
2272			`#`
2273			`wal 006500 -- code:`
2274			`bwm 22`
2275			`110124 -- movb r1,(r4)+ (#123, #333)`
2276			`120124 -- cmpb r1,(r4)+ (#123, #333)`
2277			`120224 -- cmpb r2,(r4)+ (#321, #111)`
2278			`120124 -- cmpb r1,(r4)+ (#123, #123)`
2279			`105024 -- clrb (r4)+ (#333)`
2280			`130124 -- bitb r1,(r4)+ (#123, #11)`
2281			`130124 -- bitb r1,(r4)+ (#123, #44)`
2282			`140124 -- bicb r1,(r4)+ (#123, #333)`
2283			`#6520`
2284			`150124 -- bisb r1,(r4)+ (#123, #111)`
2285			`105124 -- comb (r4)+ (#321)`
2286			`105224 -- incb (r4)+ (#321)`
2287			`105324 -- decb (r4)+ (#321)`
2288			`105424 -- negb (r4)+ (#321)`
2289			`105724 -- tstb (r4)+ (#321)`
2290			`106024 -- rorb (r4)+ (#201) Cin=0; Cout=1`
2291			`106024 -- rorb (r4)+ (#021) Cin=1; Cout=1`
2292			`#6540`
2293			`106124 -- rolb (r4)+ (#210) Cin=1; Cout=1`
2294			`106224 -- asrb (r4)+ (#020)`
2295			`106224 -- asrb (r4)+ (#220)`
2296			`106324 -- aslb (r4)+ (#020)`
2297			`106324 -- aslb (r4)+ (#220)`
2298			`000000 -- halt`
2299			`#`
2300			`wal 000014 -- vector: 14`
2301			`bwm 2`
2302			`006560 -- PC:6560`
2303			`000000 -- PS:0`
2304			`#`
2305			`wal 006560 -- code: (trap 14):`
2306			`bwm 3`
2307			`016625 -- mov 2(sp),(r5)+`
2308			`000002`
2309			`000006 -- rtt`
2310			`#`
2311			`wal 006600 -- data 1:`
2312			`bwm 11`
2313			`155733 -- (#333,#333)`
2314			`051511 -- (#123,#111)`
2315			`044333 -- (#11 ,#333)`
2316			`155444 -- (#333,#44)`
2317			`150511 -- (#321,#111)`
2318			`150721 -- (#321,#321)`
2319			`150721 -- (#321,#321)`
2320			`010601 -- (#021,#201)`
2321			`#6620`
2322			`010210 -- (#020,#210)`
2323			`010220 -- (#020,#220)`
2324			`000220 -- (....,#220)`
2325			`#`
2326			`C Exec code 25 (basic byte instruction and cc test)`
2327			`#`
2328			`wr1 000123 -- r1=123`
2329			`wr2 000321 -- r2=321`
2330			`wr4 006600 -- r4=6600`
2331			`wr5 006626 -- r5=6626`
2332			`wsp 001374 -- sp=1374`
2333			`wal 001374 -- setup stack with rtt return frame setting T flag`
2334			`bwm 2`
2335			`006500 -- start address (code 25 @ 6500)`
2336			`000020 -- set T flag in PSW`
2337			`stapc 006564 -- start @ 6564 -> rtt -> 6500 from stack`
2338			`wtgo`
2339			`rr1 d=000123 -- ! r1=123`
2340			`rr2 d=000321 -- ! r2=321`
2341			`rr4 d=006625 -- ! r4=6625`
2342			`rr5 d=006700 -- ! r5=6700`
2343			`rsp d=001400 -- ! sp=1400`
2344			`rpc d=006554 -- ! pc=6554`
2345			`wal 006600`
2346			`brm 11`
2347			`d=155523 -- ! mem(6600)=123; movb r1,(r4)+ (#123, #333)`
2348			`# ! mem(6601)=333; cmpb r1,(r4)+ (#123, #333)`
2349			`d=051511 -- ! mem(6602)=111; cmpb r1,(r4)+ (#321, #111)`
2350			`# ! mem(6603)=123; cmpb r1,(r4)+ (#123, #123)`
2351			`d=044000 -- ! mem(6604)=000; clrb (r4)+ (#333)`
2352			`# ! mem(6605)=011; bitb r1,(r4)+ (#123, #11)`
2353			`d=104044 -- ! mem(6606)=044; bitb r1,(r4)+ (#123, #44)`
2354			`# ! mem(6607)=210; bicb r1,(r4)+ (#123, #333)`
2355			`d=027133 -- ! mem(6610)=133; bisb r1,(r4)+ (#123, #111)`
2356			`# ! mem(6611)=056; comb (r4)+ (#321)`
2357			`d=150322 -- ! mem(6612)=322; incb (r4)+ (#321)`
2358			`# ! mem(6613)=320; decb (r4)+ (#321)`
2359			`d=150457 -- ! mem(6614)=057; negb (r4)+ (#321)`
2360			`# ! mem(6615)=321; tstb (r4)+ (#321)`
2361			`d=104100 -- ! mem(6616)=100; rorb (r4)+ (#201) Cout=1`
2362			`# ! mem(6617)=210; rorb (r4)+ (#021) Cout=1`
2363			`d=004021 -- ! mem(6620)=021; rolb (r4)+ (#210) Cout=1`
2364			`# ! mem(6621)=010; asrb (r4)+ (#020)`
2365			`d=020310 -- ! mem(6622)=310; asrb (r4)+ (#220)`
2366			`# ! mem(6623)=040; aslb (r4)+ (#020)`
2367			`d=000040 -- ! mem(6624)=040; aslb (r4)+ (#220)`
2368			`#`
2369			`wal 006626 -- NZVC`
2370			`brm 21`
2371			`d=000020 -- ! mem(6626)=0000; movb r1,(r4)+ (#123, #333)`
2372			`d=000021 -- ! mem(6630)=000C; cmpb r1,(r4)+ (#123, #333)`
2373			`d=000030 -- ! mem(6632)=N000; cmpb r1,(r4)+ (#321, #111)`
2374			`d=000024 -- ! mem(6634)=0Z00; cmpb r1,(r4)+ (#123, #123)`
2375			`d=000024 -- ! mem(6636)=0Z00; clrb (r4)+ (#333)`
2376			`d=000020 -- ! mem(6640)=0000; bitb r1,(r4)+ (#123, #11)`
2377			`d=000024 -- ! mem(6642)=0Z00; bitb r1,(r4)+ (#123, #44)`
2378			`d=000030 -- ! mem(6644)=N000; bicb r1,(r4)+ (#123, #333)`
2379			`d=000020 -- ! mem(6646)=0000; bisb r1,(r4)+ (#123, #111)`
2380			`d=000021 -- ! mem(6650)=000C; comb (r4)+ (#321)`
2381			`d=000031 -- ! mem(6652)=N00C; incb (r4)+ (#321) keep C!`
2382			`d=000031 -- ! mem(6654)=N00C; decb (r4)+ (#321) keep C!`
2383			`d=000021 -- ! mem(6656)=000C; negb (r4)+ (#321)`
2384			`d=000030 -- ! mem(6660)=N000; tstb (r4)+ (#321)`
2385			`d=000023 -- ! mem(6662)=00VC; rorb (r4)+ (#201)`
2386			`d=000031 -- ! mem(6664)=N00C; rorb (r4)+ (#021)`
2387			`d=000023 -- ! mem(6666)=00VC; rolb (r4)+ (#210)`
2388			`d=000020 -- ! mem(6670)=0000; asrb (r4)+ (#020)`
2389			`d=000032 -- ! mem(6672)=N0V0; asrb (r4)+ (#220)`
2390			`d=000020 -- ! mem(6674)=0000; aslb (r4)+ (#020)`
2391			`d=000023 -- ! mem(6676)=00VC; aslb (r4)+ (#220)`
2392			`#`
2393			`rst -- console reset (to clear T flag)`
2394			`wal 000014 -- vector: 14 -> trap catcher again`
2395			`bwm 2`
2396			`000016 -- PC:16`
2397			`000000 -- PS:0`
2398			`#-----------------------------------------------------------------------------`
2399			`C Setup code 26 [base 6700; use 67-70] (address modes torture tests)`
2400			`#`
2401			`wal 006700 -- code test 1:`
2402			`bwm 5`
2403			`012020 -- mov (r0)+,(r0)+`
2404			`062020 -- add (r0)+,(r0)+`
2405			`014141 -- mov -(r1),-(r1)`
2406			`064141 -- add -(r1),-(r1)`
2407			`#6710`
2408			`000000 -- halt`
2409			`#-----`
2410			`wal 006720 -- code test 2:`
2411			`bwm 8`
2412			`016767 -- mov a(pc),b(pc)`
2413			`000014 -- here pc=6724, target@6740 --> index=14`
2414			`000014 -- here pc=6726, target@6742 --> index=14`
2415			`066767 -- add c(pc),d(pc)`
2416			`#6730`
2417			`000012 -- here pc=6732, target@6744 --> index=12`
2418			`000012 -- here pc=6734, target@6746 --> index=12`
2419			`000000 -- halt`
2420			`000000 -- halt`
2421			`#`
2422			`wal 006740 -- data (pc relative) for test 2:`
2423			`bwm 4`
2424			`006740 -- target for mov a(pc)`
2425			`006742 -- target for ,b(pc)`
2426			`000011 -- target for add c(pc)`
2427			`006746 -- target for ,d(pc)`
2428			`#-----`
2429			`wal 006750 -- code test 3:`
2430			`bwm 12`
2431			`012727 -- mov #1,#0`
2432			`000001`
2433			`000000`
2434			`062727 -- add #1,#2`
2435			`#6760`
2436			`000001`
2437			`000002`
2438			`016767 -- mov -14(pc),2(pc)`
2439			`177764 -- pc here: 6770: read dst of mov #1,#0 (@6754)`
2440			`000002 -- pc here: 6772: write src of add #0,r0 (@6774)`
2441			`062700 -- add #0,r0`
2442			`000000`
2443			`000000 -- halt`
2444			`#-----`
2445			`wal 007000 -- code test 4:`
2446			`bwm 8`
2447			`005200 -- inc r0`
2448			`010001 -- mov r0,r1`
2449			`010702 -- mov pc,r2`
2450			`005007 -- clr pc`
2451			`000000 -- halt`
2452			`000000 -- halt`
2453			`005203 -- L1: inc r3`
2454			`000000 -- halt`
2455			`#-----`
2456			`wal 000000 -- code test 4 (handler at address=0):`
2457			`bwm 2`
2458			`000137 -- jmp @#L1`
2459			`007014`
2460			`#-----`
2461			`wal 007020 -- code test 5:`
2462			`bwm 11`
2463			`012707 -- mov #L2,pc`
2464			`007032`
2465			`000000 -- halt`
2466			`000000 -- halt`
2467			`000000 -- halt`
2468			`062707 -- L2: add #2,pc`
2469			`000002`
2470			`005201 -- inc r1`
2471			`#7040`
2472			`005201 -- inc r1`
2473			`005201 -- inc r1`
2474			`000000 -- halt`
2475			`#-----`
2476			`wal 007060 -- data for test 1 (r0)+ part:`
2477			`bwm 4`
2478			`000111`
2479			`000222`
2480			`000333`
2481			`000444`
2482			`wal 007070 -- data for test 1 -(r1) part:`
2483			`bwm 4`
2484			`000111`
2485			`000222`
2486			`000333`
2487			`000444`
2488			`C Exec code 26 (address modes torture tests)`
2489			`C Exec test 26.1 (test src-dst update hazards with (r0)+,(r0)+ ect):`
2490			`#`
2491			`wr0 007060 -- r0=7060 (input data for (r0)+...)`
2492			`wr1 007100 -- r1=7100 (input data for -(r1)...)`
2493			`wsp 001400 -- sp=1400`
2494			`stapc 006700 -- start @ 6700`
2495			`wtgo`
2496			`rr0 d=007070 -- ! r0`
2497			`rr1 d=007070 -- ! r1`
2498			`rpc d=006712 -- ! pc`
2499			`wal 007060 --`
2500			`brm 4`
2501			`d=000111 -- ! mem(7060)`
2502			`d=000111 -- ! mem(7062)`
2503			`d=000333 -- ! mem(7064)`
2504			`d=000777 -- ! mem(7066)`
2505			`wal 007070 --`
2506			`brm 4`
2507			`d=000333 -- ! mem(7070)`
2508			`d=000222 -- ! mem(7072)`
2509			`d=000444 -- ! mem(7074)`
2510			`d=000444 -- ! mem(7076)`
2511			`C Exec test 26.2 (test indexed mode with pc (mode 67)):`
2512			`#`
2513			`wsp 001400 -- sp=1400`
2514			`stapc 006720 -- start @ 6720`
2515			`wtgo`
2516			`rpc d=006736 -- ! pc`
2517			`wal 006740 --`
2518			`brm 4`
2519			`d=006740 -- ! mem(6740)`
2520			`d=006740 -- ! mem(6742)`
2521			`d=000011 -- ! mem(6744)`
2522			`d=006757 -- ! mem(6746)`
2523			`C Exec test 26.3 (test (pc)+ as dst):`
2524			`#`
2525			`wr0 000111 -- r0=0111`
2526			`wsp 001400 -- sp=1400`
2527			`stapc 006750 -- start @ 6750`
2528			`wtgo`
2529			`rr0 d=000112 -- ! r0`
2530			`rpc d=007000 -- ! pc`
2531			`wal 006752 --`
2532			`brm 2`
2533			`d=000001 -- ! mem(6752) src mov #1,#0`
2534			`d=000001 -- ! mem(6754) dst mov #1,#0`
2535			`wal 006760 --`
2536			`brm 2`
2537			`d=000001 -- ! mem(6760) src add #1,#2`
2538			`d=000003 -- ! mem(6762) dst add #1,#2`
2539			`wal 006774 -- !`
2540			`rmi d=000001 -- ! mem(6774) dst mov -12(pc),2(pc)`
2541			`C Exec test 26.4 (test pc as dst in clr):`
2542			`#`
2543			`wr0 000100 -- r0=0100`
2544			`wr1 000110 -- r1=0110`
2545			`wr2 000120 -- r2=0120`
2546			`wr3 000130 -- r3=0130`
2547			`wsp 001400 -- sp=1400`
2548			`stapc 007000 -- start @ 7000`
2549			`wtgo`
2550			`rr0 d=000101 -- ! r0`
2551			`rr1 d=000101 -- ! r1`
2552			`rr2 d=007006 -- ! r2 (pc after mov pc,r2)`
2553			`rr3 d=000131 -- ! r3`
2554			`rpc d=007020 -- ! pc`
2555			`# cleanup 'vector 0':`
2556			`wal 000000`
2557			`bwm 2`
2558			`000000`
2559			`000000`
2560			`C Exec test 26.5 (test pc as dst in mov and add):`
2561			`#`
2562			`wr1 000000 -- r1=0`
2563			`wsp 001400 -- sp=1400`
2564			`stapc 007020 -- start @ 7020`
2565			`wtgo`
2566			`rr1 d=000002 -- ! r1`
2567			`rpc d=007046 -- ! pc`
2568			`#-----------------------------------------------------------------------------`
2569			`C Setup code 27 [base 7100; use 71-101] (test ASH/ASHC instruction)`
2570			`#`
2571			`wal 007100 -- code test 1 (ash)`
2572			`bwm 7`
2573			`000230 -- spl 0`
2574			`012004 -- L1: mov (r0)+,r4 -- load low`
2575			`072420 -- ash (r0)+,r4 -- shift`
2576			`011321 -- mov (r3),(r1)+ -- store psw`
2577			`010421 -- mov r4,(r1)+ -- store low`
2578			`077205 -- sob r2,L1 (.-5)`
2579			`000000 -- halt`
2580			`#-----`
2581			`wal 007120 -- code test 2 (ashc even)`
2582			`bwm 9`
2583			`000230 -- spl 0`
2584			`012004 -- L1: mov (r0)+,r4 -- load high`
2585			`012005 -- mov (r0)+,r5 -- load low`
2586			`073420 -- ashc (r0)+,r4 -- shift`
2587			`011321 -- mov (r3),(r1)+ -- store psw`
2588			`010421 -- mov r4,(r1)+ -- store high`
2589			`010521 -- mov r5,(r1)+ -- store low`
2590			`077207 -- sob r2,L1 (.-7)`
2591			`#7140`
2592			`000000 -- halt`
2593			`#-----`
2594			`wal 007150 -- code test 3 (ashc odd)`
2595			`bwm 7`
2596			`000230 -- spl 0`
2597			`012005 -- L1: mov (r0)+,r5 -- load low`
2598			`073520 -- ashc (r0)+,r5 -- shift`
2599			`011321 -- mov (r3),(r1)+ -- store psw`
2600			`#7160`
2601			`010521 -- mov r5,(r1)+ -- store low`
2602			`077205 -- sob r2,L1 (.-5)`
2603			`000000 -- halt`
2604			`#-----`
2605			`wal 007200 -- data 1:`
2606			`bwm 24`
2607			`000200 -- (000200, +1)`
2608			`000001 --`
2609			`000200 -- (000200, -1)`
2610			`177777 --`
2611			`000200 -- (000200, +7)`
2612			`000007 --`
2613			`000200 -- (000200, +8)`
2614			`000010 --`
2615			`#7220`
2616			`000200 -- (000200, +9)`
2617			`000011 --`
2618			`000200 -- (000200, -7)`
2619			`177771 --`
2620			`100000 -- (100000, 0)`
2621			`000000 --`
2622			`000000 -- (000000, 0)`
2623			`000000 --`
2624			`#7240`
2625			`000200 -- (000200, -8)`
2626			`177770 --`
2627			`000200 -- (000200, 0)`
2628			`000000 --`
2629			`100000 -- (100000, -6)`
2630			`177772 --`
2631			`040000 -- (040000, +1)`
2632			`000001 --`
2633			`#-----`
2634			`wal 007300 -- data 2:`
2635			`bwm 30`
2636			`000020 -- (000020,000200, +1)`
2637			`000200 --`
2638			`000001 --`
2639			`000020 -- (000020,000200, -1)`
2640			`000200 --`
2641			`177777 --`
2642			`000020 -- (000020,000200, +7)`
2643			`000200 --`
2644			`#7320`
2645			`000007 --`
2646			`000020 -- (000020,000200, +8)`
2647			`000200 --`
2648			`000010 --`
2649			`000020 -- (000020,000200, +9)`
2650			`000200 --`
2651			`000011 --`
2652			`000000 -- (000000,000200, +23)`
2653			`#7340`
2654			`000200 --`
2655			`000027 --`
2656			`000000 -- (000000,000200, +24)`
2657			`000200 --`
2658			`000030 --`
2659			`000000 -- (000000,000200, +25)`
2660			`000200 --`
2661			`000031 --`
2662			`#7360`
2663			`000020 -- (000020,000200, -5)`
2664			`000200 --`
2665			`177773 --`
2666			`000020 -- (000020,000200, -8)`
2667			`000200 --`
2668			`177770 --`
2669			`#-----`
2670			`wal 007440 -- data 3:`
2671			`bwm 6`
2672			`000200 -- (000200, +1)`
2673			`000001 --`
2674			`000200 -- (000200, -1)`
2675			`177777 --`
2676			`000201 -- (000201, -1)`
2677			`177777 --`
2678			`#`
2679			`C Exec code 27 (test ASH/ASHC instruction)`
2680			`C Exec test 27.1 (test ash)`
2681			`#`
2682			`wr0 007200 -- r0=7200 (input data)`
2683			`wr1 007500 -- r1=7500 (output data)`
2684			`wr2 000014 -- r2=14 (test count)`
2685			`wr3 177776 -- r3=177776 (#PSW)`
2686			`wsp 001400 -- sp=1400`
2687			`stapc 007100 -- start @ 7100`
2688			`wtgo`
2689			`rr0 d=007260 -- ! r0`
2690			`rr1 d=007560 -- ! r1`
2691			`rpc d=007116 -- ! pc`
2692			`wal 007500 --`
2693			`brm 24`
2694			`d=000000 -- ! mem(7500) ash +1, 000200 -> nzvc=0`
2695			`d=000400 -- ! mem(7502)`
2696			`d=000000 -- ! mem(7504) ash -1, 000200 -> nzvc=0`
2697			`d=000100 -- ! mem(7506)`
2698			`d=000000 -- ! mem(7510) ash +7, 000200 -> nzvc=0`
2699			`d=040000 -- ! mem(7512)`
2700			`d=000012 -- ! mem(7514) ash +8, 000200 -> n1,z0,v1,c0`
2701			`d=100000 -- ! mem(7516)`
2702			`d=000007 -- ! mem(7520) ash +9, 000200 -> n0,z1,v1,c1`
2703			`d=000000 -- ! mem(7522)`
2704			`d=000000 -- ! mem(7524) ash -7, 000200 -> nzvc=0`
2705			`d=000001 -- ! mem(7526)`
2706			`d=000010 -- ! mem(7530) ash 0, 100000 -> n1,z0,v0,c0`
2707			`d=100000 -- ! mem(7532)`
2708			`d=000004 -- ! mem(7534) ash 0, 000000 -> n0,z1,v0,c0`
2709			`d=000000 -- ! mem(7536)`
2710			`d=000005 -- ! mem(7540) ash -8, 000200 -> n1,z1,v0,c1`
2711			`d=000000 -- ! mem(7542)`
2712			`d=000000 -- ! mem(7544) ash 0, 000200 -> n0,z0,v0,c0`
2713			`d=000200 -- ! mem(7546)`
2714			`d=000010 -- ! mem(7550) ash -6, 100000 -> n1,z0,v0,c0`
2715			`d=177000 -- ! mem(7552)`
2716			`d=000012 -- ! mem(7554) ash +1, 040000 -> n1,z0,v1,c0`
2717			`d=100000 -- ! mem(7556)`
2718			`#----`
2719			`C Exec test 27.2 (test ashc even)`
2720			`#`
2721			`wr0 007300 -- r0=7300 (input data)`
2722			`wr1 007600 -- r1=7600 (output data)`
2723			`wr2 000012 -- r2=12 (test count)`
2724			`wr3 177776 -- r3=177776 (#PSW)`
2725			`wsp 001400 -- sp=1400`
2726			`stapc 007120 -- start @ 7120`
2727			`wtgo`
2728			`rr0 d=007374 -- ! r0`
2729			`rr1 d=007674 -- ! r1`
2730			`rpc d=007142 -- ! pc`
2731			`wal 007600 --`
2732			`brm 30`
2733			`d=000000 -- ! mem(7600) ashc +1, 000020,000200 -> nzvc=0`
2734			`d=000040 -- ! mem(7602)`
2735			`d=000400 -- ! mem(7604)`
2736			`d=000000 -- ! mem(7606) ashc -1, 000020,000200 -> nzvc=0`
2737			`d=000010 -- ! mem(7610)`
2738			`d=000100 -- ! mem(7612)`
2739			`d=000000 -- ! mem(7614) ashc +7, 000020,000200 -> nzvc=0`
2740			`d=004000 -- ! mem(7616)`
2741			`d=040000 -- ! mem(7620)`
2742			`d=000000 -- ! mem(7622) ashc +8, 000020,000200 -> nzvc=0`
2743			`d=010000 -- ! mem(7624)`
2744			`d=100000 -- ! mem(7626)`
2745			`d=000000 -- ! mem(7630) ashc +9, 000020,000200 -> nzvc=0`
2746			`d=020001 -- ! mem(7632)`
2747			`d=000000 -- ! mem(7634)`
2748			`d=000000 -- ! mem(7636) ashc +23, 000000,000200 -> nzvc=0`
2749			`d=040000 -- ! mem(7640)`
2750			`d=000000 -- ! mem(7642)`
2751			`d=000012 -- ! mem(7644) ashc +24, 000000,000200 -> n1z0v1c0`
2752			`d=100000 -- ! mem(7646)`
2753			`d=000000 -- ! mem(7650)`
2754			`d=000007 -- ! mem(7652) ashc +25, 000000,000200 -> n0z1v1c1`
2755			`d=000000 -- ! mem(7654)`
2756			`d=000000 -- ! mem(7656)`
2757			`d=000000 -- ! mem(7660) ashc -5, 000020,000200 -> nzvc=0`
2758			`d=000000 -- ! mem(7662)`
2759			`d=100004 -- ! mem(7664)`
2760			`d=000001 -- ! mem(7666) ashc -8, 000020,000200 -> n0z0v0c1`
2761			`d=000000 -- ! mem(7670)`
2762			`d=010000 -- ! mem(7672)`
2763			`#----`
2764			`C Exec test 27.3 (test ashc odd)`
2765			`#`
2766			`wr0 007440 -- r0=7440 (input data)`
2767			`wr1 007740 -- r1=7740 (output data)`
2768			`wr2 000003 -- r2=3 (test count)`
2769			`wr3 177776 -- r3=177776 (#PSW)`
2770			`wsp 001400 -- sp=1400`
2771			`stapc 007150 -- start @ 7150`
2772			`wtgo`
2773			`rr0 d=007454 -- ! r0`
2774			`rr1 d=007754 -- ! r1`
2775			`rpc d=007166 -- ! pc`
2776			`wal 007740 --`
2777			`brm 6`
2778			`d=000000 -- ! mem(7740) ashc +1, 000200 -> nzvc=0`
2779			`d=000400 -- ! mem(7742)`
2780			`d=000000 -- ! mem(7744) ashc -1, 000200 -> nzvc=0`
2781			`d=000100 -- ! mem(7746)`
2782			`d=000001 -- ! mem(7750) ashc -1, 000201 -> n0z0v0c1`
2783			`d=100100 -- ! mem(7752)`
2784			`#-----------------------------------------------------------------------------`
2785			`C Setup code 30 [base 10200; use 102-103] (test MUL instruction)`
2786			`#`
2787			`wal 010200 -- code test 1 (mul even)`
2788			`bwm 8`
2789			`000230 -- spl 0`
2790			`012004 -- L1: mov (r0)+,r4 -- load p1`
2791			`070420 -- mul (r0)+,r4 -- mul`
2792			`011321 -- mov (r3),(r1)+ -- store psw`
2793			`010421 -- mov r4,(r1)+ -- store p_high`
2794			`010521 -- mov r5,(r1)+ -- store p_low`
2795			`077206 -- sob r2,L1 (.-6)`
2796			`000000 -- halt`
2797			`#-----`
2798			`wal 010220 -- code test 2 (mul odd)`
2799			`bwm 7`
2800			`000230 -- spl 0`
2801			`012005 -- L1: mov (r0)+,r5 -- load p1`
2802			`070520 -- mul (r0)+,r5 -- mul`
2803			`010521 -- mov r5,(r1)+ -- store p_low`
2804			`060403 -- add r4,r3 -- check r4`
2805			`077205 -- sob r2,L1 (.-5)`
2806			`000000 -- halt`
2807			`#`
2808			`# 31022 074456 * 9562 022532 -> 296632364 010656,040054`
2809			`# 18494 044076 * -24041 121027 -> -444614254 162577,134622`
2810			`# -12549 147373 * 2397 004535 -> -30079953 177065,002057`
2811			`# -20493 127763 * -23858 121316 -> 488921994 016444,055612`
2812			`#`
2813			`# 105 000151 * 198 000306 -> 20790 000000,050466`
2814			`# 233 000351 * -94 177642 -> -21902 177777,125162`
2815			`# 186 000272 * -205 177463 -> -38130 177777,065416`
2816			`#`
2817			`wal 010240 -- data 1:`
2818			`bwm 16`
2819			`074456 --`
2820			`022532 --`
2821			`044076 --`
2822			`121027 --`
2823			`147373 --`
2824			`004535 --`
2825			`127763 --`
2826			`121316 --`
2827			`#10260`
2828			`000151 --`
2829			`000306 --`
2830			`000351 --`
2831			`177642 --`
2832			`000272 --`
2833			`177463 --`
2834			`000000 --`
2835			`000272 --`
2836			`#`
2837			`C Exec code 30 (test MUL instruction)`
2838			`C Exec test 30.1 (test mul even)`
2839			`#`
2840			`wr0 010240 -- r0=10240 (input data)`
2841			`wr1 010300 -- r1=10300 (output data)`
2842			`wr2 000010 -- r2=10 (test count)`
2843			`wr3 177776 -- r3=177776 (#PSW)`
2844			`wsp 001400 -- sp=1400`
2845			`stapc 010200 -- start @ 10200`
2846			`wtgo`
2847			`rr0 d=010300 -- ! r0`
2848			`rr1 d=010360 -- ! r1`
2849			`rpc d=010220 -- ! pc`
2850			`wal 010300 --`
2851			`brm 24`
2852			`d=000001 -- ! mem(10300) mul 074456,022532 -> n0z0v0c1`
2853			`d=010656 -- ! mem(10302)`
2854			`d=040054 -- ! mem(10304)`
2855			`d=000011 -- ! mem(10306) mul 044076,121027 -> n1z0v0c1`
2856			`d=162577 -- ! mem(10310)`
2857			`d=134622 -- ! mem(10312)`
2858			`d=000011 -- ! mem(10314) mul 147373,004535 -> n1z0v0c1`
2859			`d=177065 -- ! mem(10316)`
2860			`d=002057 -- ! mem(10320)`
2861			`d=000001 -- ! mem(10322) mul 127763,121316 -> n0z0v0c1`
2862			`d=016444 -- ! mem(10324)`
2863			`d=055612 -- ! mem(10326)`
2864			`d=000000 -- ! mem(10330) mul 000151,000306 -> n0z0v0c0`
2865			`d=000000 -- ! mem(10332)`
2866			`d=050466 -- ! mem(10334)`
2867			`d=000010 -- ! mem(10336) mul 000351,177642 -> n1z0v0c0`
2868			`d=177777 -- ! mem(10340)`
2869			`d=125162 -- ! mem(10342)`
2870			`d=000011 -- ! mem(10344) mul 000272,177463 -> n1z0v0c1`
2871			`d=177777 -- ! mem(10346)`
2872			`d=065416 -- ! mem(10350)`
2873			`d=000004 -- ! mem(10352) mul 000000,000272 -> n0z1v0c0`
2874			`d=000000 -- ! mem(10354)`
2875			`d=000000 -- ! mem(10356)`
2876			`#----`
2877			`C Exec test 30.2 (test mul odd)`
2878			`#`
2879			`wr0 010240 -- r0=10240 (input data)`
2880			`wr1 010360 -- r1=10300 (output data)`
2881			`wr2 000010 -- r2=10 (test count)`
2882			`wr3 000000 -- r3=0`
2883			`wr4 000000 -- r4=0`
2884			`wsp 001400 -- sp=1400`
2885			`stapc 010220 -- start @ 10220`
2886			`wtgo`
2887			`rr0 d=010300 -- ! r0`
2888			`rr1 d=010400 -- ! r1`
2889			`rr3 d=000000 -- ! r3`
2890			`rpc d=010236 -- ! pc`
2891			`wal 010360 --`
2892			`brm 8`
2893			`d=040054 -- ! mem(10360)`
2894			`d=134622 -- ! mem(10362)`
2895			`d=002057 -- ! mem(10364)`
2896			`d=055612 -- ! mem(10366)`
2897			`d=050466 -- ! mem(10370)`
2898			`d=125162 -- ! mem(10372)`
2899			`d=065416 -- ! mem(10374)`
2900			`d=000000 -- ! mem(10376)`
2901			`#`
2902			`#-----------------------------------------------------------------------------`
2903			`C Setup code 31 [base 10400; use 104-110] (test DIV instruction, also ADC,SXT)`
2904			`# Note: test 2 uses sbc too, but if div/div work correctly we have always`
2905			`# C=0 for sbc, so sbc isn't tested. adc has C=0 or C=1 though.`
2906			`#`
2907			`wal 010400 -- code test 1`
2908			`bwm 8`
2909			`012004 -- L1: mov (r0)+,r4 -- load dd high`
2910			`012005 -- mov (r0)+,r5 -- load dd low`
2911			`071420 -- div (r0)+,r4 -- div`
2912			`011321 -- mov (r3),(r1)+ -- store psw`
2913			`010421 -- mov r4,(r1)+ -- store q`
2914			`010521 -- mov r5,(r1)+ -- store r`
2915			`077207 -- sob r2,L1 (.-7)`
2916			`000000 -- halt`
2917			`#-----`
2918			`wal 010420 -- code test 2`
2919			`bwm 24`
2920			`012146 -- L1: mov (r1)+,-(sp) -- save psw on stack`
2921			`016002 -- mov 4(r0),r2 -- load divisor`
2922			`000004`
2923			`070221 -- mul (r1)+,r2 -- multiply with quotient`
2924			`061103 -- add (r1),r3 -- add reminder`
2925			`005502 -- adc r2`
2926			`005721 -- tst (r1)+`
2927			`006704 -- sxt r4`
2928			`#10440`
2929			`060402 -- add r4,r2`
2930			`166003 -- sub 2(r0),r3 -- subtract divident`
2931			`000002`
2932			`005602 -- sbc r2`
2933			`161002 -- sub (r0),r2`
2934			`001002 -- bne L2 (.+2) -- error if !=0`
2935			`005703 -- tst r3`
2936			`001404 -- beq L3 (.+4) -- error if !=0`
2937			`#10460`
2938			`032726 -- L2: bit #3,(sp)+ -- check V,C bits`
2939			`000003`
2940			`001001 -- bne L3 (.+1) -- if V or C =1, ignore`
2941			`000000 -- halt`
2942			`062700 -- L3: add #6,r0 --`
2943			`000006 --`
2944			`077527 -- sob r5,L1 (.-23)`
2945			`000000 -- halt`
2946			`# r q`
2947			`# 6249 014151 * 9158 021706 + 4989 011575 -> 57233331 001551,047663 y n`
2948			`# 5194 012112 * -23807 121401 + -3990 170152 -> -123657548 174241,021264 n y`
2949			`# -19943 131031 * 27112 064750 + -16037 140533 -> -540710653 157705,064403 y n`
2950			`# -20493 127763 * -23858 121316 + 10744 024770 -> 488932738 016444,102602 y y`
2951			`#`
2952			`# -12549 147373 * 2397 004535 + -11187 152115 -> -30091140 177064,154174 n n`
2953			`# 22620 054134 * -9272 155710 + -19907 131075 -> -209752547 171577,067035 y y`
2954			`# 10723 024743 * 7931 017373 + 9824 023140 -> 85053937 002421,150761 n n`
2955			`# -3548 171044 * -15677 141303 + 3019 005713 -> 55625015 001520,142467 n y`
2956			`#`
2957			`## 1 000001 * -32767 100001 + 0 000000 -> -32767 177777,100001 V=0`
2958			`## -1 177777 * 32767 077777 + 0 000000 -> -32767 177777,100001 V=0`
2959			`# 1 000001 * -32768 100000 + 0 000000 -> -32768 177777,100000 V=1`
2960			`# -1 177777 * ...... ...... + 0 000000 -> -32768 177777,100000 V=1`
2961			`#`
2962			`# 32767 077777 * 32767 077777 + 32766 077776 -> 1073709055 037777,077777 V=0`
2963			`# 32767 077777 * ............ + ............ -> 1073709056 037777,100000 V=1`
2964			`# 32767 077777 * -32767 100001 + -32766 100002 ->-1073709055 140000,100001 V=0`
2965			`# 32767 077777 * ............ + ............ ->-1073709056 140000,100000 V=1`
2966			`#`
2967			`# 32767 077777 * ............ + ............ -> 1073741824 040000,000000 V=1`
2968			`##32767 077777 * ............ + ............ ->-2147483648 100000,000000 V=1`
2969			`#`
2970			`#`
2971			`wal 010500 -- data 1:`
2972			`bwm 63`
2973			`000000 -- (000000,000042, 000005) 34/ 5 -> q: 6 r: 4`
2974			`000042 --`
2975			`000005 --`
2976			`000000 -- (000000,000042, 177773) 34/-5 -> q:-6 r: 4`
2977			`000042 --`
2978			`177773 --`
2979			`177777 -- (177777,177736, 000005) -34/ 5 -> q:-6 r:-4`
2980			`177736 --`
2981			`#010520`
2982			`000005 --`
2983			`177777 -- (177777,177736, 177773) -34/-5 -> q: 6 r:-4`
2984			`177736 --`
2985			`177773 --`
2986			`001551 -- (001551,047663, 014151) 57233331 / 6249`
2987			`047663 -- -> q: 9158 r: 4989`
2988			`014151 --`
2989			`174241 -- (174241,021264, 012112) -123657548 / 5194`
2990			`#010540`
2991			`021264 -- -> q: -23807 r: -3990`
2992			`012112 --`
2993			`157705 -- (157705,064403, 131031) -540710653 / -19943`
2994			`064403 -- -> q: 27112 r: -16037`
2995			`131031 --`
2996			`016444 -- (016444,102602, 127763) 488932738 / -20493`
2997			`102602 -- -> q: -23858 r: 10744`
2998			`127763 --`
2999			`#010560`
3000			`177064 -- (177064,154174, 147373) -30091140 / -12549`
3001			`154174 -- -> q: 2397 r: -11187`
3002			`147373 --`
3003			`171577 -- (171577,067035, 054134) -209752547 / 22620`
3004			`067035 -- -> q: -9272 r: -19907`
3005			`054134 --`
3006			`002421 -- (002421,150761, 024743) 85053937 / 10723`
3007			`150761 -- -> q: 7931 r: 9824`
3008			`#010600`
3009			`024743 --`
3010			`001520 -- (001520,142467, 171044) 55625015 / -3548`
3011			`142467 -- -> q: -15677 r: 3019`
3012			`171044 --`
3013			`001520 -- (001520,142467,000000) 55625015 / 0`
3014			`142467 --`
3015			`000000 --`
3016			`000000 -- (000000,000000,021706) 0 / 9158`
3017			`#010620`
3018			`000000 --`
3019			`021706 --`
3020			`177777 -- (177777,100000,000001) -32768 / 1`
3021			`100000 --`
3022			`000001 --`
3023			`177777 -- (177777,100000,177777) -32768 / -1`
3024			`100000 --`
3025			`177777 --`
3026			`#010640`
3027			`037777 -- (037777,077777,077777) 1073709055 / 32767`
3028			`077777 --`
3029			`077777 --`
3030			`037777 -- (037777,100000,077777) 1073709056 / 32767`
3031			`100000 --`
3032			`077777 --`
3033			`140000 -- (140000,100001,077777) -1073709055 / 32767`
3034			`100001 --`
3035			`#010660`
3036			`077777 --`
3037			`140000 -- (140000,100000,077777) -1073709056 / 32767`
3038			`100000 --`
3039			`077777 --`
3040			`040000 -- (040000,000000,077777) 1073741824 / 32767`
3041			`000000 --`
3042			`077777 --`
3043			`#`
3044			`C Exec code 31 (test DIV instruction, also ADC,SXT)`
3045			`C Exec test 31.1 (test div)`
3046			`#`
3047			`wr0 010500 -- r0=10500 (input data)`
3048			`wr1 010700 -- r1=10700 (output data)`
3049			`wr2 000025 -- r2=25 (test count)`
3050			`wr3 177776 -- r3=177776 (#PSW)`
3051			`wsp 001400 -- sp=1400`
3052			`rst -- console reset ; do reset; cont to start with`
3053			`wps 000000 -- clear psw ; psw cc code dump below`
3054			`wpc 010400 -- pc=10400`
3055			`cont -- cont @ 10400`
3056			`wtgo`
3057			`rr0 d=010676 -- ! r0`
3058			`rr1 d=011076 -- ! r1`
3059			`rpc d=010420 -- ! pc`
3060			`wal 010700 --`
3061			`brm 63`
3062			`d=000000 -- ! mem(10700) div 000000, 000042,000005 -> n0z0v0c0`
3063			`d=000006 -- ! mem(10702) 34/ 5 -> 6,4`
3064			`d=000004 -- ! mem(10704)`
3065			`d=000010 -- ! mem(10706) div 000000,000042, 177773 -> n1z0v0c0`
3066			`d=177772 -- ! mem(10710) 34/-5 -> -6,4`
3067			`d=000004 -- ! mem(10712)`
3068			`d=000010 -- ! mem(10714) div 177777,177736, 000005 -> n1z0v0c0`
3069			`d=177772 -- ! mem(10716) -34/ 5 -> -6,-4`
3070			`d=177774 -- ! mem(10720)`
3071			`d=000000 -- ! mem(10722) div 177777,177736, 177773 -> n0z0v0c0`
3072			`d=000006 -- ! mem(10724) -34/-5 -> 6,-4`
3073			`d=177774 -- ! mem(10726)`
3074			`d=000000 -- ! mem(10730) div 001551,047663, 014151 -> n0z0v0c0`
3075			`d=021706 -- ! mem(10732) 57233331/6249 -> 9158,4989`
3076			`d=011575 -- ! mem(10734)`
3077			`d=000010 -- ! mem(10736) div 174241,021264, 012112 -> n1z0v0c0`
3078			`d=121401 -- ! mem(10740) -123657548/5194 -> -23807,-3990`
3079			`d=170152 -- ! mem(10742)`
3080			`d=000000 -- ! mem(10744) div 157705,064403, 131031 -> n0z0v0c0`
3081			`d=064750 -- ! mem(10746) -540710653/-19943 -> 27112,-16037`
3082			`d=140533 -- ! mem(10750)`
3083			`d=000010 -- ! mem(10752) div 016444,102602, 127763 -> n1z0v0c0`
3084			`d=121316 -- ! mem(10754) 488932738/-20493 -> -23858, 10744`
3085			`d=024770 -- ! mem(10756)`
3086			`d=000000 -- ! mem(10760) div 177064,154174, 147373 -> n0z0v0c0`
3087			`d=004535 -- ! mem(10762) -30091140/-12549 -> 2397,-11187`
3088			`d=152115 -- ! mem(10764)`
3089			`d=000010 -- ! mem(10766) div 171577,067035, 054134 -> n1z0v0c0`
3090			`d=155710 -- ! mem(10770) -209752547/22620 -> -9272,-19907`
3091			`d=131075 -- ! mem(10772)`
3092			`d=000000 -- ! mem(10774) div 002421,150761, 024743 -> n0z0v0c0`
3093			`d=017373 -- ! mem(10776) 85053937/10723 -> 7931,9824`
3094			`d=023140 -- ! mem(11000)`
3095			`d=000010 -- ! mem(11002) div 001520,142467, 171044 -> n1z0v0c0`
3096			`d=141303 -- ! mem(11004) 55625015/-3548 -> -15677,3019`
3097			`d=005713 -- ! mem(11006)`
3098			`d=000007 -- ! mem(11010) div 001520,142467,000000 -> n0z1v1c1`
3099			`d=001520 -- ! mem(11012) 55625015/0 -> V=1, keep regs`
3100			`d=142467 -- ! mem(11014)`
3101			`d=000004 -- ! mem(11016) div 000000,000000,021706 -> n0z1v1c0`
3102			`d=000000 -- ! mem(11020) 0/9158 -> 0,0`
3103			`d=000000 -- ! mem(11022)`
3104	25	wfjm	`d=000010 -- ! mem(11024) div 177777,100000,000001->n1z0v1c0`
3105			`d=100000 -- ! mem(11026) -32768/1 -> -32768,0`
3106			`d=000000 -- ! mem(11030)`
3107	2	wfjm	`d=000002 -- ! mem(11032) div 177777,100000,177777 -> n0z0v1c0 ?? 2`
3108			`d=177777 -- ! mem(11034) -32768/-1 -> overflow`
3109			`d=100000 -- ! mem(11036)`
3110			`d=000000 -- ! mem(11040) div 037777,077777,077777 -> n0z0v0c0`
3111			`d=077777 -- ! mem(11042) 1073709055/32767 -> 32767,32766`
3112			`d=077776 -- ! mem(11044)`
3113			`d=000002 -- ! mem(11046) div 037777,100000,077777 -> n0z0v1c0`
3114			`d=037777 -- ! mem(11050) 1073709056/32767 -> overflow`
3115			`d=100000 -- ! mem(11052)`
3116			`d=000010 -- ! mem(11054) div 140000,100001,077777 -> n1z0v0c0`
3117			`d=100001 -- ! mem(11056) -1073709055/32767 -> -32767,-32766`
3118			`d=100002 -- ! mem(11060)`
3119	25	wfjm	`d=000010 -- ! mem(11062) div 140000,100000,077777->n1z0v1c0`
3120			`d=100000 -- ! mem(11064) -1073709056/32767 -> -32768,0`
3121			`d=000000 -- ! mem(11066)`
3122	2	wfjm	`d=000002 -- ! mem(11070) div 040000,000000,077777 -> n0z0v1c0`
3123			`d=040000 -- ! mem(11072) 1073741824/32767 -> overflow`
3124			`d=000000 -- ! mem(11074)`
3125			`#`
3126			`# simh notes:`
3127			`# 1. a quotient of 100000 leads to an overflow (V=1) on the W11`
3128			`# simh will not indicate overflow and returns q=100000`
3129			`#`
3130			`#----`
3131			`C Exec test 31.2 (test mul after div)`
3132			`#`
3133			`wr0 010500 -- r0=10500 (input data from DIV)`
3134			`wr1 010700 -- r1=10700 (output data from DIV)`
3135			`wr5 000016 -- r5=16 (test count)`
3136			`wsp 001400 -- sp=1400`
3137			`stapc 010420 -- start @ 10420`
3138			`wtgo`
3139			`rr0 d=010624 -- ! r0`
3140			`rr1 d=011024 -- ! r1`
3141			`rr2 d=000000 -- ! r2`
3142			`rr3 d=000000 -- ! r3`
3143			`rr5 d=000000 -- ! r5`
3144			`rpc d=010500 -- ! pc`
3145			`#-----------------------------------------------------------------------------`
3146			`C Setup code 32 [base 11100; use 111-112] (PIRQ test)`
3147			`# The code will exercise all 7 pirq interrupt levels:`
3148			`# set 1+3 -> handle 3, set 7 -> handle 7, set 6+4 -> handle 6`
3149			`# -> handle 4, set 5+2 -> handle 5 -> handle 2 > handle 1`
3150			`#`
3151			`wal 011100 -- code:`
3152			`bwm 14`
3153			`000237 -- spl 7`
3154			`011425 -- mov (r4),(r5)+ ; save PSW`
3155			`012713 -- mov #1000,(r3) ; set PIRQ 1`
3156			`001000`
3157			`011325 -- mov (r3),(r5)+ ; save PIRQ`
3158			`112763 -- movb #12,1(r3) ; set PIRQ 1+3`
3159			`000012`
3160			`000001`
3161			`#11120`
3162			`011325 -- mov (r3),(r5)+ ; save PIRQ`
3163			`000232 -- spl 2 ; now pri=2`
3164			`000240 -- nop ; allow interrupt to happen`
3165			`000230 -- spl 0 ; now pri=0`
3166			`#11130`
3167			`000240 -- nop ; allow interrupt to happen`
3168			`000000 -- halt`
3169			`#-----`
3170			`wal 000240 -- vector: 240`
3171			`bwm 2`
3172			`011134 -- PC:11134`
3173			`000340 -- PS:pri=7`
3174			`#-----`
3175			`wal 011134 -- code: (vector 240)`
3176			`bwm 18`
3177			`011300 -- mov (r3),r0 ; get pirq`
3178			`010625 -- mov sp,(r5)+ ; save sp`
3179			`#11140`
3180			`010025 -- mov r0,(r5)+ ; save pirq`
3181			`110014 -- movb r0,(r4) ; PSW=PIRQ (sets priority)`
3182			`042700 -- bic #177761,r0 ; mask out index bits`
3183			`177761`
3184			`010001 -- mov r0,r1 ; r0 is word index (pri*2)`
3185			`006201 -- asr r1 ; r1 is byte index (pri*1)`
3186			`012702 -- mov #400,r2`
3187			`000400`
3188			`#11160`
3189			`072201 -- ash r1,r2 ; r2 = 1<<(pri)`
3190			`040213 -- bic r2,(r3) ; clear current level in pirq`
3191			`010246 -- mov r2,-(sp) ; save pirq level mask`
3192			`056013 -- bis 11200(r0),(r3) ; trigger new pirq's`
3193			`011200`
3194			`000240 -- noop`
3195			`012625 -- mov (sp)+,(r5)+ ; save pirq level mask`
3196			`000002 -- rti`
3197			`#11200`
3198			`#-----`
3199			`wal 011200 -- data:`
3200			`bwm 8`
3201			`000000 -- mem(11200)=0 ; new pirq @ level 0`
3202			`000000 -- mem(11202)=0 ; new pirq @ level 1`
3203			`000000 -- mem(11204)=0 ; new pirq @ level 2`
3204			`100000 -- mem(11206)=100000 ; new pirq @ level 3 -> 7`
3205			`022000 -- mem(11210)=022000 ; new pirq @ level 4 -> 5+2`
3206			`000000 -- mem(11212)=0 ; new pirq @ level 5`
3207			`000000 -- mem(11214)=0 ; new pirq @ level 6`
3208			`050000 -- mem(11216)=050000 ; new pirq @ level 7 -> 6+4`
3209			`#`
3210			`C Exec code 32 (PIRQ test)`
3211			`#`
3212			`wr3 177772 -- r3=177772 (#PIRQ)`
3213			`wr4 177776 -- r4=177776 (#PSW)`
3214			`wr5 011220 -- r1=11220 (output data)`
3215			`wsp 001400 -- sp=1400`
3216			`stapc 011100 -- start @ 11100`
3217			`wtgo`
3218			`rr5 d=011300 -- ! r5`
3219			`rsp d=001400 -- ! sp`
3220			`rpc d=011134 -- ! pc`
3221			`rps d=000000 -- ! PSW`
3222			`wal 177772 --`
3223			`rmi d=000000 -- ! PIRQ`
3224			`wal 011220 --`
3225			`brm 24`
3226			`d=000340 -- ! mem(11220) PSW after SPL 7`
3227			`d=001042 -- ! mem(11222) PIRQ when 1 set`
3228			`d=005146 -- ! mem(11224) PIRQ when 1+3 set`
3229			`d=001374 -- ! mem(11226) -> PI:3 SP`
3230			`d=005146 -- ! mem(11230) PIRQ (3+1 pending)`
3231			`d=001366 -- ! mem(11232) -> PI:7 SP`
3232			`d=101356 -- ! mem(11234) PIRQ (7+1 pending)`
3233			`d=100000 -- ! mem(11236) <- PI:7 mask`
3234			`d=001366 -- ! mem(11240) -> PI:6 SP`
3235			`d=051314 -- ! mem(11242) PIRQ (6+4+1 pending)`
3236			`d=040000 -- ! mem(11244) <- PI:6 mask`
3237			`d=001366 -- ! mem(11246) -> PI:4 SP`
3238			`d=011210 -- ! mem(11250) PIRQ (4+1 pending)`
3239			`d=001360 -- ! mem(11252) -> PI:5 SP`
3240			`d=023252 -- ! mem(11254) PIRQ (5+2+1 pending)`
3241			`d=020000 -- ! mem(11256) <- PI:5 mask`
3242			`d=010000 -- ! mem(11260) <- PI:4 mask`
3243			`d=004000 -- ! mem(11262) <- PI:3 mask`
3244			`d=001374 -- ! mem(11264) -> PI:2 SP`
3245			`d=003104 -- ! mem(11266) PIRQ`
3246			`d=002000 -- ! mem(11270) <- PI:2 mask`
3247			`d=001374 -- ! mem(11272) -> PI:1 SP`
3248			`d=001042 -- ! mem(11274) PIRQ`
3249			`d=001000 -- ! mem(11276) <- PI:1 mask`
3250			`#`
3251			`wal 000240 -- vector: 240 -> trap catcher again`
3252			`bwm 2`
3253			`000242 -- PC:242`
3254			`000000 -- PS:0`
3255			`#-----------------------------------------------------------------------------`
3256			`C Setup code 33 [base 11200; use 112-113] (adc(b) and sbc(b) test)`
3257			`#`
3258			`wal 011200 -- code test 1: (adc)`
3259			`bwm 5`
3260			`006020 -- L1: ror (r0)+`
3261			`005520 -- adc (r0)+`
3262			`006120 -- rol (r0)+`
3263			`077104 -- sob r1,L1 (.-4)`
3264			`000000 -- halt`
3265			`#-----`
3266			`wal 011220 -- code test 2: (sbc)`
3267			`bwm 5`
3268			`006020 -- L1: ror (r0)+`
3269			`005620 -- sbc (r0)+`
3270			`006120 -- rol (r0)+`
3271			`077104 -- sob r1,L1 (.-4)`
3272			`000000 -- halt`
3273			`#-----`
3274			`wal 011240 -- code test 3: (adcb)`
3275			`bwm 5`
3276			`006020 -- L1: ror (r0)+`
3277			`105520 -- adcb (r0)+`
3278			`106120 -- rolb (r0)+`
3279			`077104 -- sob r1,L1 (.-4)`
3280			`000000 -- halt`
3281			`#-----`
3282			`wal 011260 -- code test 4: (sbcb)`
3283			`bwm 5`
3284			`006020 -- L1: ror (r0)+`
3285			`105620 -- sbcb (r0)+`
3286			`106120 -- rolb (r0)+`
3287			`077104 -- sob r1,L1 (.-4)`
3288			`000000 -- halt`
3289			`#-----`
3290			`wal 011300 -- data test 1: (adc)`
3291			`bwm 9`
3292			`000000 -- 177776 + 0 -> 177776 + 0`
3293			`177776`
3294			`000000`
3295			`000001 -- 177776 + 1 -> 177777 + 0`
3296			`177776`
3297			`000000`
3298			`000001 -- 177777 + 1 -> 000000 + 1`
3299			`177777`
3300			`000000`
3301			`#-----`
3302			`wal 011324 -- data test 2: (sbc)`
3303			`bwm 9`
3304			`000000 -- 000002 - 0 -> 000002 - 0`
3305			`000002`
3306			`000000`
3307			`000001 -- 000002 - 1 -> 000001 - 0`
3308			`000002`
3309			`000000`
3310			`000001 -- 000000 - 1 -> 177777 - 1`
3311			`000000`
3312			`000000`
3313			`#-----`
3314			`wal 011350 -- data test 3: (adcb)`
3315			`bwm 6`
3316			`000000 -- 376 + 0 -> 376 + 0`
3317			`000376`
3318			`000001 -- 376 + 1 -> 377 + 0`
3319			`000376`
3320			`000001 -- 377 + 1 -> 000 + 1`
3321			`000377`
3322			`#-----`
3323			`wal 011364 -- data test 4: (sbcb)`
3324			`bwm 6`
3325			`000000 -- 002 - 0 -> 002 - 0`
3326			`000002`
3327			`000001 -- 002 - 1 -> 001 - 0`
3328			`000002`
3329			`000001 -- 000 - 1 -> 337 - 1`
3330			`000000`
3331			`#`
3332			`C Exec code 33 (adc and sbc test)`
3333			`C Exec test 33.1 (adc)`
3334			`#`
3335			`wr0 011300 -- r0=11300`
3336			`wr1 000003 -- r1=3`
3337			`wsp 001400 -- sp=1400`
3338			`stapc 011200 -- start @ 11200`
3339			`wtgo`
3340			`rr0 d=011322 -- ! r0=11322`
3341			`rpc d=011212 -- ! pc`
3342			`wal 011300`
3343			`brm 9`
3344			`d=000000 -- ! mem(11300)=000000 -- 177776 + 0 -> 177776 + 0`
3345			`d=177776 -- ! mem(11302)=000000`
3346			`d=000000 -- ! mem(11304)=000000`
3347			`d=000000 -- ! mem(11306)=000000 -- 177776 + 1 -> 177777 + 0`
3348			`d=177777 -- ! mem(11310)=000000`
3349			`d=000000 -- ! mem(11312)=000000`
3350			`d=000000 -- ! mem(11314)=000000 -- 177777 + 1 -> 000000 + 1`
3351			`d=000000 -- ! mem(11316)=000000`
3352			`d=000001 -- ! mem(11320)=000000`
3353			`#----`
3354			`C Exec test 33.2 (sbc)`
3355			`#`
3356			`wr0 011324 -- r0=11324`
3357			`wr1 000003 -- r1=3`
3358			`wsp 001400 -- sp=1400`
3359			`stapc 011220 -- start @ 11220`
3360			`wtgo`
3361			`rr0 d=011346 -- ! r0=11346`
3362			`rpc d=011232 -- ! pc`
3363			`wal 011324`
3364			`brm 9`
3365			`d=000000 -- ! mem(11324)=000000 -- 000002 - 0 -> 000002 - 0`
3366			`d=000002 -- ! mem(11326)=000000`
3367			`d=000000 -- ! mem(11330)=000000`
3368			`d=000000 -- ! mem(11332)=000000 -- 000002 - 1 -> 000001 - 0`
3369			`d=000001 -- ! mem(11334)=000000`
3370			`d=000000 -- ! mem(11336)=000000`
3371			`d=000000 -- ! mem(11340)=000000 -- 000000 - 1 -> 177777 - 1`
3372			`d=177777 -- ! mem(11342)=000000`
3373			`d=000001 -- ! mem(11344)=000000`
3374			`#----`
3375			`C Exec test 33.3 (adcb)`
3376			`#`
3377			`wr0 011350 -- r0=11350`
3378			`wr1 000003 -- r1=3`
3379			`wsp 001400 -- sp=1400`
3380			`stapc 011240 -- start @ 11240`
3381			`wtgo`
3382			`rr0 d=011364 -- ! r0=11364`
3383			`rpc d=011252 -- ! pc`
3384			`wal 011350`
3385			`brm 6`
3386			`d=000000 -- ! mem(11350)=000000 -- 376 + 0 -> 376 + 0`
3387			`d=000376 -- ! mem(11352)=000000`
3388			`d=000000 -- ! mem(11354)=000000 -- 376 + 1 -> 377 + 0`
3389			`d=000377 -- ! mem(11356)=000000`
3390			`d=000000 -- ! mem(11360)=000000 -- 377 + 1 -> 000 + 1`
3391			`d=000400 -- ! mem(11362)=000000`
3392			`#----`
3393			`C Exec test 33.4 (sbcb)`
3394			`#`
3395			`wr0 011364 -- r0=11364`
3396			`wr1 000003 -- r1=3`
3397			`wsp 001400 -- sp=1400`
3398			`stapc 011260 -- start @ 11260`
3399			`wtgo`
3400			`rr0 d=011400 -- ! r0=11400`
3401			`rpc d=011272 -- ! pc`
3402			`wal 011364`
3403			`brm 6`
3404			`d=000000 -- ! mem(11364)=000000 -- 002 - 0 -> 002 - 0`
3405			`d=000002 -- ! mem(11366)=000000`
3406			`d=000000 -- ! mem(11370)=000000 -- 002 - 1 -> 001 - 0`
3407			`d=000001 -- ! mem(11372)=000000`
3408			`d=000000 -- ! mem(11374)=000000 -- 000 - 1 -> 337 - 1`
3409			`d=000777 -- ! mem(11377)=000000`
3410			`#-----------------------------------------------------------------------------`
3411			`C Setup code 34 [base 11400; use 114-115] (11/34 self test code)`
3412			`# code adapted from M9312 23-248F1 console PROM, the 11/04-34 Diagnostic PROM`
3413			`#`
3414			`wal 011400 -- code:`
3415			`bwm 51`
3416			`005000 -- clr r0 ; r0=000000 c=0`
3417			`005200 -- inc r0 ; r0=000001 c=0`
3418			`005100 -- com r0 ; r0=177776 c=1`
3419			`006200 -- asr r0 ; r0=177777 c=0`
3420			`006300 -- asl r0 ; r0=177776 c=1`
3421			`006000 -- ror r0 ; r0=177777 c=0`
3422			`005700 -- tst r0 ; r0=177777 c=0 ?impact unclear?`
3423			`005400 -- neg r0 ; r0=000001 c=1`
3424			`#11420`
3425			`005300 -- dec r0 ; r0=000000 c=1`
3426			`005600 -- sbc r0 ; r0=177777 c=1`
3427			`006100 -- rol r0 ; r0=177777 c=1`
3428			`005500 -- adc r0 ; r0=000000 c=1`
3429			`000300 -- swab r0 ; r0=000000 c=0`
3430			`001401 -- beq .+1 ;`
3431			`000000 -- halt ;`
3432			`012702 -- mov #data0,r2 ; r2=011560`
3433			`#11440`
3434			`011560`
3435			`011203 -- mov (r2),r3 ; r2=011560 r3=011560`
3436			`022203 -- cmp (r2)+,r3 ; r2=011562 r3=011560`
3437			`001401 -- beq .+1 ;`
3438			`000000 -- halt ;`
3439			`063203 -- add @(r2)+,r3 ; r2=011564 r3=<2*11560>`
3440			`165203 -- sub @-(r2),r3 ; r2=011562 r3=011560`
3441			`044203 -- bic -(r2),r3 ; r2=011560 r3=000000`
3442			`#11460`
3443			`056203 -- bis 12(r2),r3 ; r2=011560 r3=011566`
3444			`000012`
3445			`037203 -- bis @12(r2),r3 ; r2=011560 r3=011566`
3446			`000012`
3447			`001001 -- bne .+1 ;`
3448			`000000 -- halt ;`
3449			`010701 -- mov pc,r1 ; r1=011476`
3450			`000121 -- jmp (r1)+ ; jump 1.self 2. next; r1=011500`
3451			`#11500`
3452			`012701 -- mov #L2,r1 ; r1=011510`
3453			`011510`
3454			`000131 -- jmp @(r1)+ ; r1=011512 pc=011506`
3455			`000111 -- L1:jmp (r1) ; r1=011512 pc=011512`
3456			`011506 -- L2:.word L1`
3457			`105737 -- tstb data1 ;`
3458			`011564`
3459			`001401 -- beq .+1 ;`
3460			`#11520`
3461			`000000 -- halt ;`
3462			`010204 -- mov r2,r4 ; keep r2 for later check`
3463			`022424 -- cmp (r4)+,(r4)+ ; r4=011564`
3464			`105724 -- tstb (r4)+ ; r4=011565 (r4)+=000`
3465			`001401 -- beq .+1 ;`
3466			`000000 -- halt ;`
3467			`105714 -- tstb (r4) ; r4=011565 (r4)=200`
3468			`100402 -- bmi .+2 ;`
3469			`#11540`
3470			`000000 -- halt ;`
3471			`000000 -- halt ;`
3472			`000000 -- halt ;`
3473			`#-----`
3474			`wal 011560 -- data:`
3475			`bwm 8`
3476			`011560 -- data0: .word data0`
3477			`011560 -- .word data0`
3478			`100000 -- data1: .byte 000,200`
3479			`177777 -- data2: .word 177777`
3480			`011566 -- .word data2`
3481			`011566 -- .word data2`
3482			`000700 -- .word mem+0`
3483			`000701 -- .word mem+1`
3484			`#`
3485			`C Exec code 34 (11/34 self test code)`
3486			`# D RE RQ FU DAT`
3487			`stapc 011400 -- start @ 11400`
3488			`wtgo`
3489			`rr0 d=000000 -- ! r0`
3490			`rr1 d=011512 -- ! r1`
3491			`rr2 d=011560 -- ! r2`
3492			`rr3 d=011566 -- ! r3`
3493			`rr4 d=011565 -- ! r4`
3494			`rpc d=011546 -- ! pc`
3495			`#-----------------------------------------------------------------------------`
3496			`C Setup code 35 [base 11600; use 116-121] (11/70 self test code)`
3497			`# code adapted from M9312 23-616F1 console PROM, the 11/60-70 Diagnostic PROM`
3498			`#`
3499			`wal 011600 -- code:`
3500			`bwm 117`
3501			`005006 -- clr sp ; sp=000000`
3502			`100404 -- bmi L3 ;`
3503			`102403 -- bvs L3 ;`
3504			`101002 -- bhi L3 ;`
3505			`002401 -- blt L3 ;`
3506			`101401 -- blos L4 ;`
3507			`000000 -- L3: halt ;`
3508			`005306 -- L3: dec sp ; sp=177777`
3509			`#11620`
3510			`100003 -- bpl L5 ;`
3511			`001402 -- beq L5 ;`
3512			`002001 -- bge L5 ;`
3513			`003401 -- ble L6 ;`
3514			`000000 -- L5: halt ;`
3515			`006006 -- L6: ror sp ; sp=077777`
3516			`102002 -- bvc L7 ;`
3517			`103001 -- bcc L7 ;`
3518			`#11640`
3519			`001001 -- bne L8 ;`
3520			`000000 -- L7: halt ;`
3521			`012706 -- L8: mov #125252,sp ; sp=125252`
3522			`125252`
3523			`010600 -- mov sp,r0 ;`
3524			`010001 -- mov r0,r1 ;`
3525			`010102 -- mov r1,r2 ;`
3526			`010203 -- mov r2,r3 ;`
3527			`#11660`
3528			`010304 -- mov r3,r4 ;`
3529			`010405 -- mov r4,r5 ;`
3530			`160501 -- sub r5,r1 ; r1=00000`
3531			`002401 -- blt L9a ;`
3532			`001401 -- beq L9 ;`
3533			`000000 -- L9a: halt ;`
3534			`006102 -- L9: rol r2 ; r2=052524 c=1`
3535			`103001 -- bcc L10 ;`
3536			`#11700`
3537			`002401 -- blt L11 ;`
3538			`000000 -- L10: halt ;`
3539			`060203 -- L11: add r2,r3 ; r3=177776 (125252+052524)`
3540			`005203 -- inc r3 ; r3=177777`
3541			`005103 -- com r3 ; r3=000000`
3542			`060301 -- add r3,r1 ; r1=000000 c=0`
3543			`103401 -- bcs L12 ;`
3544			`003401 -- ble L13 ;`
3545			`#11720`
3546			`000000 -- L12: halt ;`
3547			`006004 -- L13: ror r4 ; r4=052525`
3548			`050403 -- bis r4,r3 ; r3=052525 (r3 was 0)`
3549			`060503 -- add r5,r3 ; r3=177777 c=0 (125252+052525)`
3550			`005203 -- inc r3 ; r3=000000 c=0 (kept)`
3551			`103402 -- bcs L14 ;`
3552			`005301 -- dec r1 ; r1=177777`
3553			`002401 -- blt L15 ;`
3554			`#11740`
3555			`000000 -- L14: halt ;`
3556			`005100 -- L15: com r0 ; r0=052525`
3557			`101401 -- blos L16 ;`
3558			`000000 -- halt ;`
3559			`040001 -- L16: bic r0,r1 ; r1=125252`
3560			`060101 -- L16: add r1,r1 ; r1=052524 c=1`
3561			`003001 -- bgt L17 ;`
3562			`003401 -- ble L18 ;`
3563			`#11760`
3564			`000000 -- L17: halt ;`
3565			`000301 -- L18: swab r1 ; r1=052125`
3566			`020127 -- cmp r1,#052125 ;`
3567			`052125`
3568			`001004 -- bne L19 ;`
3569			`030405 -- bit r4,r5 ;`
3570			`003002 -- bgt L19 ;`
3571			`005105 -- com r5 ; r5=052525`
3572			`#12000`
3573			`001001 -- bne L20 ;`
3574			`000000 -- L19: halt ;`
3575			`112700 -- L20: movb #177401,r0 ;`
3576			`177401`
3577			`100001 -- bpl L21 ;`
3578			`000000 -- L22: halt ;`
3579			`077002 -- L21: sob r0,L22 ;`
3580			`000261 -- sec ; c=1`
3581			`#12020`
3582			`006100 -- rol r0 ; r0=000001`
3583			`006100 -- rol r0 ; r0=000002`
3584			`006100 -- rol r0 ; r0=000004`
3585			`010001 -- mov r0,r1 ; r1=000004`
3586			`005401 -- neg r1 ; r1=177774`
3587			`005201 -- L23: inc r1 ;`
3588			`077002 -- sob r0,L23 ;`
3589			`005700 -- tst r0 ; here r0=r1=0`
3590			`#12040`
3591			`001002 -- bne L24 ;`
3592			`005701 -- tst r1 ;`
3593			`001401 -- beq L25 ;`
3594			`000000 -- L24: halt ;`
3595			`012706 -- L25: mov #776,sp ;`
3596			`000776 --`
3597			`004767 -- jsr pc,L26 ;`
3598			`000002`
3599			`#12060`
3600			`000000 -- N2: halt ;`
3601			`022716 -- L26: cmp #N2,(sp) ;`
3602			`012060`
3603			`001401 -- beq L27 ;`
3604			`000000 -- halt ;`
3605			`012716 -- L27: mov #N3,(sp) ;`
3606			`012102`
3607			`000207 -- rts pc ;`
3608			`#12100`
3609			`000000 -- halt ;`
3610			`005046 -- N3: clr -(sp) ;`
3611			`012746 -- mov #N4,-(sp) ;`
3612			`012114`
3613			`000002 -- rti ;`
3614			`000000 -- halt ;`
3615			`000137 -- N4: jmp @#N5 ;`
3616			`012122`
3617			`#12120`
3618			`000000 -- halt ;`
3619			`012705 -- N5: mov #160000,r5 ; r5=160000`
3620			`160000`
3621			`005037 -- clr @#6 ;`
3622			`000006`
3623			`012737 -- mov #N6,@#4 ;`
3624			`012150`
3625			`000004`
3626			`#12140`
3627			`012706 -- mov #776,sp ; sp=776`
3628			`000776`
3629			`005715 -- tst (r5) ; will fail, first word of I/O page`
3630			`000000 -- halt ;`
3631			`000000 -- N6: halt ;`
3632			`#`
3633			`C Exec code 35 (11/70 self test code)`
3634			`# D RE RQ FU DAT`
3635			`stapc 011600 -- start @ 11600`
3636			`wtgo`
3637			`rpc d=012152 -- ! pc`
3638			`wal 000004 -- vector: 4 -> trap catcher again`
3639			`bwm 2`
3640			`000006 -- PC:6`
3641			`000000 -- PS:0`
3642			`#-----------------------------------------------------------------------------`
3643			`# Up to here code and data (both input and result) occupied 'fresh' memory.`
3644			`# Easy to debug, but inconvenient when test should be extended later.`
3645			`# From here on, only code will always occupy fresh memory.`
3646			`# Data will be put into the upper part of the 16 kbyte memory:`
3647			`# test vector: 036000 (512 byte area)`
3648			`# result data: 037000 (512 byte area)`
3649			`#-----------------------------------------------------------------------------`
3650			`C Setup code 36 [base 12200] (systematic CMP test)`
3651			`#`
3652			`wal 012200 -- code:`
3653			`bwm 7`
3654			`000230 -- spl 0`
3655			`012400 -- L1: mov (r4)+,r0`
3656			`012401 -- mov (r4)+,r1`
3657			`020001 -- cmp r0,r1`
3658			`011225 -- mov (r2),(r5)+`
3659			`077305 -- sob r3,L1`
3660			`000000 -- halt`
3661			`#`
3662			`C Exec code 36 (systematic CMP test)`
3663			`C Exec test 36.1: data adapted from cmp.s11 code of Begemot p11-2.10c`
3664			`#`
3665			`wal 036000 -- setup test vector:`
3666			`bwm 22`
3667			`000000 -- 000000, 000000 --> nzvc=0100`
3668			`000000 --`
3669			`000001 -- 000001, 000001 --> nzvc=0100`
3670			`000001 --`
3671			`177777 -- 177777, 177777 --> nzvc=0100`
3672			`177777 --`
3673			`000000 -- 000000, 000001 --> nzvc=1001`
3674			`000001 --`
3675			`000000 -- 000000, 177777 --> nzvc=0001`
3676			`177777 --`
3677			`000001 -- 000001, 000000 --> nzvc=0000`
3678			`000000 --`
3679			`177777 -- 177777, 000000 --> nzvc=1000`
3680			`000000 --`
3681			`000001 -- 000001, 177777 --> nzvc=0001`
3682			`177777 --`
3683			`177777 -- 177777, 000001 --> nzvc=1000`
3684			`000001 --`
3685			`077777 -- 077777, 100000 --> nzvc=1011`
3686			`100000 --`
3687			`100000 -- 100000, 077777 --> nzvc=0010`
3688			`077777 --`
3689			`#----`
3690			`wr2 177776 -- r2=177776 -> psw`
3691			`wr3 000013 -- r3=13 -> test count`
3692			`wr4 036000 -- r4=36000 -> input area`
3693			`wr5 037000 -- r5=37000 -> output area`
3694			`wsp 001400 -- sp=1400`
3695			`stapc 012200 -- start @ 12200`
3696			`wtgo`
3697			`rpc d=012216 -- ! pc`
3698			`rr3 d=000000 -- ! r3=0`
3699			`rr4 d=036054 -- ! r4=12354`
3700			`rr5 d=037026 -- ! r5=12426`
3701			`wal 037000 --`
3702			`brm 11`
3703			`d=000004 -- 000000, 000000 --> nzvc=0100`
3704			`d=000004 -- 000001, 000001 --> nzvc=0100`
3705			`d=000004 -- 177777, 177777 --> nzvc=0100`
3706			`d=000011 -- 000000, 000001 --> nzvc=1001`
3707			`d=000001 -- 000000, 177777 --> nzvc=0001`
3708			`d=000000 -- 000001, 000000 --> nzvc=0000`
3709			`d=000010 -- 177777, 000000 --> nzvc=1000`
3710			`d=000001 -- 000001, 177777 --> nzvc=0001`
3711			`d=000010 -- 177777, 000001 --> nzvc=1000`
3712			`d=000013 -- 077777, 100000 --> nzvc=1011`
3713			`d=000002 -- 100000, 077777 --> nzvc=0010`
3714			`#-----------------------------------------------------------------------------`
3715			`C Setup code 37 [base 12300] (systematic DIV test)`
3716			`#`
3717			`wal 012300 -- code:`
3718			`bwm 9`
3719			`000230 -- spl 0`
3720			`012400 -- L1: mov (r4)+,r0`
3721			`012401 -- mov (r4)+,r1`
3722			`071024 -- div (r4)+,r0`
3723			`011225 -- mov (r2),(r5)+`
3724			`010025 -- mov r0,(r5)+`
3725			`010125 -- mov r1,(r5)+`
3726			`077307 -- sob r3,L1`
3727			`#12520`
3728			`000000 -- halt`
3729			`#`
3730			`C Exec code 37 (systematic DIV test)`
3731			`C Exec test 37.1: data adapted from div.s11 code of Begemot p11-2.10c`
3732			`#`
3733			`wal 036000 -- setup test vector:`
3734			`bwm 57`
3735			`000000 -- 0, 4, 0, 7, 0, 4# 4/ 0 -> 0111 0 4`
3736			`000004 --`
3737			`000000 --`
3738			`000000 -- 0, 4, 2, 0, 2, 0# 4/ 2 -> 0000 2 0`
3739			`000004 --`
3740			`000002 --`
3741			`000000 -- 0, 6, 2, 0, 3, 0# 6/ 2 -> 0000 3 0`
3742			`000006 --`
3743			`000002 --`
3744			`000000 -- 0, 4, -2, 10, -2, 0# 4/-2 ->1000 -2 0`
3745			`000004 --`
3746			`177776 --`
3747			`#36030`
3748			`000002 -- 2, 0, 1, 2, 2, 0# 0x20000 / 1`
3749			`000000 --`
3750			`000001 --`
3751			`000002 -- 2, 0, -2, 12, 2, 0# 0x20000 / -2`
3752			`000000 --`
3753			`177776 --`
3754			`100000 -- 100000, 0, 1, 12,100000, 0# 0x80000000 / 1`
3755			`000000 --`
3756			`000001 --`
3757			`177776 -- 177776,177777, -1, 2,177776,177777# -0x10001 / -1`
3758			`177777 --`
3759			`177777 --`
3760			`#36060`
3761			`177777 -- 177777,177773, 2, 10, -2, -1# -5 / 2`
3762			`177773 --`
3763			`000002 --`
3764			`177777 -- 177777,177773, -2, 0, 2, -1# -5 / -2`
3765			`177773 --`
3766			`177776 --`
3767			`177776 -- 177776, 0, 40000, 10, -10, 0# -0x20000/0x4000`
3768			`000000 --`
3769			`040000 --`
3770			`000100 -- 100, 200,177601, 12, 100, 200# 0x400080 / -0x7f`
3771			`000200 --`
3772			`177601 --`
3773			`#36110`
3774			`000000 -- 0, 1, 0, 7, 0, 1 # zero divide`
3775			`000001 --`
3776			`000000 --`
3777			`177777 -- -1, -1, 0, 7, -1, -1 # zero divide`
3778			`177777 --`
3779			`000000 --`
3780			`000000 -- 0, 0, 0, 7, 0, 0 # zero divide`
3781			`000000 --`
3782			`000000 --`
3783			`000001 -- 1, 1, 1, 2, 1, 1 # overflow`
3784			`000001 --`
3785			`000001 --`
3786			`#36140`
3787			`000001 -- 1, 1, -1, 012, 1, 1 # overflow`
3788			`000001 --`
3789			`177777 --`
3790			`177777 -- -1, -1, 1, 010, -1, 0 # wfjm corrected, not overflow`
3791			`177777 --`
3792			`000001 --`
3793			`177777 -- -1, -1, -1, 0, 1, 0 # wfjm corrected, not overflow`
3794			`177777 --`
3795			`177777 --`
3796			`#----`
3797			`wr2 177776 -- r2=177776 -> psw`
3798			`wr3 000023 -- r3=23 -> test count`
3799			`wr4 036000 -- r4=36000 -> input area`
3800			`wr5 037000 -- r5=37000 -> output area`
3801			`wsp 001400 -- sp=1400`
3802			`stapc 012300 -- start @ 12300`
3803			`wtgo`
3804			`rpc d=012322 -- ! pc`
3805			`rr3 d=000000 -- ! r3=0`
3806			`rr4 d=036162 -- ! r4=36162`
3807			`rr5 d=037162 -- ! r5=37162`
3808			`wal 037000 --`
3809			`brm 57`
3810			`d=000007 --! 0, 4, 0, 7, 0, 4# 4/ 0 -> 0111 0 4`
3811			`d=000000 --!`
3812			`d=000004 --!`
3813			`d=000000 --! 0, 4, 2, 0, 2, 0# 4/ 2 -> 0000 2 0`
3814			`d=000002 --!`
3815			`d=000000 --!`
3816			`d=000000 --! 0, 6, 2, 0, 3, 0# 6/ 2 -> 0000 3 0`
3817			`d=000003 --!`
3818			`d=000000 --!`
3819			`d=000010 --! 0, 4, -2, 10, -2, 0# 4/-2 ->1000 -2 0`
3820			`d=177776 --!`
3821			`d=000000 --!`
3822			`#37030`
3823			`d=000002 --! 2, 0, 1, 2, 2, 0# 0x20000 / 1`
3824			`d=000002 --!`
3825			`d=000000 --!`
3826			`d=000012 --! 2, 0, -2, 12, 2, 0# 0x20000 / -2`
3827			`d=000002 --!`
3828			`d=000000 --!`
3829			`d=000012 --!100000, 0, 1, 12,100000, 0# 0x80000000 / 1`
3830			`d=100000 --!`
3831			`d=000000 --!`
3832			`d=000002 --!177776,177777, -1, 2,177776,177777# -0x10001 / -1`
3833			`d=177776 --!`
3834			`d=177777 --!`
3835			`#37060`
3836			`d=000010 --!177777,177773, 2, 10, -2, -1# -5 / 2`
3837			`d=177776 --!`
3838			`d=177777 --!`
3839			`d=000000 --!177777,177773, -2, 0, 2, -1# -5 / -2`
3840			`d=000002 --!`
3841			`d=177777 --!`
3842			`d=000010 --!177776, 0, 40000, 10, -10, 0# -0x20000/0x4000`
3843			`d=177770 --!`
3844			`d=000000 --!`
3845			`d=000012 --! 100, 200,177601, 12, 100, 200# 0x400080 / -0x7f`
3846			`d=000100 --!`
3847			`d=000200 --!`
3848			`#37110`
3849			`d=000007 --! 0, 1, 0, 7, 0, 1 # zero divide`
3850			`d=000000 --!`
3851			`d=000001 --!`
3852			`d=000007 --! -1, -1, 0, 7, -1, -1 # zero divide`
3853			`d=177777 --!`
3854			`d=177777 --!`
3855			`d=000007 --! 0, 0, 0, 7, 0, 0 # zero divide`
3856			`d=000000 --!`
3857			`d=000000 --!`
3858			`d=000002 --! 1, 1, 1, 2, 1, 1 # overflow`
3859			`d=000001 --!`
3860			`d=000001 --!`
3861			`#13740`
3862			`d=000012 --! 1, 1, -1, 012, 1, 1 # overflow`
3863			`d=000001 --!`
3864			`d=000001 --!`
3865			`d=000010 --! -1, -1, 1, 010, -1, 0 # wfjm corrected, not overflow`
3866			`d=177777 --!`
3867			`d=000000 --!`
3868			`d=000000 --! -1, -1, -1, 0, 1, 0 # wfjm corrected, not overflow`
3869			`d=000001 --!`
3870			`d=000000 --!`
3871			`#--------`
3872			`C Exec test 37.2: data adapted from KDJ11.MAC, test 213, p. 139-141`
3873			`# D RE RQ FU DAT`
3874			`wal 036000 -- setup test vector:`
3875			`bwm 51`
3876			`177777 -- 177777,177777,177777, 0, 1, 0#`
3877			`177777 --`
3878			`177777 --`
3879	25	wfjm	`000000 -- 0,177777,177777,12, 0,177777# w11a:12,000001,000000`
3880	2	wfjm	`177777 --`
3881			`177777 --`
3882			`177777 -- 177777, 0,177777, 2,177777, 0#`
3883			`000000 --`
3884			`177777 --`
3885			`000000 -- 0, 7642, 7643, 4, 0, 7642#`
3886			`007642 --`
3887			`007643 --`
3888			`000000 -- 0, 137,177543, 4, 0, 137#`
3889			`000137 --`
3890			`177543 --`
3891			`000000 -- 0, 7643, 7643, 0, 1, 0#`
3892			`007643 --`
3893			`007643 --`
3894			`100000 -- 100000, 4376, 10021,12,100000, 4376#`
3895			`004376 --`
3896			`010021 --`
3897			`177700 -- 177700,170033, 10021,10,176024,171307#`
3898			`170033 --`
3899			`010021 --`
3900			`177700 -- 177700,170033,167757, 0, 1754,171307#`
3901			`170033 --`
3902			`167757 --`
3903			`000000 -- 0,177777, 1, 2, 0,177777#`
3904			`177777 --`
3905			`000001 --`
3906	25	wfjm	`177777 -- 177777, 45716, 1,12,177777, 45716# w11a:12,045716,000000`
3907	2	wfjm	`045716 --`
3908			`000001 --`
3909			`000000 -- 0, 2,177770, 4, 0, 2#`
3910			`000002 --`
3911			`177770 --`
3912			`177777 -- 177777,177776, 10, 4, 0,177776#`
3913			`177776 --`
3914			`000010 --`
3915			`000001 -- 1,177777, 1, 2, 1,177777#`
3916			`177777 --`
3917			`000001 --`
3918			`000001 -- 1, 0, 2, 2, 1, 0#`
3919			`000000 --`
3920			`000002 --`
3921			`000001 -- 1, 0, 3, 0, 52525, 1#`
3922			`000000 --`
3923			`000003 --`
3924			`000023 -- 23, 16054, 16537, 0, 246, 10222#`
3925			`016054 --`
3926			`016537 --`
3927			`#----`
3928			`wr2 177776 -- r2=177776 -> psw`
3929			`wr3 000021 -- r3=21 (17.) -> test count`
3930			`wr4 036000 -- r4=36000 -> input area`
3931			`wr5 037000 -- r5=37000 -> output area`
3932			`wsp 001400 -- sp=1400`
3933			`stapc 012300 -- start @ 12300`
3934			`wtgo`
3935			`rpc d=012322 -- ! pc`
3936			`rr3 d=000000 -- ! r3=0`
3937			`rr4 d=036146 -- ! r4=36146`
3938			`rr5 d=037146 -- ! r5=37146`
3939			`wal 037000 --`
3940			`brm 51`
3941			`d=000000 --!177777,177777,177777, 0, 1, 0#`
3942			`d=000001 --!`
3943			`d=000000 --!`
3944	25	wfjm	`d=000012 --! 0,177777,177777,12, 0,177777# w11a:12,000001,000000`
3945			`d=000001 --!`
3946	2	wfjm	`d=000000 --!`
3947			`d=000002 --!177777, 0,177777, 2,177777, 0#`
3948			`d=177777 --!`
3949			`d=000000 --!`
3950			`d=000004 --! 0, 7642, 7643, 4, 0, 7642#`
3951			`d=000000 --!`
3952			`d=007642 --!`
3953			`d=000004 --! 0, 137,177543, 4, 0, 137#`
3954			`d=000000 --!`
3955			`d=000137 --!`
3956			`d=000000 --! 0, 7643, 7643, 0, 1, 0#`
3957			`d=000001 --!`
3958			`d=000000 --!`
3959			`d=000012 --!100000, 4376, 10021,12,100000, 4376#`
3960			`d=100000 --!`
3961			`d=004376 --!`
3962			`d=000010 --!177700,170033, 10021,10,176024,171307#`
3963			`d=176024 --!`
3964			`d=171307 --!`
3965			`d=000000 --!177700,170033,167757, 0, 1754,171307#`
3966			`d=001754 --!`
3967			`d=171307 --!`
3968			`d=000002 --! 0,177777, 1, 2, 0,177777#`
3969			`d=000000 --!`
3970			`d=177777 --!`
3971	25	wfjm	`d=000012 --!177777, 45716, 1,12,177777, 45716# w11a:12,045716,000000`
3972	2	wfjm	`d=045716 --!`
3973	25	wfjm	`d=000000 --!`
3974	2	wfjm	`d=000004 --! 0, 2,177770, 4, 0, 2#`
3975			`d=000000 --!`
3976			`d=000002 --!`
3977			`d=000004 --!177777,177776, 10, 4, 0,177776#`
3978			`d=000000 --!`
3979			`d=177776 --!`
3980			`d=000002 --! 1,177777, 1, 2, 1,177777#`
3981			`d=000001 --!`
3982			`d=177777 --!`
3983			`d=000002 --! 1, 0, 2, 2, 1, 0#`
3984			`d=000001 --!`
3985			`d=000000 --!`
3986			`d=000000 --! 1, 0, 3, 0, 52525, 1#`
3987			`d=052525 --!`
3988			`d=000001 --!`
3989			`d=000000 --! 23, 16054, 16537, 0, 246, 10222#`
3990			`d=000246 --!`
3991			`d=010222 --!`
3992			`#-----------------------------------------------------------------------------`
3993			`C Setup code 40 [base 12400] (systematic ASH test)`
3994			`#`
3995			`wal 012400 -- code:`
3996			`bwm 15`
3997			`000230 -- spl 0`
3998			`016400 -- L1: mov 2(r4),r0`
3999			`000002`
4000			`011412 -- mov (r4),(r2)`
4001			`072064 -- ash 4(r4),r0`
4002			`000004`
4003			`011265 -- mov (r2),2(r5)`
4004			`000002`
4005			`#12420`
4006			`010015 -- mov r0,(r5)`
4007			`062704 -- add #6,r4`
4008			`000006`
4009			`062705 -- add #4,r5`
4010			`000004`
4011			`077315 -- sob r3,L1`
4012			`000000 -- halt`
4013			`#`
4014			`C Exec code 40 (systematic ASH test)`
4015			`C Exec test 40.1: data adapted from ash.s11 code of Begemot p11-2.10c`
4016			`#`
4017			`# The {} comments are original comments from Harti Brandt`
4018			`# Annotations starting with !! indicated mods for W11`
4019			`# Note, that the W11 does not have the microcode bugs of the J11 !`
4020			`#`
4021			`wal 036000 -- setup test vector:`
4022			`# test shift amount 0`
4023			`bwm 150`
4024			`000000 -- 00, 000000, 000000, 000000, 04`
4025			`000000 --`
4026			`000000 --`
4027			`000017 -- 17, 000000, 000000, 000000, 04`
4028			`000000 --`
4029			`000000 --`
4030			`000017 -- 17, 100001, 000000, 100001, 10`
4031			`100001 --`
4032			`000000 --`
4033			`000017 -- 17, 040001, 000000, 040001, 00`
4034			`040001 --`
4035			`000000 --`
4036			`000017 -- 17, 040001, 177700, 040001, 00`
4037			`040001 --`
4038			`177700 --`
4039			`# right shift positive values`
4040			`000000 -- 00, 000000, 000077, 000000, 04`
4041			`000000 --`
4042			`000077 --`
4043			`000017 -- 17, 000000, 000077, 000000, 04`
4044			`000000 --`
4045			`000077 --`
4046			`000000 -- 00, 000002, 000077, 000001, 00`
4047			`000002 --`
4048			`000077 --`
4049			`000000 -- 00, 000001, 000077, 000000, 05`
4050			`000001 --`
4051			`000077 --`
4052			`000000 -- 00, 000003, 000076, 000000, 05`
4053			`000003 --`
4054			`000076 --`
4055			`000000 -- 00, 000001, 000076, 000000, 04`
4056			`000001 --`
4057			`000076 --`
4058			`000000 -- 00, 040000, 000062, 000001, 00`
4059			`040000 --`
4060			`000062 --`
4061			`000000 -- 00, 040000, 000061, 000000, 05`
4062			`040000 --`
4063			`000061 --`
4064			`000000 -- 00, 040000, 000060, 000000, 04`
4065			`040000 --`
4066			`000060 --`
4067			`000000 -- 00, 040000, 000042, 000000, 04`
4068			`040000 --`
4069			`000042 --`
4070			`000000 -- 00, 040000, 000041, 000000, 04`
4071			`040000 --`
4072			`000041 --`
4073			`000000 -- 00, 040000, 000040, 000000, 04`
4074			`040000 --`
4075			`000040 --`
4076			`000000 -- 00, 040000, 100037, 000000, 04`
4077			`040000 --`
4078			`100037 --`
4079			`# right shift negative numbers`
4080			`000000 -- 00, 100002, 000077, 140001, 10`
4081			`100002 --`
4082			`000077 --`
4083			`000000 -- 00, 100002, 000076, 160000, 11`
4084			`100002 --`
4085			`000076 --`
4086			`000000 -- 00, 100002, 000075, 170000, 10`
4087			`100002 --`
4088			`000075 --`
4089			`000000 -- 00, 100002, 000062, 177776, 10`
4090			`100002 --`
4091			`000062 --`
4092			`000000 -- 00, 100002, 000061, 177777, 10`
4093			`100002 --`
4094			`000061 --`
4095			`000000 -- 00, 100002, 000060, 177777, 11`
4096			`100002 --`
4097			`000060 --`
4098			`000000 -- 00, 100002, 000057, 177777, 11`
4099			`100002 --`
4100			`000057 --`
4101			`000000 -- 00, 100002, 000056, 177777, 11`
4102			`100002 --`
4103			`000056 --`
4104			`000000 -- 00, 100002, 000041, 177777, 11`
4105			`100002 --`
4106			`000041 --`
4107			`000000 -- 00, 100002, 000040, 177777, 11`
4108			`100002 --`
4109			`000040 --`
4110			`000000 -- 00, 100002, 040037, 177777, 11`
4111			`100002 --`
4112			`040037 --`
4113			`# left shift positive numbers`
4114			`000000 -- 00, 000000, 000001, 000000, 04`
4115			`000000 --`
4116			`000001 --`
4117			`000017 -- 17, 000000, 000001, 000000, 04`
4118			`000000 --`
4119			`000001 --`
4120			`000000 -- 00, 000001, 000007, 000200, 00`
4121			`000001 --`
4122			`000007 --`
4123			`000000 -- 00, 000001, 000016, 040000, 00`
4124			`000001 --`
4125			`000016 --`
4126			`000000 -- 00, 000001, 000017, 100000, 12`
4127			`000001 --`
4128			`000017 --`
4129			`000000 -- 00, 000001, 000020, 000000, 07`
4130			`000001 --`
4131			`000020 --`
4132			`000000 -- 00, 000001, 000021, 000000, 06`
4133			`000001 --`
4134			`000021 --`
4135			`000000 -- 00, 000001, 000036, 000000, 06`
4136			`000001 --`
4137			`000036 --`
4138			`000000 -- 00, 000001, 000037, 000000, 04 {????}`
4139			`000001 --`
4140			`000037 --`
4141			`000000 -- 00, 000001, 000040, 000000, 04 {right shift!}`
4142			`000001 --`
4143			`000040 --`
4144			`000000 -- 00, 000001, 010037, 000000, 04 {right shift!}`
4145			`000001 --`
4146			`010037 --`
4147			`# left shift negative numbers`
4148			`000000 -- 00, 100001, 000001, 000002, 03`
4149			`100001 --`
4150			`000001 --`
4151			`000000 -- 00, 140001, 000001, 100002, 11`
4152			`140001 --`
4153			`000001 --`
4154			`000000 -- 00, 140001, 000002, 000004, 03`
4155			`140001 --`
4156			`000002 --`
4157			`000000 -- 00, 140001, 000016, 040000, 02`
4158			`140001 --`
4159			`000016 --`
4160			`000000 -- 00, 140001, 000017, 100000, 12`
4161			`140001 --`
4162			`000017 --`
4163			`000000 -- 00, 140001, 000020, 000000, 07`
4164			`140001 --`
4165			`000020 --`
4166			`000000 -- 00, 140001, 000021, 000000, 06`
4167			`140001 --`
4168			`000021 --`
4169			`000000 -- 00, 140002, 000035, 000000, 06`
4170			`140002 --`
4171			`000035 --`
4172			`000000 -- 00, 140002, 000036, 000000, 06`
4173			`140002 --`
4174			`000036 --`
4175			`000000 -- 00, 140002, 000037, 177777, 11 {????}`
4176			`140002 --`
4177			`000037 --`
4178			`#----`
4179			`wr2 177776 -- r2=177776 -> psw`
4180			`wr3 000062 -- r3=62 -> test count`
4181			`wr4 036000 -- r4=36000 -> input area`
4182			`wr5 037000 -- r5=37000 -> output area`
4183			`wsp 001400 -- sp=1400`
4184			`stapc 012400 -- start @ 12400`
4185			`wtgo`
4186			`rpc d=012436 -- ! pc`
4187			`rr3 d=000000 -- ! r3=0`
4188			`rr4 d=036454 -- ! r4=36454`
4189			`rr5 d=037310 -- ! r5=37310`
4190			`wal 037000 --`
4191			`# test shift amount 0`
4192			`brm 100`
4193			`d=000000 -- 00, 000000, 000000, 000000, 04`
4194			`d=000004 --`
4195			`d=000000 -- 17, 000000, 000000, 000000, 04`
4196			`d=000004 --`
4197			`d=100001 -- 17, 100001, 000000, 100001, 10`
4198			`d=000010 --`
4199			`d=040001 -- 17, 040001, 000000, 040001, 00`
4200			`d=000000 --`
4201			`d=040001 -- 17, 040001, 177700, 040001, 00`
4202			`d=000000 --`
4203			`#37024 # right shift positive values`
4204			`d=000000 -- 00, 000000, 000077, 000000, 04`
4205			`d=000004 --`
4206			`d=000000 -- 17, 000000, 000077, 000000, 04`
4207			`d=000004 --`
4208			`d=000001 -- 00, 000002, 000077, 000001, 00`
4209			`d=000000 --`
4210			`#37040`
4211			`d=000000 -- 00, 000001, 000077, 000000, 05`
4212			`d=000005 --`
4213			`d=000000 -- 00, 000003, 000076, 000000, 05`
4214			`d=000005 --`
4215			`d=000000 -- 00, 000001, 000076, 000000, 04`
4216			`d=000004 --`
4217			`d=000001 -- 00, 040000, 000062, 000001, 00`
4218			`d=000000 --`
4219			`#37060`
4220			`d=000000 -- 00, 040000, 000061, 000000, 05`
4221			`d=000005 --`
4222			`d=000000 -- 00, 040000, 000060, 000000, 04`
4223			`d=000004 --`
4224			`d=000000 -- 00, 040000, 000042, 000000, 04`
4225			`d=000004 --`
4226			`d=000000 -- 00, 040000, 000041, 000000, 04`
4227			`d=000004 --`
4228			`#37100`
4229			`d=000000 -- 00, 040000, 000040, 000000, 04`
4230			`d=000004 --`
4231			`d=000000 -- 00, 040000, 100037, 000000, 04`
4232			`d=000006 -- !!04->06`
4233			`#37110 # right shift negative numbers`
4234			`d=140001 -- 00, 100002, 000077, 140001, 10`
4235			`d=000010 --`
4236			`d=160000 -- 00, 100002, 000076, 160000, 11`
4237			`d=000011 --`
4238			`#37120`
4239			`d=170000 -- 00, 100002, 000075, 170000, 10`
4240			`d=000010 --`
4241			`d=177776 -- 00, 100002, 000062, 177776, 10`
4242			`d=000010 --`
4243			`d=177777 -- 00, 100002, 000061, 177777, 10`
4244			`d=000010 --`
4245			`d=177777 -- 00, 100002, 000060, 177777, 11`
4246			`d=000011 --`
4247			`#37140`
4248			`d=177777 -- 00, 100002, 000057, 177777, 11`
4249			`d=000011 --`
4250			`d=177777 -- 00, 100002, 000056, 177777, 11`
4251			`d=000011 --`
4252			`d=177777 -- 00, 100002, 000041, 177777, 11`
4253			`d=000011 --`
4254			`d=177777 -- 00, 100002, 000040, 177777, 11`
4255			`d=000011 -- see Note below [[s:10]]`
4256			`d=000000 -- 00, 100002, 040037, 177777, 11 !!-1->0`
4257			`d=000006 -- !!11->06`
4258			`#37164 # left shift positive numbers`
4259			`d=000000 -- 00, 000000, 000001, 000000, 04`
4260			`d=000004 --`
4261			`d=000000 -- 17, 000000, 000001, 000000, 04`
4262			`d=000004 --`
4263			`d=000200 -- 00, 000001, 000007, 000200, 00`
4264			`d=000000 --`
4265			`#37200`
4266			`d=040000 -- 00, 000001, 000016, 040000, 00`
4267			`d=000000 --`
4268			`d=100000 -- 00, 000001, 000017, 100000, 12`
4269			`d=000012 --`
4270			`d=000000 -- 00, 000001, 000020, 000000, 07`
4271			`d=000007 --`
4272			`d=000000 -- 00, 000001, 000021, 000000, 06`
4273			`d=000006 --`
4274			`#37220`
4275			`d=000000 -- 00, 000001, 000036, 000000, 06`
4276			`d=000006 --`
4277			`d=000000 -- 00, 000001, 000037, 000000, 04 {????}`
4278			`d=000006 -- !!04->06`
4279			`d=000000 -- 00, 000001, 000040, 000000, 04 {right shift!}`
4280			`d=000004 --`
4281			`d=000000 -- 00, 000001, 010037, 000000, 04 {right shift!}`
4282			`d=000006 -- !!04->06`
4283			`#37240 # left shift negative numbers`
4284			`d=000002 -- 00, 100001, 000001, 000002, 03`
4285			`d=000003 --`
4286			`d=100002 -- 00, 140001, 000001, 100002, 11`
4287			`d=000011 --`
4288			`d=000004 -- 00, 140001, 000002, 000004, 03`
4289			`d=000003 --`
4290			`d=040000 -- 00, 140001, 000016, 040000, 02`
4291			`d=000002 --`
4292			`#37260`
4293			`d=100000 -- 00, 140001, 000017, 100000, 12`
4294			`d=000012 --`
4295			`d=000000 -- 00, 140001, 000020, 000000, 07`
4296			`d=000007 --`
4297			`d=000000 -- 00, 140001, 000021, 000000, 06`
4298			`d=000006 --`
4299			`d=000000 -- 00, 140002, 000035, 000000, 06`
4300			`d=000006 --`
4301			`#37300`
4302			`d=000000 -- 00, 140002, 000036, 000000, 06`
4303			`d=000006 --`
4304			`d=000000 -- 00, 140002, 000037, 177777, 11 {????} !!-1->0`
4305			`d=000006 -- !!11->06`
4306			`#`
4307			`# simh notes:`
4308			`# 1. ash dst=100002,src=040 sets C=0 in simh. PSW is: s:10 b:11 W11:11`
4309			`#`
4310			`#-----------------------------------------------------------------------------`
4311			`C Setup code 41 [base 12500] (systematic ASHC even test)`
4312			`#`
4313			`wal 012500 -- code:`
4314			`bwm 19`
4315			`000230 -- spl 0`
4316			`016400 -- L1: mov 2(r4),r0`
4317			`000002`
4318			`016401 -- mov 4(r4),r1`
4319			`000004`
4320			`011412 -- mov (r4),(r2)`
4321			`073064 -- ashc 6(r4),r0`
4322			`000006`
4323			`#12520`
4324			`011265 -- mov (r2),4(r5)`
4325			`000004`
4326			`010015 -- mov r0,(r5)`
4327			`010165 -- mov r1,2(r5)`
4328			`000002`
4329			`062704 -- add #10,r4`
4330			`000010`
4331			`062705 -- add #6,r5`
4332			`#12540`
4333			`000006`
4334			`077321 -- sob r3,L1`
4335			`000000 -- halt`
4336			`#`
4337			`C Exec code 41 (systematic ASHC even test)`
4338			`C Exec test 41.1: data adapted from ashc.s11 code of Begemot p11-2.10c`
4339			`#`
4340			`# The {} comments are original comments from Harti Brandt`
4341			`# Annotations starting with !! indicated mods for W11`
4342			`# Note, that the W11 does not have the microcode bugs of the J11 !`
4343			`#`
4344			`wal 036000 -- setup test vector:`
4345			`# test when no shift at all, cc must be correctly set`
4346			`bwm 188`
4347			`000000 -- 00, 000000, 000000, 000000, 000000, 000000, 04`
4348			`000000 --`
4349			`000000 --`
4350			`000000 --`
4351			`000017 -- 17, 000000, 000000, 000000, 000000, 000000, 04`
4352			`000000 --`
4353			`000000 --`
4354			`000000 --`
4355			`000017 -- 17, 040000, 000001, 000000, 040000, 000001, 00`
4356			`040000 --`
4357			`000001 --`
4358			`000000 --`
4359			`000017 -- 17, 100000, 000001, 000000, 100000, 000001, 10`
4360			`100000 --`
4361			`000001 --`
4362			`000000 --`
4363			`000017 -- 17, 100000, 000001, 177700, 100000, 000001, 10`
4364			`100000 --`
4365			`000001 --`
4366			`177700 --`
4367			`# right shifts of positive numbers`
4368			`000000 -- 00, 000000, 000000, 000077, 000000, 000000, 04`
4369			`000000 --`
4370			`000000 --`
4371			`000077 --`
4372			`000017 -- 17, 000000, 000000, 000077, 000000, 000000, 04`
4373			`000000 --`
4374			`000000 --`
4375			`000077 --`
4376			`000000 -- 00, 040000, 000000, 000077, 020000, 000000, 00`
4377			`040000 --`
4378			`000000 --`
4379			`000077 --`
4380			`000000 -- 00, 040000, 000000, 177777, 020000, 000000, 00`
4381			`040000 --`
4382			`000000 --`
4383			`000077 --`
4384			`000000 -- 00, 040000, 000000, 000060, 000000, 040000, 00`
4385			`040000 --`
4386			`000000 --`
4387			`000060 --`
4388			`000000 -- 00, 040000, 000000, 000042, 000000, 000001, 00`
4389			`040000 --`
4390			`000000 --`
4391			`000042 --`
4392			`000000 -- 00, 040000, 000000, 000041, 000000, 000000, 05`
4393			`040000 --`
4394			`000000 --`
4395			`000041 --`
4396			`000000 -- 00, 040000, 000000, 000040, 000000, 000000, 04`
4397			`040000 --`
4398			`000000 --`
4399			`000040 --`
4400			`000000 -- 00, 040000, 000000, 177737, 000000, 000000, 04`
4401			`040000 --`
4402			`000000 --`
4403			`177737 --`
4404			`000000 -- 00, 000000, 000001, 177737, 000000, 000000, 04`
4405			`000000 --`
4406			`000001 --`
4407			`177737 --`
4408			`# right shifts of negative numbers`
4409			`000000 -- 00, 100000, 000002, 000077, 140000, 000001, 10`
4410			`100000 --`
4411			`000002 --`
4412			`000077 --`
4413			`000000 -- 00, 100020, 000001, 000077, 140010, 000000, 11`
4414			`100020 --`
4415			`000001 --`
4416			`000077 --`
4417			`000000 -- 00, 177777, 177776, 000077, 177777, 177777, 10`
4418			`177777 --`
4419			`177776 --`
4420			`000077 --`
4421			`000000 -- 00, 177777, 177777, 000077, 177777, 177777, 11`
4422			`177777 --`
4423			`177777 --`
4424			`000077 --`
4425			`000000 -- 00, 100000, 100000, 000060, 177777, 100000, 11`
4426			`100000 --`
4427			`100000 --`
4428			`000060 --`
4429			`000000 -- 00, 100000, 000000, 000060, 177777, 100000, 10`
4430			`100000 --`
4431			`000000 --`
4432			`000060 --`
4433			`000000 -- 00, 100000, 000001, 000042, 177777, 177776, 10`
4434			`100000 --`
4435			`000001 --`
4436			`000042 --`
4437			`000000 -- 00, 100000, 000001, 000041, 177777, 177777, 10`
4438			`100000 --`
4439			`000001 --`
4440			`000041 --`
4441			`000000 -- 00, 100000, 000001, 000040, 177777, 177777, 11`
4442			`100000 --`
4443			`000001 --`
4444			`000040 --`
4445			`000000 -- 00, 100000, 000001, 177737, 177777, 177777, 11`
4446			`100000 --`
4447			`000001 --`
4448			`177737 --`
4449			`# left shifts of positive numbers`
4450			`000000 -- 00, 000000, 000000, 000001, 000000, 000000, 04`
4451			`000000 --`
4452			`000000 --`
4453			`000001 --`
4454			`000017 -- 17, 000000, 000000, 000001, 000000, 000000, 04`
4455			`000000 --`
4456			`000000 --`
4457			`000001 --`
4458			`000000 -- 00, 000002, 000001, 000001, 000004, 000002, 00`
4459			`000002 --`
4460			`000001 --`
4461			`000001 --`
4462			`000000 -- 00, 000002, 100000, 000001, 000005, 000000, 00`
4463			`000002 --`
4464			`100000 --`
4465			`000001 --`
4466			`000000 -- 00, 040000, 000000, 000001, 100000, 000000, 12`
4467			`040000 --`
4468			`000000 --`
4469			`000001 --`
4470			`000000 -- 00, 040000, 000000, 000002, 000000, 000000, 07`
4471			`040000 --`
4472			`000000 --`
4473			`000002 --`
4474			`000000 -- 00, 040000, 000000, 000003, 000000, 000000, 06`
4475			`040000 --`
4476			`000000 --`
4477			`000003 --`
4478			`000000 -- 00, 000000, 000001, 177701, 000000, 000002, 00`
4479			`000000 --`
4480			`000001 --`
4481			`177701 --`
4482			`000000 -- 00, 000000, 000001, 177735, 020000, 000000, 00`
4483			`000000 --`
4484			`000001 --`
4485			`177735 --`
4486			`000000 -- 00, 000000, 000001, 177736, 040000, 000000, 00`
4487			`000000 --`
4488			`000001 --`
4489			`177736 --`
4490			`000000 -- 00, 000000, 000001, 000037, 100000, 000000, 12 {left shift!}`
4491			`000000 --`
4492			`000001 --`
4493			`000037 --`
4494			`000000 -- 00, 000000, 000001, 177737, 000000, 000000, 04 {right shift!}`
4495			`000000 --`
4496			`000001 --`
4497			`177737 --`
4498			`000000 -- 00, 000000, 000001, 020037, 000000, 000000, 04 {right shift!}`
4499			`000000 --`
4500			`000001 --`
4501			`020037 --`
4502			`# left shifts of negative numbers`
4503			`000000 -- 00, 177777, 177777, 000001, 177777, 177776, 11`
4504			`177777 --`
4505			`177777 --`
4506			`000001 --`
4507			`000000 -- 00, 177777, 177777, 000002, 177777, 177774, 11`
4508			`177777 --`
4509			`177777 --`
4510			`000002 --`
4511			`000000 -- 00, 177777, 177777, 000036, 140000, 000000, 11`
4512			`177777 --`
4513			`177777 --`
4514			`000036 --`
4515			`000000 -- 00, 177777, 177777, 000037, 100000, 000000, 11`
4516			`177777 --`
4517			`177777 --`
4518			`000037 --`
4519			`000000 -- 00, 177777, 177776, 000037, 000000, 000000, 07`
4520			`177777 --`
4521			`177776 --`
4522			`000037 --`
4523			`000000 -- 00, 177777, 177774, 000037, 000000, 000000, 06`
4524			`177777 --`
4525			`177774 --`
4526			`000037 --`
4527			`000000 -- 00, 177777, 177777, 177701, 177777, 177776, 11`
4528			`177777 --`
4529			`177777 --`
4530			`177701 --`
4531			`000000 -- 00, 177777, 177777, 001037, 177777, 177777, 11 {right shift!}`
4532			`177777 --`
4533			`177777 --`
4534			`001037 --`
4535			`000000 -- 00, 177777, 177777, 001036, 140000, 000000, 11`
4536			`177777 --`
4537			`177777 --`
4538			`001036 --`
4539			`#----`
4540			`wr2 177776 -- r2=177776`
4541			`wr3 000057 -- r3=57 (47.)`
4542			`wr4 036000 -- r4=36000`
4543			`wr5 037000 -- r5=37000`
4544			`wsp 001400 -- sp=1400`
4545			`stapc 012500 -- start @ 12500`
4546			`wtgo`
4547			`rpc d=012546 -- ! pc`
4548			`rr3 d=000000 -- ! r3=0`
4549			`rr4 d=036570 -- ! r4=36570`
4550			`rr5 d=037432 -- ! r5=37432`
4551			`wal 037000 --`
4552			`# test when no shift at all, cc must be correctly set`
4553			`brm 141`
4554			`d=000000 --!00, 000000, 000000, 000000, 000000, 000000, 04`
4555			`d=000000 --!`
4556			`d=000004 --!`
4557			`d=000000 --!17, 000000, 000000, 000000, 000000, 000000, 04`
4558			`d=000000 --!`
4559			`d=000004 --!`
4560			`d=040000 --!17, 040000, 000001, 000000, 040000, 000001, 00`
4561			`d=000001 --!`
4562			`d=000000 --!`
4563			`d=100000 --!17, 100000, 000001, 000000, 100000, 000001, 10`
4564			`d=000001 --!`
4565			`d=000010 --!`
4566			`#37030`
4567			`d=100000 --!17, 100000, 000001, 177700, 100000, 000001, 10`
4568			`d=000001 --!`
4569			`d=000010 --!`
4570			`# right shifts of positive numbers`
4571			`d=000000 --!00, 000000, 000000, 000077, 000000, 000000, 04`
4572			`d=000000 --!`
4573			`d=000004 --!`
4574			`d=000000 --!17, 000000, 000000, 000077, 000000, 000000, 04`
4575			`d=000000 --!`
4576			`d=000004 --!`
4577			`d=020000 --!00, 040000, 000000, 000077, 020000, 000000, 00`
4578			`d=000000 --!`
4579			`d=000000 --!`
4580			`#37060`
4581			`d=020000 --!00, 040000, 000000, 177777, 020000, 000000, 00`
4582			`d=000000 --!`
4583			`d=000000 --!`
4584			`d=000000 --!00, 040000, 000000, 000060, 000000, 040000, 00`
4585			`d=040000 --!`
4586			`d=000000 --!`
4587			`d=000000 --!00, 040000, 000000, 000042, 000000, 000001, 00`
4588			`d=000001 --!`
4589			`d=000000 --!`
4590			`d=000000 --!00, 040000, 000000, 000041, 000000, 000000, 05`
4591			`d=000000 --!`
4592			`d=000005 --!`
4593			`#37110`
4594			`d=000000 --!00, 040000, 000000, 000040, 000000, 000000, 04`
4595			`d=000000 --!`
4596			`d=000004 --!`
4597			`d=000000 --!00, 040000, 000000, 177737, 000000, 000000, 04`
4598			`d=000000 --!`
4599			`d=000006 --! !!04->06`
4600			`d=100000 --!00, 000000, 000001, 177737, 000000, 000000, 04!!->100000`
4601			`d=000000 --!`
4602			`d=000012 --! !!04->12`
4603			`# right shifts of negative numbers`
4604			`d=140000 --!00, 100000, 000002, 000077, 140000, 000001, 10`
4605			`d=000001 --!`
4606			`d=000010 --!`
4607			`#37140`
4608			`d=140010 --!00, 100020, 000001, 000077, 140010, 000000, 11`
4609			`d=000000 --!`
4610			`d=000011 --!`
4611			`d=177777 --!00, 177777, 177776, 000077, 177777, 177777, 10`
4612			`d=177777 --!`
4613			`d=000010 --!`
4614			`d=177777 --!00, 177777, 177777, 000077, 177777, 177777, 11`
4615			`d=177777 --!`
4616			`d=000011 --!`
4617			`d=177777 --!00, 100000, 100000, 000060, 177777, 100000, 11`
4618			`d=100000 --!`
4619			`d=000011 --!`
4620			`#37170`
4621			`d=177777 --!00, 100000, 000000, 000060, 177777, 100000, 10`
4622			`d=100000 --!`
4623			`d=000010 --!`
4624			`d=177777 --!00, 100000, 000001, 000042, 177777, 177776, 10`
4625			`d=177776 --!`
4626			`d=000010 --!`
4627			`d=177777 --!00, 100000, 000001, 000041, 177777, 177777, 10`
4628			`d=177777 --!`
4629			`d=000010 --!`
4630			`d=177777 --!00, 100000, 000001, 000040, 177777, 177777, 11`
4631			`d=177777 --!`
4632			`d=000011 --!`
4633			`#37220`
4634			`d=100000 --!00, 100000, 000001, 177737, 177777, 177777, 11!!->100000`
4635			`d=000000 --! !!->000000`
4636			`d=000012 --! !!11->12`
4637			`# left shifts of positive numbers`
4638			`d=000000 --!00, 000000, 000000, 000001, 000000, 000000, 04`
4639			`d=000000 --!`
4640			`d=000004 --!`
4641			`d=000000 --!17, 000000, 000000, 000001, 000000, 000000, 04`
4642			`d=000000 --!`
4643			`d=000004 --!`
4644			`d=000004 --!00, 000002, 000001, 000001, 000004, 000002, 00`
4645			`d=000002 --!`
4646			`d=000000 --!`
4647			`#37250`
4648			`d=000005 --!00, 000002, 100000, 000001, 000005, 000000, 00`
4649			`d=000000 --!`
4650			`d=000000 --!`
4651			`d=100000 --!00, 040000, 000000, 000001, 100000, 000000, 12`
4652			`d=000000 --!`
4653			`d=000012 --!`
4654			`d=000000 --!00, 040000, 000000, 000002, 000000, 000000, 07`
4655			`d=000000 --!`
4656			`d=000007 --!`
4657			`d=000000 --!00, 040000, 000000, 000003, 000000, 000000, 06`
4658			`d=000000 --!`
4659			`d=000006 --!`
4660			`#37300`
4661			`d=000000 --!00, 000000, 000001, 177701, 000000, 000002, 00`
4662			`d=000002 --!`
4663			`d=000000 --!`
4664			`d=020000 --!00, 000000, 000001, 177735, 020000, 000000, 00`
4665			`d=000000 --!`
4666			`d=000000 --!`
4667			`d=040000 --!00, 000000, 000001, 177736, 040000, 000000, 00`
4668			`d=000000 --!`
4669			`d=000000 --!`
4670			`d=100000 --!00, 000000, 000001, 000037, 100000, 000000, 12 {left shift!}`
4671			`d=000000 --!`
4672			`d=000012 --!`
4673			`#37330`
4674			`d=100000 --!00, 000000, 000001, 177737, 000000, 000000, 04 {right shift!} !!->100000`
4675			`d=000000 --!`
4676			`d=000012 --! !!04->12`
4677			`d=100000 --!00, 000000, 000001, 020037, 000000, 000000, 04 {right shift!} !!->100000`
4678			`d=000000 --!`
4679			`d=000012 --! !!04->12`
4680			`# left shifts of negative numbers`
4681			`d=177777 --!00, 177777, 177777, 000001, 177777, 177776, 11`
4682			`d=177776 --!`
4683			`d=000011 --!`
4684			`d=177777 --!00, 177777, 177777, 000002, 177777, 177774, 11`
4685			`d=177774 --!`
4686			`d=000011 --!`
4687			`#37360`
4688			`d=140000 --!00, 177777, 177777, 000036, 140000, 000000, 11`
4689			`d=000000 --!`
4690			`d=000011 --!`
4691			`d=100000 --!00, 177777, 177777, 000037, 100000, 000000, 11`
4692			`d=000000 --!`
4693			`d=000011 --!`
4694			`d=000000 --!00, 177777, 177776, 000037, 000000, 000000, 07`
4695			`d=000000 --!`
4696			`d=000007 --!`
4697			`d=000000 --!00, 177777, 177774, 000037, 000000, 000000, 06`
4698			`d=000000 --!`
4699			`d=000006 --!`
4700			`#37410`
4701			`d=177777 --!00, 177777, 177777, 177701, 177777, 177776, 11`
4702			`d=177776 --!`
4703			`d=000011 --!`
4704			`d=100000 --!00, 177777, 177777, 001037, 177777, 177777, 11 {right shift!} !!->100000`
4705			`d=000000 --! !!->00000`
4706			`d=000011 --!`
4707			`d=140000 --!00, 177777, 177777, 001036, 140000, 000000, 11`
4708			`d=000000 --!`
4709			`d=000011 --!`
4710			`#-----------------------------------------------------------------------------`
4711			`C Setup code 42 [base 12600] (systematic ASHC odd test)`
4712			`#`
4713			`wal 012600 -- code:`
4714			`bwm 15`
4715			`000230 -- spl 0`
4716			`016401 -- L1: mov 2(r4),r1`
4717			`000002`
4718			`011412 -- mov (r4),(r2)`
4719			`073164 -- ashc 4(r4),r1`
4720			`000004`
4721			`011265 -- mov (r2),2(r5)`
4722			`000002`
4723			`#12620`
4724			`010115 -- mov r1,(r5)`
4725			`062704 -- add #6,r4`
4726			`000006`
4727			`062705 -- add #4,r5`
4728			`000004`
4729			`077315 -- sob r3,L1`
4730			`000000 -- halt`
4731			`#`
4732			`C Exec code 42 (systematic ASHC odd test)`
4733			`C Exec test 42.1: data adapted from ashc.s11 code of Begemot p11-2.10c`
4734			`#`
4735			`# The {} comments are original comments from Harti Brandt`
4736			`# Annotations starting with !! indicated mods for W11`
4737			`# Note, that the W11 does not have the microcode bugs of the J11 !`
4738			`#`
4739			`wal 036000 -- setup test vector:`
4740			`# test shift amount 0`
4741			`bwm 165`
4742			`000000 -- 00, 000000, 000000, 000000, 04`
4743			`000000 --`
4744			`000000 --`
4745			`000017 -- 17, 000000, 000000, 000000, 04`
4746			`000000 --`
4747			`000000 --`
4748			`000017 -- 17, 100001, 000000, 100001, 10`
4749			`100001 --`
4750			`000000 --`
4751			`000017 -- 17, 040001, 000000, 040001, 00`
4752			`040001 --`
4753			`000000 --`
4754			`000017 -- 17, 040001, 177700, 040001, 00`
4755			`040001 --`
4756			`177700 --`
4757			`# right rotate positive values`
4758			`000000 -- 00, 000000, 000077, 000000, 04`
4759			`000000 --`
4760			`000077 --`
4761			`000017 -- 17, 000000, 000077, 000000, 04`
4762			`000000 --`
4763			`000077 --`
4764			`000000 -- 00, 000002, 000077, 000001, 00`
4765			`000002 --`
4766			`000077 --`
4767			`000000 -- 00, 000001, 000077, 100000, 01 {cc is funny!}`
4768			`000001 --`
4769			`000077 --`
4770			`000000 -- 00, 000003, 000076, 140000, 01`
4771			`000003 --`
4772			`000076 --`
4773			`000000 -- 00, 000001, 000076, 040000, 00`
4774			`000001 --`
4775			`000076 --`
4776			`000000 -- 00, 040000, 000060, 040000, 00`
4777			`040000 --`
4778			`000060 --`
4779			`000000 -- 00, 040000, 000043, 000002, 00`
4780			`040000 --`
4781			`000043 --`
4782			`000000 -- 00, 040000, 000042, 000001, 00`
4783			`040000 --`
4784			`000042 --`
4785			`000000 -- 00, 040000, 000041, 000000, 05`
4786			`040000 --`
4787			`000041 --`
4788			`000000 -- 00, 040000, 000040, 000000, 04`
4789			`040000 --`
4790			`000040 --`
4791			`000000 -- 00, 040000, 100037, 000000, 04`
4792			`040000 --`
4793			`100037 --`
4794			`000000 -- 00, 020000, 000043, 000001, 00`
4795			`020000 --`
4796			`000043 --`
4797			`000000 -- 00, 020000, 000042, 000000, 05`
4798			`020000 --`
4799			`000042 --`
4800			`000000 -- 00, 020000, 000041, 000000, 04`
4801			`020000 --`
4802			`000041 --`
4803			`# right rotate negative numbers`
4804			`000000 -- 00, 100002, 000077, 040001, 10`
4805			`100002 --`
4806			`000077 --`
4807			`000000 -- 00, 100002, 000076, 120000, 11`
4808			`100002 --`
4809			`000076 --`
4810			`000000 -- 00, 100002, 000075, 050000, 10`
4811			`100002 --`
4812			`000075 --`
4813			`000000 -- 00, 100002, 000061, 000005, 10`
4814			`100002 --`
4815			`000061 --`
4816			`000000 -- 00, 100002, 000060, 100002, 11`
4817			`100002 --`
4818			`000060 --`
4819			`000000 -- 00, 100002, 000057, 140001, 10`
4820			`100002 --`
4821			`000057 --`
4822			`000000 -- 00, 100002, 000056, 160000, 11`
4823			`100002 --`
4824			`000056 --`
4825			`000000 -- 00, 100002, 000055, 170000, 10`
4826			`100002 --`
4827			`000055 --`
4828			`000000 -- 00, 100002, 000042, 177776, 10`
4829			`100002 --`
4830			`000042 --`
4831			`000000 -- 00, 100002, 000041, 177777, 10`
4832			`100002 --`
4833			`000041 --`
4834			`000000 -- 00, 100002, 000040, 177777, 11`
4835			`100002 --`
4836			`000040 --`
4837			`000000 -- 00, 100002, 040037, 177777, 11`
4838			`100002 --`
4839			`040037 --`
4840			`# left rotate positive numbers`
4841			`000000 -- 00, 000000, 000001, 000000, 04`
4842			`000000 --`
4843			`000001 --`
4844			`000000 -- 17, 000000, 000001, 000000, 04`
4845			`000000 --`
4846			`000001 --`
4847			`000000 -- 00, 000001, 000007, 000200, 00`
4848			`000001 --`
4849			`000007 --`
4850			`000000 -- 00, 000001, 000016, 040000, 00`
4851			`000001 --`
4852			`000016 --`
4853			`000000 -- 00, 000001, 000017, 100000, 12`
4854			`000001 --`
4855			`000017 --`
4856			`000000 -- 00, 000001, 000020, 000000, 03`
4857			`000001 --`
4858			`000020 --`
4859			`000000 -- 00, 000001, 000021, 000000, 02`
4860			`000001 --`
4861			`000021 --`
4862			`000000 -- 00, 000001, 000036, 000000, 02`
4863			`000001 --`
4864			`000036 --`
4865			`000000 -- 00, 000001, 000037, 000000, 12`
4866			`000001 --`
4867			`000037 --`
4868			`000000 -- 00, 000001, 000040, 000000, 04 {right shift!}`
4869			`000001 --`
4870			`000040 --`
4871			`000000 -- 00, 000001, 010037, 000000, 04 {right shift!}`
4872			`000001 --`
4873			`010037 --`
4874			`# left rotate negative numbers`
4875			`000000 -- 00, 100001, 000001, 000002, 03`
4876			`100001 --`
4877			`000001 --`
4878			`000000 -- 00, 140001, 000001, 100002, 11`
4879			`140001 --`
4880			`000001 --`
4881			`000000 -- 00, 140001, 000002, 000004, 03`
4882			`140001 --`
4883			`000002 --`
4884			`000000 -- 00, 140001, 000016, 040000, 02`
4885			`140001 --`
4886			`000016 --`
4887			`000000 -- 00, 140001, 000017, 100000, 12`
4888			`140001 --`
4889			`000017 --`
4890			`000000 -- 00, 140001, 000020, 000000, 13`
4891			`140001 --`
4892			`000020 --`
4893			`000000 -- 00, 140001, 000021, 000000, 13`
4894			`140001 --`
4895			`000021 --`
4896			`000000 -- 00, 140001, 000022, 000000, 03`
4897			`140001 --`
4898			`000022 --`
4899			`000000 -- 00, 140001, 000023, 000000, 02`
4900			`140001 --`
4901			`000023 --`
4902			`000000 -- 00, 140002, 000035, 000000, 02`
4903			`140002 --`
4904			`000035 --`
4905			`000000 -- 00, 140002, 000036, 000000, 12`
4906			`140002 --`
4907			`000036 --`
4908			`000000 -- 00, 140002, 000037, 000000, 07`
4909			`140002 --`
4910			`000037 --`
4911			`#----`
4912			`wr2 177776 -- r2=177776 -> psw`
4913			`wr3 000067 -- r3=67 (55.) -> test count`
4914			`wr4 036000 -- r4=36000 -> input area`
4915			`wr5 037000 -- r5=37000 -> output area`
4916			`wsp 001400 -- sp=1400`
4917			`stapc 012600 -- start @ 12600`
4918			`wtgo`
4919			`rpc d=012636 -- ! pc`
4920			`rr3 d=000000 -- ! r3=0`
4921			`rr4 d=036512 -- ! r4=36512`
4922			`rr5 d=037334 -- ! r5=37334`
4923			`wal 037000 --`
4924			`# test shift amount 0`
4925			`brm 110`
4926			`d=000000 --!00, 000000, 000000, 000000, 04`
4927			`d=000004 --!`
4928			`d=000000 --!17, 000000, 000000, 000000, 04`
4929			`d=000004 --!`
4930			`d=100001 --!17, 100001, 000000, 100001, 10`
4931			`d=000010 --!`
4932			`d=040001 --!17, 040001, 000000, 040001, 00`
4933			`d=000000 --!`
4934			`#37020`
4935			`d=040001 --!17, 040001, 177700, 040001, 00`
4936			`d=000000 --!`
4937			`# right rotate positive values`
4938			`d=000000 --!00, 000000, 000077, 000000, 04`
4939			`d=000004 --!`
4940			`d=000000 --!17, 000000, 000077, 000000, 04`
4941			`d=000004 --!`
4942			`d=000001 --!00, 000002, 000077, 000001, 00`
4943			`d=000000 --!`
4944			`#37040`
4945			`d=100000 --!00, 000001, 000077, 100000, 01 {cc is funny!}`
4946			`d=000001 --!`
4947			`d=140000 --!00, 000003, 000076, 140000, 01`
4948			`d=000001 --!`
4949			`d=040000 --!00, 000001, 000076, 040000, 00`
4950			`d=000000 --!`
4951			`d=040000 --!00, 040000, 000060, 040000, 00`
4952			`d=000000 --!`
4953			`#37060`
4954			`d=000002 --!00, 040000, 000043, 000002, 00`
4955			`d=000000 --!`
4956			`d=000001 --!00, 040000, 000042, 000001, 00`
4957			`d=000000 --!`
4958			`d=000000 --!00, 040000, 000041, 000000, 05`
4959			`d=000005 --!`
4960			`d=000000 --!00, 040000, 000040, 000000, 04`
4961			`d=000004 --!`
4962			`#37100`
4963			`d=000000 --!00, 040000, 100037, 000000, 04`
4964			`d=000006 --! !!04->06`
4965			`d=000001 --!00, 020000, 000043, 000001, 00`
4966			`d=000000 --!`
4967			`d=000000 --!00, 020000, 000042, 000000, 05`
4968			`d=000005 --!`
4969			`d=000000 --!00, 020000, 000041, 000000, 04`
4970			`d=000004 --!`
4971			`#37120 # right rotate negative numbers`
4972			`d=040001 --!00, 100002, 000077, 040001, 10`
4973			`d=000010 --!`
4974			`d=120000 --!00, 100002, 000076, 120000, 11`
4975			`d=000011 --!`
4976			`d=050000 --!00, 100002, 000075, 050000, 10`
4977			`d=000010 --!`
4978			`d=000005 --!00, 100002, 000061, 000005, 10`
4979			`d=000010 --!`
4980			`#37140`
4981			`d=100002 --!00, 100002, 000060, 100002, 11`
4982			`d=000011 --!`
4983			`d=140001 --!00, 100002, 000057, 140001, 10`
4984			`d=000010 --!`
4985			`d=160000 --!00, 100002, 000056, 160000, 11`
4986			`d=000011 --!`
4987			`d=170000 --!00, 100002, 000055, 170000, 10`
4988			`d=000010 --!`
4989			`#37160`
4990			`d=177776 --!00, 100002, 000042, 177776, 10`
4991			`d=000010 --!`
4992			`d=177777 --!00, 100002, 000041, 177777, 10`
4993			`d=000010 --!`
4994			`d=177777 --!00, 100002, 000040, 177777, 11`
4995			`d=000011 --!`
4996			`d=000000 --!00, 100002, 040037, 177777, 11 !!->000000`
4997			`d=000007 --! !!11->07`
4998			`#37200 # left rotate positive numbers`
4999			`d=000000 --!00, 000000, 000001, 000000, 04`
5000			`d=000004 --!`
5001			`d=000000 --!17, 000000, 000001, 000000, 04`
5002			`d=000004 --!`
5003			`d=000200 --!00, 000001, 000007, 000200, 00`
5004			`d=000000 --!`
5005			`d=040000 --!00, 000001, 000016, 040000, 00`
5006			`d=000000 --!`
5007			`#37220`
5008			`d=100000 --!00, 000001, 000017, 100000, 12`
5009			`d=000012 --!`
5010			`d=000000 --!00, 000001, 000020, 000000, 03`
5011			`d=000003 --!`
5012			`d=000000 --!00, 000001, 000021, 000000, 02`
5013			`d=000002 --!`
5014			`d=000000 --!00, 000001, 000036, 000000, 02`
5015			`d=000002 --!`
5016			`#37240`
5017			`d=000000 --!00, 000001, 000037, 000000, 12`
5018			`d=000012 --!`
5019			`d=000000 --!00, 000001, 000040, 000000, 04 {right shift!}`
5020			`d=000004 --!`
5021			`d=000000 --!00, 000001, 010037, 000000, 04 {right shift!}`
5022			`d=000012 --! !!04->12`
5023			`# left rotate negative numbers`
5024			`d=000002 --!00, 100001, 000001, 000002, 03`
5025			`d=000003 --!`
5026			`#37260`
5027			`d=100002 --!00, 140001, 000001, 100002, 11`
5028			`d=000011 --!`
5029			`d=000004 --!00, 140001, 000002, 000004, 03`
5030			`d=000003 --!`
5031			`d=040000 --!00, 140001, 000016, 040000, 02`
5032			`d=000002 --!`
5033			`d=100000 --!00, 140001, 000017, 100000, 12`
5034			`d=000012 --!`
5035			`#37300`
5036			`d=000000 --!00, 140001, 000020, 000000, 13`
5037			`d=000013 --!`
5038			`d=000000 --!00, 140001, 000021, 000000, 13`
5039			`d=000013 --!`
5040			`d=000000 --!00, 140001, 000022, 000000, 03`
5041			`d=000003 --!`
5042			`d=000000 --!00, 140001, 000023, 000000, 02`
5043			`d=000002 --!`
5044			`#37320`
5045			`d=000000 --!00, 140002, 000035, 000000, 02`
5046			`d=000002 --!`
5047			`d=000000 --!00, 140002, 000036, 000000, 12`
5048			`d=000012 --!`
5049			`d=000000 --!00, 140002, 000037, 000000, 07`
5050			`d=000007 --!`
5051			`#-----------------------------------------------------------------------------`
5052			`C Setup code 43 [base 12700] (Begemot MARK instruction test)`
5053			`# test data and code adapted from Mark.s11 code of Begemot p11-2.10c`
5054			`#`
5055			`wal 012700 -- code test 1: (basics)`
5056			`bwm 14`
5057			`012705 -- mov #77077,r5 ; cookie`
5058			`077077`
5059			`010546 -- mov r5,-(sp) ; push r5`
5060			`012746 -- mov #12,-(sp) ; parameter 1`
5061			`000012`
5062			`012746 -- mov #23,-(sp) ; parameter 2`
5063			`000023`
5064			`012746 -- mov #mark+2,-(sp) ; now the mark instruction`
5065			`#12720`
5066			`006402`
5067			`010605 -- mov sp,r5 ; let r5 point to mark instruction`
5068			`004737 -- jsr pc,subr ; call subroutine`
5069			`012770`
5070			`000240 -- noop`
5071			`000000 -- halt`
5072			`#-----`
5073			`wal 012740 -- code test 2: (MARK with max. # of args)`
5074			`bwm 10`
5075			`010546 -- mov r5, -(sp) ; push r5`
5076			`162706 -- sub #2*77, sp ; max number`
5077			`000176`
5078			`012746 -- mov #mark+77, -(sp) ; the mark instruction`
5079			`006477`
5080			`010605 -- mov sp, r5 ; let r5 point to mark instruction`
5081			`004737 -- jsr pc, subr ; call subroutine`
5082			`012770`
5083			`#12760`
5084			`000240 -- noop`
5085			`000000 -- halt`
5086			`#-----`
5087			`wal 012770 -- code (procedure):`
5088			`wmi 000205 -- subr: rts r5`
5089			`#-----`
5090			`C Exec code 43 (Begemot MARK test)`
5091			`C Exec test 43.1 (basics)`
5092			`# D RE RQ FU DAT`
5093			`wsp 001400 -- sp=1400`
5094			`stapc 012700 -- start @ 12700`
5095			`wtgo`
5096			`rpc d=012734 -- ! pc`
5097			`rr5 d=077077 -- ! r5`
5098			`rsp d=001400 -- ! sp`
5099			`wal 001366 --`
5100			`brm 5`
5101			`d=012730 -- ! mem(1366)`
5102			`d=006402 -- ! mem(1370)`
5103			`d=000023 -- ! mem(1372)`
5104			`d=000012 -- ! mem(1374)`
5105			`d=077077 -- ! mem(1376)`
5106			`#----`
5107			`C Exec test 43.2 (MARK with max. # of args)`
5108			`# D RE RQ FU DAT`
5109			`wsp 001400 -- sp=1400`
5110			`stapc 012740 -- start @ 12740`
5111			`wtgo`
5112			`rpc d=012764 -- ! pc`
5113			`rr5 d=077077 -- ! r5`
5114			`rsp d=001400 -- ! sp`
5115			`#-----------------------------------------------------------------------------`
5116			`C Setup code 44 [base 13000] (Implementation variations)`
5117			`# test various PDP11 implementation variations (DCJ11 user guide, table C-1)`
5118			`#`
5119			`wal 013000 -- code: (to be single stepped mostly)`
5120			`bwm 22`
5121			`010424 -- mov r4,(r4)+ ; case 1 and 2`
5122			`010444 -- mov r4,-(r4)`
5123			`010764 -- mov pc,2(r4)`
5124			`000002`
5125			`000124 -- jmp (r4)+`
5126			`000104 -- jmp r4`
5127			`000304 -- swab r4`
5128			`005214 -- inc (r4)`
5129			`#13020`
5130			`000006 -- rtt`
5131			`000000 -- halt`
5132			`000002 -- rti`
5133			`000000 -- halt`
5134			`010011 -- mov r0,(r1)`
5135			`010046 -- mov r0,-(sp)`
5136			`000114 -- jmp (r4)`
5137			`010021 -- mov r0,(r1)+`
5138			`#13040`
5139			`012100 -- mov (r1)+,r0`
5140			`005221 -- inc (r1)+`
5141			`106621 -- mtpd (r1)+`
5142			`106506 -- mfpd sp`
5143			`106606 -- mtpd sp`
5144			`000003 -- bpt`
5145			`#-----`
5146			`wal 013070 -- code: (target for rtt,rti tests)`
5147			`bwm 2`
5148			`000240 -- noop`
5149			`000000 -- halt`
5150			`#-----`
5151			`C Exec code 44 (Implementation variations)`
5152			`C test 44.1: OPR R,(R)+ : incremented before {J11} or after {70} use as source`
5153			`#`
5154			`rst -- console reset`
5155			`wps 000000 -- clear psw`
5156			`wr4 001600 -- r4=1600`
5157			`wsp 001400 -- sp=1400`
5158			`wpc 013000 -- pc=13000`
5159			`step -- step (mov r4,(r4)+)`
5160			`rpc d=013002 -- ! pc=13002`
5161			`rr4 d=001602 -- ! r4=1602`
5162			`wal 001600 -- check target location`
5163			`rmi d=001600 -- ! ; initial content of R expected for 11/70`
5164			`#`
5165			`C test 44.2: OPR R,-(R) : decremented before {J11} or after {70} use as source`
5166			`#`
5167			`wr4 001600 -- r4=1600`
5168			`wsp 001400 -- sp=1400`
5169			`wpc 013002 -- pc=13002`
5170			`step -- step (mov r4,-(r4))`
5171			`rpc d=013004 -- ! pc=13004`
5172			`rr4 d=001576 -- ! r4=1576`
5173			`wal 001600 -- check target location`
5174			`rmi d=001600 -- ! ; initial content of R expected for 11/70`
5175			`#`
5176			`C test 44.3: OPR PC,A(R) : store PC+2 {70} or PC+4 {J11}`
5177			`#`
5178			`wr4 001600 -- r4=1600`
5179			`wsp 001400 -- sp=1400`
5180			`wpc 013004 -- pc=13004`
5181			`step -- step (mov pc,2(r4))`
5182			`rpc d=013010 -- ! pc=13010`
5183			`wal 001602 -- check target location`
5184			`rmi d=013006 -- ! ; PC+2 expected for 11/70`
5185			`#`
5186			`C test 44.4: JMP (R)+ : R used {70;J11} or R+2 used {05,10,15,20}`
5187			`#`
5188			`wr4 013074 -- r4=13074`
5189			`wsp 001400 -- sp=1400`
5190			`wpc 013010 -- pc=13010`
5191			`step -- step (jmp (r4)+)`
5192			`rpc d=013074 -- ! pc=13074 ; R expected for 11/70`
5193			`rr4 d=013076 -- ! r4=13076`
5194			`#`
5195			`C test 44.5: JMP R : traps to 10 {44,45,70;J11} or 4 {all others}`
5196			`C Note: J11 doc is wrong, 11/70 traps 10, not 4, as stated`
5197			`#`
5198			`wal 177766 -- clear CPUERR`
5199			`wm 000000 --`
5200			`wr4 000000 -- r4=0`
5201			`wsp 001400 -- sp=1400`
5202			`wpc 013012 -- pc=13012`
5203			`step -- step (jmp r4) [[s:2]]`
5204			`rpc d=000012 -- ! pc=12 ; trap 10 expected for 11/70 [[s:10]]`
5205			`rsp d=001374 -- ! sp=1374`
5206			`wal 177766 -- check CPUERR`
5207			`rm d=000000 -- ! CPUERR: no bit set`
5208			`wm 000000 -- clear CPUERR`
5209			`#`
5210			`C test 44.6: SWAB does not change V {15,20} or clears V {all others}`
5211			`#`
5212			`wr4 000300 -- r4=3000`
5213			`wsp 001400 -- sp=1400`
5214			`wpc 013014 -- pc=13014`
5215			`wps 000017 -- psw: set all cc flags in psw`
5216			`step -- step (swab r4)`
5217			`rpc d=013016 -- ! pc=13074`
5218			`rr4 d=140000 -- ! r4=140000`
5219			`rps d=000004 -- ! psw: Z=1 ; clear V expected for 11/70`
5220			`#`
5221			`C test 44.7: CPU access to 177700-177717 (regs) timesout {70,J11} or not {05,10}`
5222			`#`
5223			`wr4 177700 -- r4=177700`
5224			`wsp 001400 -- sp=1400`
5225			`wpc 013016 -- pc=13016`
5226			`step -- step (inc (r4)) [[s:2]]`
5227			`rpc d=000006 -- ! pc=6 ; trap 4 expected for 11/70 [[s:10]]`
5228			`rsp d=001374 -- ! sp=1374`
5229			`wal 177766 -- check CPUERR`
5230			`rm d=000020 -- ! CPUERR: (iobto=1)`
5231			`wm 000000 -- clear CPUERR`
5232			`#`
5233			`C test 44.10: If RTT sets T bit, trap occurs after instr. following RTT {70,J11}`
5234			`#`
5235			`wal 001374 -- setup stack with rtt return frame setting T flag`
5236			`bwm 2`
5237			`013070 -- start address (points to: noop, halt)`
5238			`000020 -- set T flag in PSW`
5239			`wsp 001374 -- sp=1374`
5240			`wpc 013020 -- pc=13020`
5241			`cont -- cont (rtt)`
5242			`wtgo`
5243			`rpc d=000020 -- ! pc=20 ; T-trap executed`
5244			`rsp d=001374 -- ! sp=1374`
5245			`wal 001374 -- check stack`
5246			`brm 2`
5247			`d=013072 -- trap address: address after noop expected for 11/70`
5248			`d=000020 -- PSW`
5249			`rst -- console reset (to clear T flag)`
5250			`#`
5251			`C test 44.11: If RTI sets T bit, T trap occurs immediately {70,J11}`
5252			`#`
5253			`wal 001374 -- setup stack with rtt return frame setting T flag`
5254			`bwm 2`
5255			`013070 -- start address (points to: noop, halt)`
5256			`000020 -- set T flag in PSW`
5257			`wsp 001374 -- sp=1374`
5258			`wpc 013024 -- pc=13024`
5259			`cont -- cont (rti)`
5260			`wtgo`
5261			`rpc d=000020 -- ! pc=20 ; T-trap executed`
5262			`rsp d=001374 -- ! sp=1374`
5263			`wal 001374 -- check stack`
5264			`brm 2`
5265			`d=013070 -- trap address: address of noop expected for 11/70`
5266			`d=000020 -- PSW`
5267			`rst -- console reset (to clear T flag)`
5268			`#`
5269			`C test 44.14: Direct access to PSW can {05..20} / cannot {others} set T bit`
5270			`#`
5271			`wr0 000030 -- r0=30 (set T bit, N also)`
5272			`wr1 177776 -- r1=177776 (PSW address)`
5273			`wsp 001400 -- sp=1400`
5274			`wpc 013030 -- pc=13030`
5275			`step -- step (mov r0,(r1))`
5276			`rpc d=013032 -- ! pc=13032`
5277			`rps d=000010 -- ! psw: T bit not set expected for 11/70`
5278			`#`
5279			`C test 44.15: odd address using SP causes HALT {<=20} or emmergency stack {>35}`
5280			`#`
5281			`wsp 001401 -- sp=1401`
5282			`wpc 013032 -- pc=13032`
5283			`step -- step (mov r0,-(sp)) [[s:2]]`
5284			`rpc d=000006 -- ! pc=6 ; trap 4 [[s:13034]]`
5285			`rsp d=000000 -- ! sp=0 ; emergency stack expected for 11/70 [[s:4]]`
5286			`wal 000000 -- check emergency stack`
5287			`brm 2`
5288			`d=013034 -- ! PC of abort [[s:0]]`
5289			`d=000000 -- ! PS of abort (currently gets lost...)`
5290			`rst -- console reset (to clear CPUERR reg)`
5291			`wal 000000 -- clean tainted memory`
5292			`bwm 2`
5293			`000000 --`
5294			`000000 --`
5295			`#`
5296			`# simh notes:`
5297			`# 1. apparently not consistently implemented in simh. SP is set to 4, but`
5298			`# interrupt/trap sequence isn't executed. Effectively, simh halt's.`
5299			`#`
5300			`# for the test 28/29/30x enable MMU and make address 100000 unavailable`
5301			`#`
5302			`wal 172310 -- kernel I space DR segment 4 (base 100000)`
5303			`wmi 077400 -- slf=127; ed=0(up); acf=0 (non resident)`
5304			`#`
5305			`C test 44.28: If PC->bad memory, PC incremented {others} / not inc'ed {35,40}`
5306			`#`
5307			`wal 177572 -- SSR0`
5308			`wmi 000001 -- set enable bit`
5309			`wr4 100000 -- r4=100000`
5310			`wsp 001400 -- sp=1400`
5311			`wpc 013034 -- pc=13034`
5312			`cont -- cont (jmp (r4))`
5313			`wtgo`
5314			`rpc d=000254 -- ! pc=254 ; trap 240 ; Note: halt is executed, was cont !`
5315			`rsp d=001374 -- ! sp=1374`
5316			`wal 001374 -- check stack`
5317			`brm 2`
5318			`d=100002 -- trap address: PC inc'ed expected for 11/70 [[s:100000]]`
5319			`d=000340 -- PSW`
5320			`rst -- console reset (to clear CPUERR reg)`
5321			`#`
5322			`# simh notes:`
5323			`# 1. simh reads instruction, later increments PC. Thus PC not inc'ed in simh.`
5324			`#`
5325			`C test 44.29/30a: If R->bad in mode 2, R inc'ed {others} / or not {4,34,44}`
5326			`C test for dstw chain (mov r0,(r1)+)`
5327			`#`
5328			`wal 177572 -- SSR0`
5329			`wmi 000001 -- set enable bit`
5330			`wr1 100000 -- r1=100000`
5331			`wsp 001400 -- sp=1400`
5332			`wpc 013036 -- pc=13036`
5333			`step -- step (mov r0,(r1)+) [[s:2]]`
5334			`rpc d=000252 -- ! pc=252 ; trap 250 [[s:254]]`
5335			`rsp d=001374 -- ! sp=1374`
5336			`rr1 d=100002 -- ! r1=100002`
5337			`wal 177572 -- check SSR0/1`
5338			`brm 2`
5339			`d=100011 -- ! SSR0: (abo_nonres=1,seg=4,ena=1) see note [[s:100211]]`
5340			`d=000021 -- ! SSR1: ra=1,2`
5341			`rst -- console reset (to clear CPUERR reg)`
5342			`#`
5343			`C test 44.29/30b: If R->bad in mode 2, R inc'ed {others} / or not {4,34,44}`
5344			`C test for srcr chain (mov (r1)+,r0)`
5345			`#`
5346			`wal 177572 -- SSR0`
5347			`wmi 000001 -- set enable bit`
5348			`wr1 100000 -- r1=100000`
5349			`wsp 001400 -- sp=1400`
5350			`wpc 013040 -- pc=13040`
5351			`step -- step ((mov (r1)+,r0) [[s:2]]`
5352			`rpc d=000252 -- ! pc=252 ; trap 250 [[s:254]]`
5353			`rsp d=001374 -- ! sp=1374`
5354			`rr1 d=100002 -- ! r1=100002`
5355			`wal 177572 -- check SSR0/1`
5356			`brm 2`
5357			`d=100011 -- ! SSR0: (abo_nonres=1,seg=4,ena=1) see note [[s:100211]]`
5358			`d=000021 -- ! SSR1: ra=1,2`
5359			`rst -- console reset (to clear CPUERR reg)`
5360			`#`
5361			`C test 44.29/30c: If R->bad in mode 2, R inc'ed {others} / or not {4,34,44}`
5362			`C test for dstr chain (inc (r1)+)`
5363			`#`
5364			`wal 177572 -- SSR0`
5365			`wmi 000001 -- set enable bit`
5366			`wr1 100000 -- r1=100000`
5367			`wsp 001400 -- sp=1400`
5368			`wpc 013042 -- pc=13042`
5369			`step -- step (inc (r1)+) [[s:2]]`
5370			`rpc d=000252 -- ! pc=252 ; trap 250 [[s:254]]`
5371			`rsp d=001374 -- ! sp=1374`
5372			`rr1 d=100002 -- ! r1=100002`
5373			`wal 177572 -- check SSR0/1`
5374			`brm 2`
5375			`d=100011 -- ! SSR0: (abo_nonres=1,seg=4,ena=1) see note [[s:100211]]`
5376			`d=000021 -- ! SSR1: ra=1,2`
5377			`rst -- console reset (to clear CPUERR reg)`
5378			`C test 44.29/30d: If R->bad in mode 2, R inc'ed {others} / or not {4,34,44}`
5379			`C test for dsta chain (mtpd (r1)+)`
5380			`#`
5381			`wal 177572 -- SSR0`
5382			`wmi 000001 -- set enable bit`
5383			`wr1 100000 -- r1=100000`
5384			`wsp 001376 -- sp=1376`
5385			`wpc 013044 -- pc=13044`
5386			`wal 001376 -- push a word on stack for mtpd`
5387			`wmi 123456 --`
5388			`step -- step (mtpd (r1)+) [[s:2]]`
5389			`rpc d=000252 -- ! pc=252 ; trap 250 [[s:254]]`
5390			`rsp d=001374 -- ! sp=1374`
5391			`rr1 d=100002 -- ! r1=100002`
5392			`wal 177572 -- check SSR0/1`
5393			`brm 2`
5394			`d=100011 -- ! SSR0: (abo_nonres=1,seg=4,ena=1) see note [[s:100211]]`
5395			`d=010426 -- ! SSR1: rb=1,2; ra=6,2`
5396			`rst -- console reset (to clear CPUERR reg)`
5397			`#`
5398			`# simh notes:`
5399			`# 1. simh first pops, than writes to destination, reversing ra,rb in SSR1`
5400			`#`
5401			`# now reset MMU to default`
5402			`#`
5403			`wal 172310 -- kernel I space DR segment 4 (base 100000)`
5404			`wmi 077406 -- slf=127; ed=0(up); acf=6 (r/w)`
5405			`#`
5406			`C test 44.39: cmode=10 will cause abort {70,J11}, treated as kmode {23,24}`
5407			`#`
5408			`wal 177572 -- SSR0`
5409			`wmi 000001 -- set enable bit`
5410			`wr1 001400 -- r1=1400`
5411			`wsp 001400 -- sp=1400`
5412			`wps 100000 -- psw: set cm=10, pm=00`
5413			`wpc 013042 -- pc=13042`
5414			`step -- step (inc (r1)+) [[s:2]]`
5415			`rpc d=000252 -- ! pc=252 ; trap 250; as expected for 11/70 [[s:254]]`
5416			`rsp d=001374 -- ! sp=1374`
5417			`rr1 d=001400 -- ! r1=1400`
5418			`wal 177572 -- check SSR0/1`
5419			`brm 3`
5420			`d=140101 -- ! SSR0: (abo_nr=1,abo_l=1,m=10,seg=0,ena=1) [[s:140301]]`
5421			`d=000000 -- ! SSR1: ra=none`
5422			`d=013042 -- ! SSR2: PC of failed instruction`
5423			`wal 001374 -- check stack`
5424			`brm 2`
5425			`d=013044 -- ! PC after failed instruction [[s:013042]]`
5426			`d=100000 -- ! PS`
5427			`rst -- console reset (to clear CPUERR reg, PSW)`
5428			`#`
5429			`# simh notes:`
5430			`# 1. simh saves PC of failed instruction on stack, not PC after instruction`
5431			`#`
5432			`C test 44.43: user mode HALT: trap 4 {70} or 10 {others}`
5433			`#`
5434			`wal 177766 -- check CPUERR ;??? remove if console reset fixed`
5435			`wm 000000 -- clear`
5436			`wsp 001400 -- sp=1400`
5437			`wps 170000 -- psw: set cm=11, pm=11`
5438			`wpc 013022 -- pc=13022`
5439			`step -- step (halt in user mode) [[s:2]]`
5440			`rpc d=000006 -- ! pc=6 ; trap 4; as expected for 11/70 [[s:10]]`
5441			`rsp d=001374 -- ! sp=1374`
5442			`wal 001374 -- check stack`
5443			`brm 2`
5444			`d=013024 -- ! PC after failed instruction`
5445			`d=170000 -- ! PS`
5446			`wal 177766 -- check CPUERR`
5447			`rm d=000200 -- ! CPUERR: (illhalt=1)`
5448			`rst -- console reset (to clear CPUERR reg, PSW)`
5449			`#`
5450			`C test 44.44: PDR bit<0> implemented {70} or not {others}`
5451			`#`
5452			`wal 172310 -- kernel I space DR, segment 4`
5453			`wm 077401 -- set acf bit 0: slf=127; ed=0(up); acf=1 (r+trap)`
5454			`rm d=077401 -- ! check; works as expected for 11/70`
5455			`wm 077406 -- restore: slf=127; ed=0(up); acf=6(w/r)`
5456			`#`
5457			`C test 44.45: PDR bit<7>(AIB any access) implemented {70} or not {others}`
5458			`#`
5459			`wal 172300 -- kernel I space DR, reset segment 0 and 1`
5460			`bwm 2`
5461			`077404 -- slf=127; ed=0(up); acf=4(w/r and trap)`
5462			`077404 -- slf=127; ed=0(up); acf=4(w/r and trap)`
5463			`wal 172300 -- check kernel I space DR, segment 0 and 1`
5464			`brm 2`
5465			`d=077404 -- !`
5466			`d=077404 -- !`
5467			`wal 177572 -- SSR0`
5468			`wmi 000001 -- set enable bit`
5469			`wr0 123456 -- r0=123456`
5470			`wr1 030000 -- r1=30000`
5471			`wsp 001400 -- sp=1400`
5472			`wpc 013030 -- pc=13030`
5473			`step -- step (mov r0,(r1))`
5474			`rpc d=013032 -- ! pc=next`
5475			`rsp d=001400 -- ! sp=1400`
5476			`wal 030000 -- check target memory, untaint`
5477			`rm d=123456 -- !`
5478			`wm 000000 --`
5479			`wal 172300 -- check kernel I space DR, segment 0 and 1`
5480			`brm 2`
5481			`d=077604 -- ! slf=127; ed=0(up); acf=4(w/r+trap); aib=10 (A=1,W=0)`
5482			`d=077704 -- ! slf=127; ed=0(up); acf=4(w/r+trap); aib=11 (A=1,W=1)`
5483			`wal 172300 -- kernel I space DR, reset segment 0 and 1`
5484			`bwm 2`
5485			`077406 -- slf=127; ed=0(up); acf=6(w/r)`
5486			`077406 -- slf=127; ed=0(up); acf=6(w/r)`
5487			`rst -- console reset (to clear CPUERR reg)`
5488			`#`
5489			`C test 44.46: Full PAR implemented {44,70,J11} or not {others}`
5490			`#`
5491			`wal 172350 -- kernel I space AR, segment 4`
5492			`wm 177777 -- set all bits`
5493			`rm d=177777 -- ! check; works as expected for 11/70`
5494			`wm 001000 -- restore: 1000 100000 base`
5495			`#`
5496			`C test 44.47: MMR0<9>(mmu trap) implemented {70} or not {others}`
5497			`#`
5498			`wal 177572 -- SSR0`
5499			`wm 001000 -- set trap enable`
5500			`rm d=001000 -- ! check; works as expected for 11/70`
5501			`wm 000000 -- restore`
5502			`#`
5503			`C test 44.48: MMR3<2:0>(D space) implemented {44,70,J11} or not {others}`
5504			`#`
5505			`wal 172516 -- SSR3`
5506			`wm 000007 -- set D space bis`
5507			`rm d=000007 -- ! check; works as expected for 11/70`
5508			`wm 000000 -- restore`
5509			`#`
5510			`C test 44.49: MMR3<5:4>(UMAP, 22 bit) implemented {44,70,J11} or not {others}`
5511			`#`
5512			`wal 172516 -- SSR3`
5513			`wm 000060 -- set D space bits`
5514			`rm d=000060 -- ! check; available, as expected for 11/70`
5515			`wm 000000 -- restore`
5516			`#`
5517			`C test 44.50: MMR3<3>(CSM enable) implemented {44,J11} or not {others}`
5518			`#`
5519			`wal 172516 -- SSR3`
5520			`wm 000010 -- set D space bit`
5521			`rm d=000000 -- ! check; not available, as expected for 11/70`
5522			`wm 000000 -- restore`
5523			`#`
5524			`C test 44.51: MMR2 tracks fetches {70} or instructions only {others}`
5525			`C here W11 behaves like {others}, fetches are not tracked in SSR2`
5526			`C Also: instruction complete flag set in SSR0 after bpt.`
5527			`#`
5528			`wal 177572 -- SSR0`
5529			`wmi 000001 -- set enable bit`
5530			`wsp 001400 -- sp=1400`
5531			`wpc 013052 -- pc=13052`
5532			`step -- step (bpt)`
5533			`rpc d=000016 -- ! pc=16; trap 14 see note [[s:13054]]`
5534			`wal 177572 -- check SSR0/1/2`
5535			`brm 3`
5536			`d=000001 -- ! SSR0: (ena=1)`
5537			`d=000000 -- ! SSR1: ra=none`
5538			`d=013052 -- ! SSR2: PC of bpt`
5539			`step -- step (halt)`
5540			`rpc d=000020 -- ! pc=20 (after halt)`
5541			`wal 177572 -- check SSR0/1/2`
5542			`brm 3`
5543			`d=000001 -- ! SSR0: (ena=1)`
5544			`d=000000 -- ! SSR1: ra=none`
5545			`d=000016 -- ! SSR2: PC of halt`
5546			`rst -- console reset (to clear CPUERR reg, PSW)`
5547			`#`
5548			`# simh notes:`
5549			`# 1. when simh steps over a BPT,IOT,..., the PC is pointing after the`
5550			`# instruction. The trap sequence together with first instruction is`
5551			`# executed in next step.`
5552			`#`
5553			`C test 44.52: MT/FPx SP for pmode=10 unpredictable {others} / user SP {J11}`
5554			`# write registers`
5555			`#`
5556			`wr0 000001 -- set r0,..,r7`
5557			`wr1 000101 --`
5558			`wr2 000201 --`
5559			`wr3 000301 --`
5560			`wr4 000401 --`
5561			`wr5 000501 --`
5562			`wsp 001400 --`
5563			`wpc 000701 --`
5564			`# write register set 1, sm,um stack`
5565			`#`
5566			`wps 004000 -- psw: cm=kernel, set=1`
5567			`wr0 010001 -- set r0,..,r5 [[r10]]`
5568			`wr1 010101 -- [[r11]]`
5569			`wr2 010201 -- [[r12]]`
5570			`wr3 010301 -- [[r13]]`
5571			`wr4 010401 -- [[r14]]`
5572			`wr5 010501 -- [[r15]]`
5573			`wps 044000 -- psw: cm=super(01),set=1`
5574			`wsp 010601 -- set ssp [[ssp]]`
5575			`wps 144000 -- psw: cm=user(11),set=1`
5576			`wsp 110601 -- set usp [[usp]]`
5577			`#`
5578			`C 52a: MFPS for pmode=10`
5579			`#`
5580			`wps 020000 -- psw: set cm=00, pm=10`
5581			`wpc 013046 -- pc=13046`
5582			`step -- step (mfpd sp)`
5583			`rpc d=013050 -- ! pc=next`
5584			`rsp d=001376 -- ! sp=1376`
5585			`wal 001376 -- check stack`
5586			`rmi d=013046 -- ! it returns PC like 11/70 unpredictable [[s:0]]`
5587			`rst -- console reset (to clear CPUERR reg)`
5588			`#`
5589			`# simh note:`
5590			`# 1. simh returns 0 here, just unpredictable in a different way ...`
5591			`#`
5592			`C 52a: MTPS for pmode=10`
5593			`#`
5594			`wal 001376 -- setup stack with value for mtpd`
5595			`wmi 123446 --`
5596			`wps 020000 -- psw: set cm=00, pm=10`
5597			`wpc 013050 -- pc=13050`
5598			`step -- step (mtpd sp)`
5599			`rpc d=013052 -- ! pc=next`
5600			`rsp d=001400 -- ! sp=1400`
5601			`# check registers`
5602			`#`
5603			`rr0 d=000001 -- ! r0,..,r7`
5604			`rr1 d=000101 -- !`
5605			`rr2 d=000201 -- !`
5606			`rr3 d=000301 -- !`
5607			`rr4 d=000401 -- !`
5608			`rr5 d=000501 -- !`
5609			`# check register set 1, sm,um stack`
5610			`#`
5611			`wps 004000 -- psw: cm=kernel, set=1`
5612			`rr0 d=010001 -- ! r0,..,r5 [[r10]]`
5613			`rr1 d=010101 -- ! [[r11]]`
5614			`rr2 d=010201 -- ! [[r12]]`
5615			`rr3 d=010301 -- ! [[r13]]`
5616			`rr4 d=010401 -- ! [[r14]]`
5617			`rr5 d=010501 -- ! [[r15]]`
5618			`wps 044000 -- psw: cm=super(01),set=1`
5619			`rsp d=010601 -- ! ssp [[ssp]]`
5620			`wps 144000 -- psw: cm=user(11),set=1`
5621			`rsp d=110601 -- ! usp [[usp]]`
5622			`# --> all preset values intact; -> mtpd thus noop --> like 11/70 unpredictable`
5623			`#`
5624			`rst -- console reset (to clear CPUERR reg)`
5625			`#`
5626			`# simh notes on MMR0:`
5627			`# 1. simh doesn't freeze MMR0 bit 7, the instr.compl. bit is set again after`
5628			`# executing first instruction of trap handler.`
5629			`#`
5630			`#-----------------------------------------------------------------------------`
5631			`C Setup code 45 [base 13100] (mmr1 and instructions with implicit stack push/pop`
5632			`#`
5633			`wal 013100 -- code: (to be single stepped mostly)`
5634			`bwm 5`
5635			`106621 -- mtpd (r1)+`
5636			`106521 -- mfpd (r1)+`
5637			`004721 -- jsr pc,(r1)+`
5638			`000000 -- halt`
5639			`#13110`
5640			`000207 -- rts pc`
5641			`#-----`
5642			`C Exec code 45 (mmr1 and instructions with implicit stack push/pop)`
5643			`C test 45.1: mtpd (r1)+`
5644			`#`
5645			`wal 177572 -- SSR0`
5646			`wmi 000001 -- set enable bit`
5647			`wal 001376 -- setup stack with value for mtpd`
5648			`wmi 123456 --`
5649			`wr1 030000 -- r1=30000`
5650			`wsp 001376 -- sp=1376`
5651			`wpc 013100 -- pc=13100`
5652			`step -- step (mtpd (r1)+)`
5653			`rpc d=013102 -- ! pc=next`
5654			`rsp d=001400 -- ! sp=1400`
5655			`rr1 d=030002 -- ! r1=30002`
5656			`wal 177572 -- check SSR0/1/2`
5657			`brm 3`
5658			`d=000003 -- ! SSR0: (seg=1,ena=1)`
5659			`d=010426 -- ! SSR1: rb=1,2; ra=6,2`
5660			`d=013100 -- ! SSR2: PC of mtpd`
5661			`wal 030000 -- check target memory`
5662			`rm d=123456 -- !`
5663			`rst -- console reset`
5664			`#`
5665			`C test 45.2: mfpd (r1)+`
5666			`#`
5667			`wal 177572 -- SSR0`
5668			`wmi 000001 -- set enable bit`
5669			`wr1 030000 -- r1=30000`
5670			`wsp 001400 -- sp=1400`
5671			`wpc 013102 -- pc=13102`
5672			`step -- step (mfpd (r1)+)`
5673			`rpc d=013104 -- ! pc=next`
5674			`rsp d=001376 -- ! sp=1376`
5675			`rr1 d=030002 -- ! r1=30002`
5676			`wal 177572 -- check SSR0/1/2`
5677			`brm 3`
5678			`d=000001 -- ! SSR0: (seg=0,ena=1)`
5679			`d=173021 -- ! SSR1: rb=6,-2; ra=1,2`
5680			`d=013102 -- ! SSR2: PC of mtpd`
5681			`wal 001376 -- check stack`
5682			`rmi d=123456 -- !`
5683			`wal 030000 -- clear tainted target memory`
5684			`wm 000000 --`
5685			`rst -- console reset`
5686			`#`
5687			`C test 45.3: jsr pc,(r1)+ and rts pc`
5688			`#`
5689			`wal 177572 -- SSR0`
5690			`wmi 000001 -- set enable bit`
5691			`wr1 013110 -- r1=13110`
5692			`wsp 001400 -- sp=1400`
5693			`wpc 013104 -- pc=13104`
5694			`step -- step (jsr pc,(r1)+)`
5695			`rpc d=013110 -- ! pc=target`
5696			`rsp d=001376 -- ! sp=1376`
5697			`rr1 d=013112 -- ! r1=13112`
5698			`wal 177572 -- check SSR0/1/2`
5699			`brm 3`
5700			`d=000001 -- ! SSR0: (seg=0,ena=1)`
5701			`d=173021 -- ! SSR1: rb=6,-2; ra=1,2`
5702			`d=013104 -- ! SSR2: PC of jsr`
5703			`wal 001376 -- check stack`
5704			`rmi d=013106 -- ! PC after jsr`
5705			`step -- step (rts pc)`
5706			`rpc d=013106 -- ! pc=target`
5707			`rsp d=001400 -- ! sp=1400`
5708			`wal 177572 -- check SSR0/1/2`
5709			`brm 3`
5710			`d=000001 -- ! SSR0: (seg=0,ena=1)`
5711			`d=000026 -- ! SSR1: ra=6,2 [[s:0]]`
5712			`d=013110 -- ! SSR2: PC of rts`
5713			`rst -- console reset`
5714			`#`
5715			`# simh notes:`
5716			`# 1. simh reads stack and incremets sp later. In case of an MMU abort on`
5717			`# stack read, simh SSR1 will be 0, while W11 shows the sp increment`
5718			`#`
5719			`#-----------------------------------------------------------------------------`
5720			`C Setup code 46 [base 13200] (systematic result+cc test of 1+2op instructions)`
5721			`# the following codes expect:`
5722			`# r0-> psw`
5723			`# r1-> loop count`
5724			`# r2-> input ptr`
5725			`# r3-> output ptr`
5726			`# r4-> src reg`
5727			`# r5-> dst reg`
5728			`#`
5729			`wal 013200 -- code 1: test 1op register`
5730			`bwm 8`
5731			`000230 -- spl 0`
5732			`012205 -- L1: mov (r2)+,r5 ; load dst`
5733			`000000 -- halt ; ccmov set cc's`
5734			`000000 -- halt ; iut instr. under test`
5735			`011023 -- mov (r0),(r3)+ ; save psw`
5736			`010523 -- mov r5,(r3)+ ; save dst`
5737			`077106 -- sob r1,L1 (.-6)`
5738			`000000 -- halt`
5739			`#----`
5740			`wal 013220 -- code 2: test 1op memory`
5741			`bwm 8`
5742			`000230 -- spl 0`
5743			`012215 -- L1: mov (r2)+,(r5) ; load dst`
5744			`000000 -- halt ; ccmov set cc's`
5745			`000000 -- halt ; iut instr. under test`
5746			`011023 -- mov (r0),(r3)+ ; save psw`
5747			`011523 -- mov (r5),(r3)+ ; save dst`
5748			`077106 -- sob r1,L1 (.-6)`
5749			`000000 -- halt`
5750			`#-----`
5751			`wal 013240 -- code 3: test 2op register`
5752			`bwm 9`
5753			`000230 -- spl 0`
5754			`012204 -- L1: mov (r2)+,r4 ; load src`
5755			`012205 -- mov (r2)+,r5 ; load dst`
5756			`000000 -- halt ; ccmov set cc's`
5757			`000000 -- halt ; iut instr. under test`
5758			`011023 -- mov (r0),(r3)+ ; save psw`
5759			`010523 -- mov r5,(r3)+ ; save dst`
5760			`077107 -- sob r1,L1 (.-7)`
5761			`#13260`
5762			`000000 -- halt`
5763			`#-----`
5764			`wal 013270 -- code 4: test 2op memory`
5765			`bwm 9`
5766			`000230 -- spl 0`
5767			`012214 -- L1: mov (r2)+,(r4) ; load src`
5768			`012215 -- mov (r2)+,(r5) ; load dst`
5769			`000000 -- halt ; ccmov set cc's`
5770			`#13300`
5771			`000000 -- halt ; iut instr. under test`
5772			`011023 -- mov (r0),(r3)+ ; save psw`
5773			`011523 -- mov (r5),(r3)+ ; save dst`
5774			`077107 -- sob r1,L1 (.-7)`
5775			`000000 -- halt`
5776			`#----`
5777			`C Exec code 46 pass 1 (systematic result+cc test of 1+2op instructions; word)`
5778			`C Exec test 46.1wr: COM - reg`
5779			`#`
5780			`wal 036000 -- setup test vector: for com,inc,dec,neg,adc,sbc,tst`
5781			`bwm 5`
5782			`000000 -- com 000000`
5783			`000001 -- com 000001`
5784			`077777 -- com 077777`
5785			`100000 -- com 100000`
5786			`177777 -- com 177777`
5787			`wal 013204 -- setup test instructions:`
5788			`bwm 2`
5789			`000241 -- ccmov= clc`
5790			`005105 -- iut= com r5`
5791			`wr0 177776 -- r0=177776`
5792			`wr1 000005 -- r1=5`
5793			`wr2 036000 -- r2=36000`
5794			`wr3 037000 -- r3=37000`
5795			`wr4 000000 -- r4=0`
5796			`wr5 000000 -- r5=0`
5797			`wsp 001400 -- sp=1400`
5798			`stapc 013200 -- start @ 13200 (1op reg)`
5799			`wtgo`
5800			`rpc d=013220 -- ! pc=halt`
5801			`rr1 d=000000 -- ! r1=0`
5802			`wal 037000 -- check result area`
5803			`brm 10`
5804			`d=000011 -- ! com 000000 -> n1z0v0c1; 177777`
5805			`d=177777 -- !`
5806			`d=000011 -- ! com 000001 -> n1z0v0c1; 177776`
5807			`d=177776 -- !`
5808			`d=000011 -- ! com 077777 -> n1z0v0c1; 100000`
5809			`d=100000 -- !`
5810			`d=000001 -- ! com 100000 -> n0z0v0c1; 077777`
5811			`d=077777 -- !`
5812			`d=000005 -- ! com 177777 -> n0z1v0c1; 000000`
5813			`d=000000 -- !`
5814			`#--------`
5815			`C Exec test 46.1wm: COM - mem`
5816			`#`
5817			`wal 013224 -- setup test instructions:`
5818			`bwm 2`
5819			`000241 -- ccmov= clc`
5820			`005115 -- iut= com (r5)`
5821			`wr0 177776 -- r0=177776`
5822			`wr1 000005 -- r1=5`
5823			`wr2 036000 -- r2=36000`
5824			`wr3 037000 -- r3=37000`
5825			`wr4 001400 -- r4=1400`
5826			`wr5 001402 -- r5=1402`
5827			`wsp 001400 -- sp=1400`
5828			`stapc 013220 -- start @ 13220 (1op mem)`
5829			`wtgo`
5830			`rpc d=013240 -- ! pc=halt`
5831			`rr1 d=000000 -- ! r1=0`
5832			`wal 037000 -- check result area`
5833			`brm 10`
5834			`d=000011 -- ! com 000000 -> n1z0v0c1; 177777`
5835			`d=177777 -- !`
5836			`d=000011 -- ! com 000001 -> n1z0v0c1; 177776`
5837			`d=177776 -- !`
5838			`d=000011 -- ! com 077777 -> n1z0v0c1; 100000`
5839			`d=100000 -- !`
5840			`d=000001 -- ! com 100000 -> n0z0v0c1; 077777`
5841			`d=077777 -- !`
5842			`d=000005 -- ! com 177777 -> n0z1v0c1; 000000`
5843			`d=000000 -- !`
5844			`#--------`
5845			`C Exec test 46.2wrc0: INC - reg,C=0`
5846			`#`
5847			`wal 013204 -- setup test instructions:`
5848			`bwm 2`
5849			`000241 -- ccmov= clc`
5850			`005205 -- iut= inc r5`
5851			`wr0 177776 -- r0=177776`
5852			`wr1 000005 -- r1=5`
5853			`wr2 036000 -- r2=36000`
5854			`wr3 037000 -- r3=37000`
5855			`wr4 000000 -- r4=0`
5856			`wr5 000000 -- r5=0`
5857			`wsp 001400 -- sp=1400`
5858			`stapc 013200 -- start @ 13200 (1op reg)`
5859			`wtgo`
5860			`rpc d=013220 -- ! pc=halt`
5861			`rr1 d=000000 -- ! r1=0`
5862			`wal 037000 -- check result area`
5863			`brm 10`
5864			`d=000000 -- ! inc 000000 -> n0z0v0c0; 000001`
5865			`d=000001 -- !`
5866			`d=000000 -- ! inc 000001 -> n0z0v0c0; 000002`
5867			`d=000002 -- !`
5868			`d=000012 -- ! inc 077777 -> n1z0v1c0; 100000`
5869			`d=100000 -- !`
5870			`d=000010 -- ! inc 100000 -> n1z0v0c0; 100001`
5871			`d=100001 -- !`
5872			`d=000004 -- ! inc 177777 -> n0z1v0c0; 000000`
5873			`d=000000 -- !`
5874			`#--------`
5875			`C Exec test 46.2wrc1: INC - reg,C=1`
5876			`#`
5877			`wal 013204 -- setup test instructions:`
5878			`bwm 2`
5879			`000261 -- ccmov= sec`
5880			`005205 -- iut= inc r5`
5881			`wr0 177776 -- r0=177776`
5882			`wr1 000005 -- r1=5`
5883			`wr2 036000 -- r2=36000`
5884			`wr3 037000 -- r3=37000`
5885			`wr4 000000 -- r4=0`
5886			`wr5 000000 -- r5=0`
5887			`wsp 001400 -- sp=1400`
5888			`stapc 013200 -- start @ 13200 (1op reg)`
5889			`wtgo`
5890			`rpc d=013220 -- ! pc=halt`
5891			`rr1 d=000000 -- ! r1=0`
5892			`wal 037000 -- check result area`
5893			`brm 10`
5894			`d=000001 -- ! inc 000000 -> n0z0v0c1; 000001`
5895			`d=000001 -- !`
5896			`d=000001 -- ! inc 000001 -> n0z0v0c1; 000002`
5897			`d=000002 -- !`
5898			`d=000013 -- ! inc 077777 -> n1z0v1c1; 100000`
5899			`d=100000 -- !`
5900			`d=000011 -- ! inc 100000 -> n1z0v0c1; 100001`
5901			`d=100001 -- !`
5902			`d=000005 -- ! inc 177777 -> n0z1v0c1; 000000`
5903			`d=000000 -- !`
5904			`#--------`
5905			`C Exec test 46.3wrc0: DEC - reg,C=0`
5906			`#`
5907			`wal 013204 -- setup test instructions:`
5908			`bwm 2`
5909			`000241 -- ccmov= clc`
5910			`005305 -- iut= dec r5`
5911			`wr0 177776 -- r0=177776`
5912			`wr1 000005 -- r1=5`
5913			`wr2 036000 -- r2=36000`
5914			`wr3 037000 -- r3=37000`
5915			`wr4 000000 -- r4=0`
5916			`wr5 000000 -- r5=0`
5917			`wsp 001400 -- sp=1400`
5918			`stapc 013200 -- start @ 13200 (1op reg)`
5919			`wtgo`
5920			`rpc d=013220 -- ! pc=halt`
5921			`rr1 d=000000 -- ! r1=0`
5922			`wal 037000 -- check result area`
5923			`brm 10`
5924			`d=000010 -- ! dec 000000 -> n1z0v0c0; 177777`
5925			`d=177777 -- !`
5926			`d=000004 -- ! dec 000001 -> n0z1v0c0; 000000`
5927			`d=000000 -- !`
5928			`d=000000 -- ! dec 077777 -> n0z0v0c0; 077776`
5929			`d=077776 -- !`
5930			`d=000002 -- ! dec 100000 -> n0z0v1c0; 077777`
5931			`d=077777 -- !`
5932			`d=000010 -- ! dec 177777 -> n1z0v0c0; 177776`
5933			`d=177776 -- !`
5934			`#--------`
5935			`C Exec test 46.3wrc1: DEC - reg,C=1`
5936			`#`
5937			`wal 013204 -- setup test instructions:`
5938			`bwm 2`
5939			`000261 -- ccmov= sec`
5940			`005305 -- iut= dec r5`
5941			`wr0 177776 -- r0=177776`
5942			`wr1 000005 -- r1=5`
5943			`wr2 036000 -- r2=36000`
5944			`wr3 037000 -- r3=37000`
5945			`wr4 000000 -- r4=0`
5946			`wr5 000000 -- r5=0`
5947			`wsp 001400 -- sp=1400`
5948			`stapc 013200 -- start @ 13200 (1op reg)`
5949			`wtgo`
5950			`rpc d=013220 -- ! pc=halt`
5951			`rr1 d=000000 -- ! r1=0`
5952			`wal 037000 -- check result area`
5953			`brm 10`
5954			`d=000011 -- ! dec 000000 -> n1z0v0c1; 177777`
5955			`d=177777 -- !`
5956			`d=000005 -- ! dec 000001 -> n0z1v0c1; 000000`
5957			`d=000000 -- !`
5958			`d=000001 -- ! dec 077777 -> n0z0v0c1; 077776`
5959			`d=077776 -- !`
5960			`d=000003 -- ! dec 100000 -> n0z0v1c1; 077777`
5961			`d=077777 -- !`
5962			`d=000011 -- ! dec 177777 -> n1z0v0c1; 177776`
5963			`d=177776 -- !`
5964			`#--------`
5965			`C Exec test 46.4wr: NEG - reg`
5966			`#`
5967			`wal 013204 -- setup test instructions:`
5968			`bwm 2`
5969			`000241 -- ccmov= clc`
5970			`005405 -- iut= neg r5`
5971			`wr0 177776 -- r0=177776`
5972			`wr1 000005 -- r1=5`
5973			`wr2 036000 -- r2=36000`
5974			`wr3 037000 -- r3=37000`
5975			`wr4 000000 -- r4=0`
5976			`wr5 000000 -- r5=0`
5977			`wsp 001400 -- sp=1400`
5978			`stapc 013200 -- start @ 13200 (1op reg)`
5979			`wtgo`
5980			`rpc d=013220 -- ! pc=halt`
5981			`rr1 d=000000 -- ! r1=0`
5982			`wal 037000 -- check result area`
5983			`brm 10`
5984			`d=000004 -- ! neg 000000 -> n0z1v0c0; 000000`
5985			`d=000000 -- !`
5986			`d=000011 -- ! neg 000001 -> n1z0v0c1; 177777`
5987			`d=177777 -- !`
5988			`d=000011 -- ! neg 077777 -> n1z0v0c1; 100001`
5989			`d=100001 -- !`
5990			`d=000013 -- ! neg 100000 -> n1z0v1c1; 100000`
5991			`d=100000 -- !`
5992			`d=000001 -- ! neg 177777 -> n0z0v0c1; 000001`
5993			`d=000001 -- !`
5994			`#--------`
5995			`C Exec test 46.5wrc0: ADC - reg,C=0`
5996			`#`
5997			`wal 013204 -- setup test instructions:`
5998			`bwm 2`
5999			`000241 -- ccmov= clc`
6000			`005505 -- iut= adc r5`
6001			`wr0 177776 -- r0=177776`
6002			`wr1 000005 -- r1=5`
6003			`wr2 036000 -- r2=36000`
6004			`wr3 037000 -- r3=37000`
6005			`wr4 000000 -- r4=0`
6006			`wr5 000000 -- r5=0`
6007			`wsp 001400 -- sp=1400`
6008			`stapc 013200 -- start @ 13200 (1op reg)`
6009			`wtgo`
6010			`rpc d=013220 -- ! pc=halt`
6011			`rr1 d=000000 -- ! r1=0`
6012			`wal 037000 -- check result area`
6013			`brm 10`
6014			`d=000004 -- ! adc 000000 -> n0z1v0c0; 000000`
6015			`d=000000 -- !`
6016			`d=000000 -- ! adc 000001 -> n0z0v0c0; 000001`
6017			`d=000001 -- !`
6018			`d=000000 -- ! adc 077777 -> n0z0v0c0; 077777`
6019			`d=077777 -- !`
6020			`d=000010 -- ! adc 100000 -> n1z0v0c0; 100000`
6021			`d=100000 -- !`
6022			`d=000010 -- ! adc 177777 -> n1z0v0c0; 177777`
6023			`d=177777 -- !`
6024			`#--------`
6025			`C Exec test 46.5wrc1: ADC - reg,C=1`
6026			`#`
6027			`wal 013204 -- setup test instructions:`
6028			`bwm 2`
6029			`000261 -- ccmov= sec`
6030			`005505 -- iut= adc r5`
6031			`wr0 177776 -- r0=177776`
6032			`wr1 000005 -- r1=5`
6033			`wr2 036000 -- r2=36000`
6034			`wr3 037000 -- r3=37000`
6035			`wr4 000000 -- r4=0`
6036			`wr5 000000 -- r5=0`
6037			`wsp 001400 -- sp=1400`
6038			`stapc 013200 -- start @ 13200 (1op reg)`
6039			`wtgo`
6040			`rpc d=013220 -- ! pc=halt`
6041			`rr1 d=000000 -- ! r1=0`
6042			`wal 037000 -- check result area`
6043			`brm 10`
6044			`d=000000 -- ! adc 000000 -> n0z0v0c0; 000001`
6045			`d=000001 -- !`
6046			`d=000000 -- ! adc 000001 -> n0z0v0c0; 000002`
6047			`d=000002 -- !`
6048			`d=000012 -- ! adc 077777 -> n1z0v1c0; 100000`
6049			`d=100000 -- !`
6050			`d=000010 -- ! adc 100000 -> n1z0v0c0; 100001`
6051			`d=100001 -- !`
6052			`d=000005 -- ! adc 177777 -> n0z1v0c1; 000000`
6053			`d=000000 -- !`
6054			`#--------`
6055			`C Exec test 46.6wrc0: SBC - reg,C=0`
6056			`#`
6057			`wal 013204 -- setup test instructions:`
6058			`bwm 2`
6059			`000241 -- ccmov= clc`
6060			`005605 -- iut= sbc r5`
6061			`wr0 177776 -- r0=177776`
6062			`wr1 000005 -- r1=5`
6063			`wr2 036000 -- r2=36000`
6064			`wr3 037000 -- r3=37000`
6065			`wr4 000000 -- r4=0`
6066			`wr5 000000 -- r5=0`
6067			`wsp 001400 -- sp=1400`
6068			`stapc 013200 -- start @ 13200 (1op reg)`
6069			`wtgo`
6070			`rpc d=013220 -- ! pc=halt`
6071			`rr1 d=000000 -- ! r1=0`
6072			`wal 037000 -- check result area`
6073			`brm 10`
6074			`d=000004 -- ! sbc 000000 -> n0z1v0c0; 000000`
6075			`d=000000 -- !`
6076			`d=000000 -- ! sbc 000001 -> n0z0v0c0; 000001`
6077			`d=000001 -- !`
6078			`d=000000 -- ! sbc 077777 -> n0z0v0c0; 077777`
6079			`d=077777 -- !`
6080			`d=000010 -- ! sbc 100000 -> n1z0v0c0; 100000`
6081			`d=100000 -- !`
6082			`d=000010 -- ! sbc 177777 -> n1z0v0c0; 177777`
6083			`d=177777 -- !`
6084			`#--------`
6085			`C Exec test 46.6wrc1: SBC - reg,C=1`
6086			`#`
6087			`wal 013204 -- setup test instructions:`
6088			`bwm 2`
6089			`000261 -- ccmov= sec`
6090			`005605 -- iut= sbc r5`
6091			`wr0 177776 -- r0=177776`
6092			`wr1 000005 -- r1=5`
6093			`wr2 036000 -- r2=36000`
6094			`wr3 037000 -- r3=37000`
6095			`wr4 000000 -- r4=0`
6096			`wr5 000000 -- r5=0`
6097			`wsp 001400 -- sp=1400`
6098			`stapc 013200 -- start @ 13200 (1op reg)`
6099			`wtgo`
6100			`rpc d=013220 -- ! pc=halt`
6101			`rr1 d=000000 -- ! r1=0`
6102			`wal 037000 -- check result area`
6103			`brm 10`
6104			`d=000011 -- ! sbc 000000 -> n1z0v0c1; 177777`
6105			`d=177777 -- !`
6106			`d=000004 -- ! sbc 000001 -> n0z1v0c0; 000000`
6107			`d=000000 -- !`
6108			`d=000000 -- ! sbc 077777 -> n0z0v0c0; 077776`
6109			`d=077776 -- !`
6110			`d=000002 -- ! sbc 100000 -> n0z0v1c0; 077777`
6111			`d=077777 -- !`
6112			`d=000010 -- ! sbc 177777 -> n1z0v0c0; 177776`
6113			`d=177776 -- !`
6114			`#--------`
6115			`C Exec test 46.7wr: TST - reg`
6116			`#`
6117			`wal 013204 -- setup test instructions:`
6118			`bwm 2`
6119			`000261 -- ccmov= sec`
6120			`005705 -- iut= tst r5`
6121			`wr0 177776 -- r0=177776`
6122			`wr1 000005 -- r1=5`
6123			`wr2 036000 -- r2=36000`
6124			`wr3 037000 -- r3=37000`
6125			`wr4 000000 -- r4=0`
6126			`wr5 000000 -- r5=0`
6127			`wsp 001400 -- sp=1400`
6128			`stapc 013200 -- start @ 13200 (1op reg)`
6129			`wtgo`
6130			`rpc d=013220 -- ! pc=halt`
6131			`rr1 d=000000 -- ! r1=0`
6132			`wal 037000 -- check result area`
6133			`brm 10`
6134			`d=000004 -- ! tst 000000 -> n0z1v0c0;`
6135			`d=000000 -- !`
6136			`d=000000 -- ! tst 000001 -> n0z0v0c0;`
6137			`d=000001 -- !`
6138			`d=000000 -- ! tst 077777 -> n0z0v0c0;`
6139			`d=077777 -- !`
6140			`d=000010 -- ! tst 100000 -> n1z0v0c0;`
6141			`d=100000 -- !`
6142			`d=000010 -- ! tst 177777 -> n1z0v0c0;`
6143			`d=177777 -- !`
6144			`#--------`
6145			`C Exec test 46.7wm: TST - mem`
6146			`#`
6147			`wal 013224 -- setup test instructions:`
6148			`bwm 2`
6149			`000261 -- ccmov= sec`
6150			`005715 -- iut= tst (r5)`
6151			`wr0 177776 -- r0=177776`
6152			`wr1 000005 -- r1=5`
6153			`wr2 036000 -- r2=36000`
6154			`wr3 037000 -- r3=37000`
6155			`wr4 001400 -- r4=1400`
6156			`wr5 001402 -- r5=1402`
6157			`wsp 001400 -- sp=1400`
6158			`stapc 013220 -- start @ 13220 (1op mem)`
6159			`wtgo`
6160			`rpc d=013240 -- ! pc=halt`
6161			`rr1 d=000000 -- ! r1=0`
6162			`wal 037000 -- check result area`
6163			`brm 10`
6164			`d=000004 -- ! tst 000000 -> n0z1v0c0;`
6165			`d=000000 -- !`
6166			`d=000000 -- ! tst 000001 -> n0z0v0c0;`
6167			`d=000001 -- !`
6168			`d=000000 -- ! tst 077777 -> n0z0v0c0;`
6169			`d=077777 -- !`
6170			`d=000010 -- ! tst 100000 -> n1z0v0c0;`
6171			`d=100000 -- !`
6172			`d=000010 -- ! tst 177777 -> n1z0v0c0;`
6173			`d=177777 -- !`
6174			`#--------`
6175			`C Exec test 46.8wrc0: ROR - reg, C=0`
6176			`#`
6177			`wal 036000 -- setup test vector: for ror,rol,ars,asl`
6178			`bwm 7`
6179			`000000 -- ror 000000`
6180			`000001 -- ror 000001`
6181			`100000 -- ror 100000`
6182			`000100 -- ror 000100`
6183			`000101 -- ror 000101`
6184			`040100 -- ror 040100`
6185			`100100 -- ror 100100`
6186			`wal 013204 -- setup test instructions:`
6187			`bwm 2`
6188			`000241 -- ccmov= clc`
6189			`006005 -- iut= ror r5`
6190			`wr0 177776 -- r0=177776`
6191			`wr1 000007 -- r1=7`
6192			`wr2 036000 -- r2=36000`
6193			`wr3 037000 -- r3=37000`
6194			`wr4 000000 -- r4=0`
6195			`wr5 000000 -- r5=0`
6196			`wsp 001400 -- sp=1400`
6197			`stapc 013200 -- start @ 13200 (1op reg)`
6198			`wtgo`
6199			`rpc d=013220 -- ! pc=halt`
6200			`rr1 d=000000 -- ! r1=0`
6201			`wal 037000 -- check result area (Note: V = N xor C !)`
6202			`brm 14`
6203			`d=000004 -- ! ror 000000 -> n0z1v0c0; 000000`
6204			`d=000000 -- !`
6205			`d=000007 -- ! ror 000001 -> n0z1v1c1; 000000`
6206			`d=000000 -- !`
6207			`d=000000 -- ! ror 100000 -> n0z0v0c0; 040000`
6208			`d=040000 -- !`
6209			`d=000000 -- ! ror 000100 -> n0z0v0c0; 000040`
6210			`d=000040 -- !`
6211			`d=000003 -- ! ror 000101 -> n0z0v1c1; 000040`
6212			`d=000040 -- !`
6213			`d=000000 -- ! ror 040100 -> n0z0v0c0; 020040`
6214			`d=020040 -- !`
6215			`d=000000 -- ! ror 100100 -> n0z0v0c0; 040040`
6216			`d=040040 -- !`
6217			`#--------`
6218			`C Exec test 46.8wrc1: ROR - reg, C=1`
6219			`#`
6220			`wal 013204 -- setup test instructions:`
6221			`bwm 2`
6222			`000261 -- ccmov= sec`
6223			`006005 -- iut= ror r5`
6224			`wr0 177776 -- r0=177776`
6225			`wr1 000007 -- r1=7`
6226			`wr2 036000 -- r2=36000`
6227			`wr3 037000 -- r3=37000`
6228			`wr4 000000 -- r4=0`
6229			`wr5 000000 -- r5=0`
6230			`wsp 001400 -- sp=1400`
6231			`stapc 013200 -- start @ 13200 (1op reg)`
6232			`wtgo`
6233			`rpc d=013220 -- ! pc=halt`
6234			`rr1 d=000000 -- ! r1=0`
6235			`wal 037000 -- check result area (Note: V = N xor C !)`
6236			`brm 14`
6237			`d=000012 -- ! ror 000000 -> n1z0v1c0; 100000`
6238			`d=100000 -- !`
6239			`d=000011 -- ! ror 000001 -> n1z0v0c1; 100000`
6240			`d=100000 -- !`
6241			`d=000012 -- ! ror 100000 -> n1z0v1c0; 140000`
6242			`d=140000 -- !`
6243			`d=000012 -- ! ror 000100 -> n1z0v1c0; 100040`
6244			`d=100040 -- !`
6245			`d=000011 -- ! ror 000101 -> n1z0v0c1; 100040`
6246			`d=100040 -- !`
6247			`d=000012 -- ! ror 040100 -> n1z0v1c0; 120040`
6248			`d=120040 -- !`
6249			`d=000012 -- ! ror 100100 -> n1z0v1c0; 140040`
6250			`d=140040 -- !`
6251			`#--------`
6252			`C Exec test 46.9wrc0: ROL - reg, C=0`
6253			`#`
6254			`wal 013204 -- setup test instructions:`
6255			`bwm 2`
6256			`000241 -- ccmov= clc`
6257			`006105 -- iut= rol r5`
6258			`wr0 177776 -- r0=177776`
6259			`wr1 000007 -- r1=7`
6260			`wr2 036000 -- r2=36000`
6261			`wr3 037000 -- r3=37000`
6262			`wr4 000000 -- r4=0`
6263			`wr5 000000 -- r5=0`
6264			`wsp 001400 -- sp=1400`
6265			`stapc 013200 -- start @ 13200 (1op reg)`
6266			`wtgo`
6267			`rpc d=013220 -- ! pc=halt`
6268			`rr1 d=000000 -- ! r1=0`
6269			`wal 037000 -- check result area (Note: V = N xor C !)`
6270			`brm 14`
6271			`d=000004 -- ! rol 000000 -> n0z1v0c0; 000000`
6272			`d=000000 -- !`
6273			`d=000000 -- ! rol 000001 -> n0z0v0c0; 000002`
6274			`d=000002 -- !`
6275			`d=000007 -- ! rol 100000 -> n0z1v1c1; 000000`
6276			`d=000000 -- !`
6277			`d=000000 -- ! rol 000100 -> n0z0v0c0; 000200`
6278			`d=000200 -- !`
6279			`d=000000 -- ! rol 000101 -> n0z0v0c0; 000202`
6280			`d=000202 -- !`
6281			`d=000012 -- ! rol 040100 -> n1z0v1c0; 100200`
6282			`d=100200 -- !`
6283			`d=000003 -- ! rol 100100 -> n0z0v1c1; 000200`
6284			`d=000200 -- !`
6285			`#--------`
6286			`C Exec test 46.9wrc1: ROL - reg, C=1`
6287			`#`
6288			`wal 013204 -- setup test instructions:`
6289			`bwm 2`
6290			`000261 -- ccmov= sec`
6291			`006105 -- iut= rol r5`
6292			`wr0 177776 -- r0=177776`
6293			`wr1 000007 -- r1=7`
6294			`wr2 036000 -- r2=36000`
6295			`wr3 037000 -- r3=37000`
6296			`wr4 000000 -- r4=0`
6297			`wr5 000000 -- r5=0`
6298			`wsp 001400 -- sp=1400`
6299			`stapc 013200 -- start @ 13200 (1op reg)`
6300			`wtgo`
6301			`rpc d=013220 -- ! pc=halt`
6302			`rr1 d=000000 -- ! r1=0`
6303			`wal 037000 -- check result area (Note: V = N xor C !)`
6304			`brm 14`
6305			`d=000000 -- ! rol 000000 -> n0z0v0c0; 000001`
6306			`d=000001 -- !`
6307			`d=000000 -- ! rol 000001 -> n0z0v0c0; 000003`
6308			`d=000003 -- !`
6309			`d=000003 -- ! rol 100000 -> n0z0v1c1; 000001`
6310			`d=000001 -- !`
6311			`d=000000 -- ! rol 000100 -> n0z0v0c0; 000201`
6312			`d=000201 -- !`
6313			`d=000000 -- ! rol 000101 -> n0z0v0c0; 000203`
6314			`d=000203 -- !`
6315			`d=000012 -- ! rol 040100 -> n1z0v1c0; 100201`
6316			`d=100201 -- !`
6317			`d=000003 -- ! rol 100100 -> n0z0v1c1; 000201`
6318			`d=000201 -- !`
6319			`#--------`
6320			`C Exec test 46.10wrc0: ASR - reg, C=0`
6321			`#`
6322			`wal 013204 -- setup test instructions:`
6323			`bwm 2`
6324			`000241 -- ccmov= clc`
6325			`006205 -- iut= asr r5`
6326			`wr0 177776 -- r0=177776`
6327			`wr1 000007 -- r1=7`
6328			`wr2 036000 -- r2=36000`
6329			`wr3 037000 -- r3=37000`
6330			`wr4 000000 -- r4=0`
6331			`wr5 000000 -- r5=0`
6332			`wsp 001400 -- sp=1400`
6333			`stapc 013200 -- start @ 13200 (1op reg)`
6334			`wtgo`
6335			`rpc d=013220 -- ! pc=halt`
6336			`rr1 d=000000 -- ! r1=0`
6337			`wal 037000 -- check result area (Note: V = N xor C !)`
6338			`brm 14`
6339			`d=000004 -- ! asr 000000 -> n0z1v0c0; 000000`
6340			`d=000000 -- !`
6341			`d=000007 -- ! asr 000001 -> n0z1v1c1; 000000`
6342			`d=000000 -- !`
6343			`d=000012 -- ! asr 100000 -> n1z0v1c0; 140000`
6344			`d=140000 -- !`
6345			`d=000000 -- ! asr 000100 -> n0z0v0c0; 000040`
6346			`d=000040 -- !`
6347			`d=000003 -- ! asr 000101 -> n0z0v1c1; 000040`
6348			`d=000040 -- !`
6349			`d=000000 -- ! asr 040100 -> n0z0v0c0; 020040`
6350			`d=020040 -- !`
6351			`d=000012 -- ! asr 100100 -> n1z0v1c0; 140040`
6352			`d=140040 -- !`
6353			`#--------`
6354			`C Exec test 46.10wrc1: ASR - reg, C=1`
6355			`#`
6356			`wal 013204 -- setup test instructions:`
6357			`bwm 2`
6358			`000261 -- ccmov= sec`
6359			`006205 -- iut= asr r5`
6360			`wr0 177776 -- r0=177776`
6361			`wr1 000007 -- r1=7`
6362			`wr2 036000 -- r2=36000`
6363			`wr3 037000 -- r3=37000`
6364			`wr4 000000 -- r4=0`
6365			`wr5 000000 -- r5=0`
6366			`wsp 001400 -- sp=1400`
6367			`stapc 013200 -- start @ 13200 (1op reg)`
6368			`wtgo`
6369			`rpc d=013220 -- ! pc=halt`
6370			`rr1 d=000000 -- ! r1=0`
6371			`wal 037000 -- check result area (Note: V = N xor C !)`
6372			`brm 14`
6373			`d=000004 -- ! asr 000000 -> n0z1v0c0; 000000`
6374			`d=000000 -- !`
6375			`d=000007 -- ! asr 000001 -> n0z1v1c1; 000000`
6376			`d=000000 -- !`
6377			`d=000012 -- ! asr 100000 -> n1z0v1c0; 140000`
6378			`d=140000 -- !`
6379			`d=000000 -- ! asr 000100 -> n0z0v0c0; 000040`
6380			`d=000040 -- !`
6381			`d=000003 -- ! asr 000101 -> n0z0v1c1; 000040`
6382			`d=000040 -- !`
6383			`d=000000 -- ! asr 040100 -> n0z0v0c0; 020040`
6384			`d=020040 -- !`
6385			`d=000012 -- ! asr 100100 -> n1z0v1c0; 140040`
6386			`d=140040 -- !`
6387			`#--------`
6388			`C Exec test 46.11wrc0: ASL - reg, C=0`
6389			`#`
6390			`wal 013204 -- setup test instructions:`
6391			`bwm 2`
6392			`000241 -- ccmov= clc`
6393			`006305 -- iut= asl r5`
6394			`wr0 177776 -- r0=177776`
6395			`wr1 000007 -- r1=7`
6396			`wr2 036000 -- r2=36000`
6397			`wr3 037000 -- r3=37000`
6398			`wr4 000000 -- r4=0`
6399			`wr5 000000 -- r5=0`
6400			`wsp 001400 -- sp=1400`
6401			`stapc 013200 -- start @ 13200 (1op reg)`
6402			`wtgo`
6403			`rpc d=013220 -- ! pc=halt`
6404			`rr1 d=000000 -- ! r1=0`
6405			`wal 037000 -- check result area (Note: V = N xor C !)`
6406			`brm 14`
6407			`d=000004 -- ! asl 000000 -> n0z1v0c0; 000000`
6408			`d=000000 -- !`
6409			`d=000000 -- ! asl 000001 -> n0z0v0c0; 000002`
6410			`d=000002 -- !`
6411			`d=000007 -- ! asl 100000 -> n0z1v1c1; 000000`
6412			`d=000000 -- !`
6413			`d=000000 -- ! asl 000100 -> n0z0v0c0; 000200`
6414			`d=000200 -- !`
6415			`d=000000 -- ! asl 000101 -> n0z0v0c0; 000202`
6416			`d=000202 -- !`
6417			`d=000012 -- ! asl 040100 -> n1z0v1c0; 100200`
6418			`d=100200 -- !`
6419			`d=000003 -- ! asl 100100 -> n0z0v1c1; 000200`
6420			`d=000200 -- !`
6421			`#--------`
6422			`C Exec test 46.11wrc1: ASL - reg, C=1`
6423			`#`
6424			`wal 013204 -- setup test instructions:`
6425			`bwm 2`
6426			`000261 -- ccmov= sec`
6427			`006305 -- iut= asl r5`
6428			`wr0 177776 -- r0=177776`
6429			`wr1 000007 -- r1=7`
6430			`wr2 036000 -- r2=36000`
6431			`wr3 037000 -- r3=37000`
6432			`wr4 000000 -- r4=0`
6433			`wr5 000000 -- r5=0`
6434			`wsp 001400 -- sp=1400`
6435			`stapc 013200 -- start @ 13200 (1op reg)`
6436			`wtgo`
6437			`rpc d=013220 -- ! pc=halt`
6438			`rr1 d=000000 -- ! r1=0`
6439			`wal 037000 -- check result area (Note: V = N xor C !)`
6440			`brm 14`
6441			`d=000004 -- ! asl 000000 -> n0z1v0c0; 000000`
6442			`d=000000 -- !`
6443			`d=000000 -- ! asl 000001 -> n0z0v0c0; 000002`
6444			`d=000002 -- !`
6445			`d=000007 -- ! asl 100000 -> n0z1v1c1; 000000`
6446			`d=000000 -- !`
6447			`d=000000 -- ! asl 000100 -> n0z0v0c0; 000200`
6448			`d=000200 -- !`
6449			`d=000000 -- ! asl 000101 -> n0z0v0c0; 000202`
6450			`d=000202 -- !`
6451			`d=000012 -- ! asl 040100 -> n1z0v1c0; 100200`
6452			`d=100200 -- !`
6453			`d=000003 -- ! asl 100100 -> n0z0v1c1; 000200`
6454			`d=000200 -- !`
6455			`#--------`
6456			`C Exec test 46.12wrc0: MOV - reg, C=0`
6457			`#`
6458			`wal 036000 -- setup test vector: for mov`
6459			`bwm 6`
6460			`000000 -- mov 000000,000000`
6461			`000000 --`
6462			`000001 -- mov 000001,000000`
6463			`000000 --`
6464			`100000 -- mov 100000,000000`
6465			`000000 --`
6466			`wal 013246 -- setup test instructions:`
6467			`bwm 2`
6468			`000241 -- ccmov= clc`
6469			`010405 -- iut= mov r4,r5`
6470			`wr0 177776 -- r0=177776`
6471			`wr1 000003 -- r1=3`
6472			`wr2 036000 -- r2=36000`
6473			`wr3 037000 -- r3=37000`
6474			`wr4 000000 -- r4=0`
6475			`wr5 000000 -- r5=0`
6476			`wsp 001400 -- sp=1400`
6477			`stapc 013240 -- start @ 13240 (2op reg)`
6478			`wtgo`
6479			`rpc d=013262 -- ! pc=halt`
6480			`rr1 d=000000 -- ! r1=0`
6481			`wal 037000 -- check result area`
6482			`brm 6`
6483			`d=000004 -- ! mov 000000,000000 -> n0z1v0c0; 000000`
6484			`d=000000 -- !`
6485			`d=000000 -- ! mov 000001,000000 -> n0z0v0c0; 000001`
6486			`d=000001 -- !`
6487			`d=000010 -- ! mov 100000,000000 -> n1z0v0c0; 100000`
6488			`d=100000 -- !`
6489			`#--------`
6490			`C Exec test 46.12wrc1: MOV - reg, C=1`
6491			`#`
6492			`wal 013246 -- setup test instructions:`
6493			`bwm 2`
6494			`000261 -- ccmov= sec`
6495			`010405 -- iut= mov r4,r5`
6496			`wr0 177776 -- r0=177776`
6497			`wr1 000003 -- r1=3`
6498			`wr2 036000 -- r2=36000`
6499			`wr3 037000 -- r3=37000`
6500			`wr4 000000 -- r4=0`
6501			`wr5 000000 -- r5=0`
6502			`wsp 001400 -- sp=1400`
6503			`stapc 013240 -- start @ 13240 (2op reg)`
6504			`wtgo`
6505			`rpc d=013262 -- ! pc=halt`
6506			`rr1 d=000000 -- ! r1=0`
6507			`wal 037000 -- check result area`
6508			`brm 6`
6509			`d=000005 -- ! mov 000000,000000 -> n0z1v0c1; 000000`
6510			`d=000000 -- !`
6511			`d=000001 -- ! mov 000001,000000 -> n0z0v0c1; 000001`
6512			`d=000001 -- !`
6513			`d=000011 -- ! mov 100000,000000 -> n1z0v0c1; 100000`
6514			`d=100000 -- !`
6515			`#--------`
6516			`C Exec test 46.12mc0: MOV - mem, C=0`
6517			`#`
6518			`wal 013276 -- setup test instructions:`
6519			`bwm 2`
6520			`000241 -- ccmov= clc`
6521			`011415 -- iut= mov (r4),(r5)`
6522			`wr0 177776 -- r0=177776`
6523			`wr1 000003 -- r1=3`
6524			`wr2 036000 -- r2=36000`
6525			`wr3 037000 -- r3=37000`
6526			`wr4 001400 -- r4=1400`
6527			`wr5 001402 -- r5=1402`
6528			`wsp 001400 -- sp=1400`
6529			`stapc 013270 -- start @ 13270 (2op mem)`
6530			`wtgo`
6531			`rpc d=013312 -- ! pc=halt`
6532			`rr1 d=000000 -- ! r1=0`
6533			`wal 037000 -- check result area`
6534			`brm 6`
6535			`d=000004 -- ! mov 000000,000000 -> n0z1v0c0; 000000`
6536			`d=000000 -- !`
6537			`d=000000 -- ! mov 000001,000000 -> n0z0v0c0; 000001`
6538			`d=000001 -- !`
6539			`d=000010 -- ! mov 100000,000000 -> n1z0v0c0; 100000`
6540			`d=100000 -- !`
6541			`#--------`
6542			`C Exec test 46.13wrc0: BIT - reg, C=0`
6543			`#`
6544			`wal 036000 -- setup test vector: for bit,bic,bis,xor`
6545			`bwm 12`
6546			`000000 -- bit 000000,000000`
6547			`000000 --`
6548			`000011 -- bit 000011,000000`
6549			`000000 --`
6550			`000011 -- bit 000011,000110`
6551			`000110 --`
6552			`000011 -- bit 000011,001100`
6553			`001100 --`
6554			`110000 -- bit 110000,011000`
6555			`011000 --`
6556			`110000 -- bit 110000,110000`
6557			`110000 --`
6558			`wal 013246 -- setup test instructions:`
6559			`bwm 2`
6560			`000241 -- ccmov= clc`
6561			`030405 -- iut= bit r4,r5`
6562			`wr0 177776 -- r0=177776`
6563			`wr1 000006 -- r1=6`
6564			`wr2 036000 -- r2=36000`
6565			`wr3 037000 -- r3=37000`
6566			`wr4 000000 -- r4=0`
6567			`wr5 000000 -- r5=0`
6568			`wsp 001400 -- sp=1400`
6569			`stapc 013240 -- start @ 13240 (2op reg)`
6570			`wtgo`
6571			`rpc d=013262 -- ! pc=halt`
6572			`rr1 d=000000 -- ! r1=0`
6573			`wal 037000 -- check result area`
6574			`brm 12`
6575			`d=000004 -- ! bit 000000,000000 -> n0z1v0c0; (000000)`
6576			`d=000000 -- !`
6577			`d=000004 -- ! bit 000011,000000 -> n0z1v0c0; (000000)`
6578			`d=000000 -- !`
6579			`d=000000 -- ! bit 000011,000110 -> n0z0v0c0; (000010)`
6580			`d=000110 -- !`
6581			`d=000004 -- ! bit 000011,001100 -> n0z1v0c0; (000000)`
6582			`d=001100 -- !`
6583			`d=000000 -- ! bit 110000,011000 -> n0z0v0c0; (010000)`
6584			`d=011000 -- !`
6585			`d=000010 -- ! bit 110000,110000 -> n1z0v0c0; (100000)`
6586			`d=110000 -- !`
6587			`#--------`
6588			`C Exec test 46.13wrc1: BIT - reg, C=1`
6589			`#`
6590			`wal 013246 -- setup test instructions:`
6591			`bwm 2`
6592			`000261 -- ccmov= sec`
6593			`030405 -- iut= bit r4,r5`
6594			`wr0 177776 -- r0=177776`
6595			`wr1 000006 -- r1=6`
6596			`wr2 036000 -- r2=36000`
6597			`wr3 037000 -- r3=37000`
6598			`wr4 000000 -- r4=0`
6599			`wr5 000000 -- r5=0`
6600			`wsp 001400 -- sp=1400`
6601			`stapc 013240 -- start @ 13240 (2op reg)`
6602			`wtgo`
6603			`rpc d=013262 -- ! pc=halt`
6604			`rr1 d=000000 -- ! r1=0`
6605			`wal 037000 -- check result area`
6606			`brm 12`
6607			`d=000005 -- ! bit 000000,000000 -> n0z1v0c1; (000000)`
6608			`d=000000 -- !`
6609			`d=000005 -- ! bit 000011,000000 -> n0z1v0c1; (000000)`
6610			`d=000000 -- !`
6611			`d=000001 -- ! bit 000011,000110 -> n0z0v0c1; (000010)`
6612			`d=000110 -- !`
6613			`d=000005 -- ! bit 000011,001100 -> n0z1v0c1; (000000)`
6614			`d=001100 -- !`
6615			`d=000001 -- ! bit 110000,011000 -> n0z0v0c1; (010000)`
6616			`d=011000 -- !`
6617			`d=000011 -- ! bit 110000,110000 -> n1z0v0c1; (100000)`
6618			`d=110000 -- !`
6619			`#--------`
6620			`C Exec test 46.13wmc0: BIT - mem, C=0`
6621			`#`
6622			`wal 013276 -- setup test instructions:`
6623			`bwm 2`
6624			`000241 -- ccmov= clc`
6625			`031415 -- iut= bit (r4),(r5)`
6626			`wr0 177776 -- r0=177776`
6627			`wr1 000006 -- r1=6`
6628			`wr2 036000 -- r2=36000`
6629			`wr3 037000 -- r3=37000`
6630			`wr4 001400 -- r4=1400`
6631			`wr5 001402 -- r5=1402`
6632			`wsp 001400 -- sp=1400`
6633			`stapc 013270 -- start @ 13270 (2op mem)`
6634			`wtgo`
6635			`rpc d=013312 -- ! pc=halt`
6636			`rr1 d=000000 -- ! r1=0`
6637			`wal 037000 -- check result area`
6638			`brm 12`
6639			`d=000004 -- ! bit 000000,000000 -> n0z1v0c0; (000000)`
6640			`d=000000 -- !`
6641			`d=000004 -- ! bit 000011,000000 -> n0z1v0c0; (000000)`
6642			`d=000000 -- !`
6643			`d=000000 -- ! bit 000011,000110 -> n0z0v0c0; (000010)`
6644			`d=000110 -- !`
6645			`d=000004 -- ! bit 000011,001100 -> n0z1v0c0; (000000)`
6646			`d=001100 -- !`
6647			`d=000000 -- ! bit 110000,011000 -> n0z0v0c0; (010000)`
6648			`d=011000 -- !`
6649			`d=000010 -- ! bit 110000,110000 -> n1z0v0c0; (100000)`
6650			`d=110000 -- !`
6651			`#--------`
6652			`C Exec test 46.14wrc0: BIC - reg, C=0`
6653			`#`
6654			`wal 013246 -- setup test instructions:`
6655			`bwm 2`
6656			`000241 -- ccmov= clc`
6657			`040405 -- iut= bic r4,r5`
6658			`wr0 177776 -- r0=177776`
6659			`wr1 000006 -- r1=6`
6660			`wr2 036000 -- r2=36000`
6661			`wr3 037000 -- r3=37000`
6662			`wr4 000000 -- r4=0`
6663			`wr5 000000 -- r5=0`
6664			`wsp 001400 -- sp=1400`
6665			`stapc 013240 -- start @ 13240 (2op reg)`
6666			`wtgo`
6667			`rpc d=013262 -- ! pc=halt`
6668			`rr1 d=000000 -- ! r1=0`
6669			`wal 037000 -- check result area`
6670			`brm 12`
6671			`d=000004 -- ! bic 000000,000000 -> n0z1v0c0; 000000`
6672			`d=000000 -- !`
6673			`d=000004 -- ! bic 000011,000000 -> n0z1v0c0; 000000`
6674			`d=000000 -- !`
6675			`d=000000 -- ! bic 000011,000110 -> n0z0v0c0; 000100`
6676			`d=000100 -- !`
6677			`d=000000 -- ! bic 000011,001100 -> n0z0v0c0; 001100`
6678			`d=001100 -- !`
6679			`d=000000 -- ! bic 110000,011000 -> n0z0v0c0; 001000`
6680			`d=001000 -- !`
6681			`d=000004 -- ! bic 110000,110000 -> n0z1v0c0; 000000`
6682			`d=000000 -- !`
6683			`#--------`
6684			`C Exec test 46.14wrc1: BIC - reg, C=1`
6685			`#`
6686			`wal 013246 -- setup test instructions:`
6687			`bwm 2`
6688			`000261 -- ccmov= sec`
6689			`040405 -- iut= bic r4,r5`
6690			`wr0 177776 -- r0=177776`
6691			`wr1 000006 -- r1=6`
6692			`wr2 036000 -- r2=36000`
6693			`wr3 037000 -- r3=37000`
6694			`wr4 000000 -- r4=0`
6695			`wr5 000000 -- r5=0`
6696			`wsp 001400 -- sp=1400`
6697			`stapc 013240 -- start @ 13240 (2op reg)`
6698			`wtgo`
6699			`rpc d=013262 -- ! pc=halt`
6700			`rr1 d=000000 -- ! r1=0`
6701			`wal 037000 -- check result area`
6702			`brm 12`
6703			`d=000005 -- ! bic 000000,000000 -> n0z1v0c1; 000000`
6704			`d=000000 -- !`
6705			`d=000005 -- ! bic 000011,000000 -> n0z1v0c1; 000000`
6706			`d=000000 -- !`
6707			`d=000001 -- ! bic 000011,000110 -> n0z0v0c1; 000100`
6708			`d=000100 -- !`
6709			`d=000001 -- ! bic 000011,001100 -> n0z0v0c1; 001100`
6710			`d=001100 -- !`
6711			`d=000001 -- ! bic 110000,011000 -> n0z0v0c1; 001000`
6712			`d=001000 -- !`
6713			`d=000005 -- ! bic 110000,110000 -> n0z1v0c1; 000000`
6714			`d=000000 -- !`
6715			`#--------`
6716			`C Exec test 46.14wrc0: BIC - mem, C=0`
6717			`#`
6718			`wal 013276 -- setup test instructions:`
6719			`bwm 2`
6720			`000241 -- ccmov= clc`
6721			`041415 -- iut= bic (r4),(r5)`
6722			`wr0 177776 -- r0=177776`
6723			`wr1 000006 -- r1=6`
6724			`wr2 036000 -- r2=36000`
6725			`wr3 037000 -- r3=37000`
6726			`wr4 001400 -- r4=1400`
6727			`wr5 001402 -- r5=1402`
6728			`wsp 001400 -- sp=1400`
6729			`stapc 013270 -- start @ 13270 (2op mem)`
6730			`wtgo`
6731			`rpc d=013312 -- ! pc=halt`
6732			`rr1 d=000000 -- ! r1=0`
6733			`wal 037000 -- check result area`
6734			`brm 12`
6735			`d=000004 -- ! bic 000000,000000 -> n0z1v0c0; 000000`
6736			`d=000000 -- !`
6737			`d=000004 -- ! bic 000011,000000 -> n0z1v0c0; 000000`
6738			`d=000000 -- !`
6739			`d=000000 -- ! bic 000011,000110 -> n0z0v0c0; 000100`
6740			`d=000100 -- !`
6741			`d=000000 -- ! bic 000011,001100 -> n0z0v0c0; 001100`
6742			`d=001100 -- !`
6743			`d=000000 -- ! bic 110000,011000 -> n0z0v0c0; 001000`
6744			`d=001000 -- !`
6745			`d=000004 -- ! bic 110000,110000 -> n0z1v0c0; 000000`
6746			`d=000000 -- !`
6747			`#--------`
6748			`C Exec test 46.15wrc0: BIS - reg, C=0`
6749			`#`
6750			`wal 013246 -- setup test instructions:`
6751			`bwm 2`
6752			`000241 -- ccmov= clc`
6753			`050405 -- iut= bis r4,r5`
6754			`wr0 177776 -- r0=177776`
6755			`wr1 000006 -- r1=6`
6756			`wr2 036000 -- r2=36000`
6757			`wr3 037000 -- r3=37000`
6758			`wr4 000000 -- r4=0`
6759			`wr5 000000 -- r5=0`
6760			`wsp 001400 -- sp=1400`
6761			`stapc 013240 -- start @ 13240 (2op reg)`
6762			`wtgo`
6763			`rpc d=013262 -- ! pc=halt`
6764			`rr1 d=000000 -- ! r1=0`
6765			`wal 037000 -- check result area`
6766			`brm 12`
6767			`d=000004 -- ! bis 000000,000000 -> n0z1v0c0; 000000`
6768			`d=000000 -- !`
6769			`d=000000 -- ! bis 000011,000000 -> n0z0v0c0; 000011`
6770			`d=000011 -- !`
6771			`d=000000 -- ! bis 000011,000110 -> n0z0v0c0; 000111`
6772			`d=000111 -- !`
6773			`d=000000 -- ! bis 000011,001100 -> n0z0v0c0; 001111`
6774			`d=001111 -- !`
6775			`d=000010 -- ! bis 110000,011000 -> n1z0v0c0; 111000`
6776			`d=111000 -- !`
6777			`d=000010 -- ! bis 110000,110000 -> n1z0v0c0; 110000`
6778			`d=110000 -- !`
6779			`#--------`
6780			`C Exec test 46.15wrc1: BIS - reg, C=1`
6781			`#`
6782			`wal 013246 -- setup test instructions:`
6783			`bwm 2`
6784			`000261 -- ccmov= sec`
6785			`050405 -- iut= bis r4,r5`
6786			`wr0 177776 -- r0=177776`
6787			`wr1 000006 -- r1=6`
6788			`wr2 036000 -- r2=36000`
6789			`wr3 037000 -- r3=37000`
6790			`wr4 000000 -- r4=0`
6791			`wr5 000000 -- r5=0`
6792			`wsp 001400 -- sp=1400`
6793			`stapc 013240 -- start @ 13240 (2op reg)`
6794			`wtgo`
6795			`rpc d=013262 -- ! pc=halt`
6796			`rr1 d=000000 -- ! r1=0`
6797			`wal 037000 -- check result area`
6798			`brm 12`
6799			`d=000005 -- ! bis 000000,000000 -> n0z1v0c1; 000000`
6800			`d=000000 -- !`
6801			`d=000001 -- ! bis 000011,000000 -> n0z0v0c1; 000011`
6802			`d=000011 -- !`
6803			`d=000001 -- ! bis 000011,000110 -> n0z0v0c1; 000111`
6804			`d=000111 -- !`
6805			`d=000001 -- ! bis 000011,001100 -> n0z0v0c1; 001111`
6806			`d=001111 -- !`
6807			`d=000011 -- ! bis 110000,011000 -> n1z0v0c1; 111000`
6808			`d=111000 -- !`
6809			`d=000011 -- ! bis 110000,110000 -> n1z0v0c1; 110000`
6810			`d=110000 -- !`
6811			`#--------`
6812			`C Exec test 46.16wrc0: XOR - reg, C=0`
6813			`#`
6814			`wal 013246 -- setup test instructions:`
6815			`bwm 2`
6816			`000241 -- ccmov= clc`
6817			`074405 -- iut= xor r4,r5`
6818			`wr0 177776 -- r0=177776`
6819			`wr1 000006 -- r1=6`
6820			`wr2 036000 -- r2=36000`
6821			`wr3 037000 -- r3=37000`
6822			`wr4 000000 -- r4=0`
6823			`wr5 000000 -- r5=0`
6824			`wsp 001400 -- sp=1400`
6825			`stapc 013240 -- start @ 13240 (2op reg)`
6826			`wtgo`
6827			`rpc d=013262 -- ! pc=halt`
6828			`rr1 d=000000 -- ! r1=0`
6829			`wal 037000 -- check result area`
6830			`brm 12`
6831			`d=000004 -- ! xor 000000,000000 -> n0z1v0c0; 000000`
6832			`d=000000 -- !`
6833			`d=000000 -- ! xor 000011,000000 -> n0z0v0c0; 000011`
6834			`d=000011 -- !`
6835			`d=000000 -- ! xor 000011,000110 -> n0z0v0c0; 000101`
6836			`d=000101 -- !`
6837			`d=000000 -- ! xor 000011,001100 -> n0z0v0c0; 001111`
6838			`d=001111 -- !`
6839			`d=000010 -- ! xor 110000,011000 -> n1z0v0c0; 101000`
6840			`d=101000 -- !`
6841			`d=000004 -- ! xor 110000,110000 -> n1z0v0c0; 000000`
6842			`d=000000 -- !`
6843			`#--------`
6844			`C Exec test 46.16wrc1: XOR - reg, C=1`
6845			`#`
6846			`wal 013246 -- setup test instructions:`
6847			`bwm 2`
6848			`000261 -- ccmov= sec`
6849			`074405 -- iut= xor r4,r5`
6850			`wr0 177776 -- r0=177776`
6851			`wr1 000006 -- r1=6`
6852			`wr2 036000 -- r2=36000`
6853			`wr3 037000 -- r3=37000`
6854			`wr4 000000 -- r4=0`
6855			`wr5 000000 -- r5=0`
6856			`wsp 001400 -- sp=1400`
6857			`stapc 013240 -- start @ 13240 (2op reg)`
6858			`wtgo`
6859			`rpc d=013262 -- ! pc=halt`
6860			`rr1 d=000000 -- ! r1=0`
6861			`wal 037000 -- check result area`
6862			`brm 12`
6863			`d=000005 -- ! xor 000000,000000 -> n0z1v0c1; 000000`
6864			`d=000000 -- !`
6865			`d=000001 -- ! xor 000011,000000 -> n0z0v0c1; 000011`
6866			`d=000011 -- !`
6867			`d=000001 -- ! xor 000011,000110 -> n0z0v0c1; 000101`
6868			`d=000101 -- !`
6869			`d=000001 -- ! xor 000011,001100 -> n0z0v0c1; 001111`
6870			`d=001111 -- !`
6871			`d=000011 -- ! xor 110000,011000 -> n1z0v0c1; 101000`
6872			`d=101000 -- !`
6873			`d=000005 -- ! xor 110000,110000 -> n1z0v0c1; 000000`
6874			`d=000000 -- !`
6875			`#--------`
6876			`C Exec test 46.17wr: CMP - reg`
6877			`#`
6878			`wal 036000 -- setup test vector: for cmp,add,sub`
6879			`bwm 38`
6880			`000000 -- cmp 000000,000000`
6881			`000000 --`
6882			`000001 -- cmp 000001,000000`
6883			`000000 --`
6884			`177777 -- cmp 177777,000000`
6885			`000000 --`
6886			`000000 -- cmp 000000,000001`
6887			`000001 --`
6888			`000001 -- cmp 000001,000001`
6889			`000001 --`
6890			`177777 -- cmp 177777,000001`
6891			`000001 --`
6892			`077776 -- cmp 077776,077777`
6893			`077777 --`
6894			`077777 -- cmp 077777,077777`
6895			`077777 --`
6896			`100000 -- cmp 100000,077777`
6897			`077777 --`
6898			`000001 -- cmp 000001,077777`
6899			`077777 --`
6900			`177777 -- cmp 177777,077777`
6901			`077777 --`
6902			`077777 -- cmp 077777,100000`
6903			`100000 --`
6904			`100000 -- cmp 100000,100000`
6905			`100000 --`
6906			`100001 -- cmp 100001,100000`
6907			`100000 --`
6908			`000001 -- cmp 000001,100000`
6909			`100000 --`
6910			`177777 -- cmp 177777,100000`
6911			`100000 --`
6912			`000000 -- cmp 000000,177777`
6913			`177777 --`
6914			`000001 -- cmp 000001,177777`
6915			`177777 --`
6916			`177777 -- cmp 177777,177777`
6917			`177777 --`
6918			`wal 013246 -- setup test instructions:`
6919			`bwm 2`
6920			`000241 -- ccmov= clc`
6921			`020405 -- iut= cmp r4,r5`
6922			`wr0 177776 -- r0=177776`
6923			`wr1 000023 -- r1=23 (19.)`
6924			`wr2 036000 -- r2=36000`
6925			`wr3 037000 -- r3=37000`
6926			`wr4 000000 -- r4=0`
6927			`wr5 000000 -- r5=0`
6928			`wsp 001400 -- sp=1400`
6929			`stapc 013240 -- start @ 13240 (2op reg)`
6930			`wtgo`
6931			`rpc d=013262 -- ! pc=halt`
6932			`rr1 d=000000 -- ! r1=0 (Note: C=1 if dst > src unsigned)`
6933			`wal 037000 -- check result area (Note: V=1 if s xor d and r eq d)`
6934			`brm 38`
6935			`d=000004 -- ! cmp 000000,000000 -> n0z1v0c0; (000000)`
6936			`d=000000 -- !`
6937			`d=000000 -- ! cmp 000001,000000 -> n0z0v0c0; (000001)`
6938			`d=000000 -- !`
6939			`d=000010 -- ! cmp 177777,000000 -> n1z0v0c0; (177777)`
6940			`d=000000 -- !`
6941			`d=000011 -- ! cmp 000000,000001 -> n1z0v0c1; (177777+C)`
6942			`d=000001 -- !`
6943			`d=000004 -- ! cmp 000001,000001 -> n0z1v0c0; (000000)`
6944			`d=000001 -- !`
6945			`d=000010 -- ! cmp 177777,000001 -> n1z0v0c0; (177776)`
6946			`d=000001 -- !`
6947			`d=000011 -- ! cmp 077776,077777 -> n1z0v0c1; (177777+C)`
6948			`d=077777 -- !`
6949			`d=000004 -- ! cmp 077777,077777 -> n0z1v0c0; (000000)`
6950			`d=077777 -- !`
6951			`d=000002 -- ! cmp 100000,077777 -> n0z0v1c0; (000001)`
6952			`d=077777 -- !`
6953			`d=000011 -- ! cmp 000001,077777 -> n1z0v0c1; (100002+C)`
6954			`d=077777 -- !`
6955			`d=000010 -- ! cmp 177777,077777 -> n1z0v0c0; (100000)`
6956			`d=077777 -- !`
6957			`d=000013 -- ! cmp 077777,100000 -> n1z0v1c1; (177777+C)`
6958			`d=100000 -- !`
6959			`d=000004 -- ! cmp 100000,100000 -> n0z1v0c0; (000000)`
6960			`d=100000 -- !`
6961			`d=000000 -- ! cmp 100001,100000 -> n0z0v0c0; (000001)`
6962			`d=100000 -- !`
6963			`d=000013 -- ! cmp 000001,100000 -> n1z0v1c1; (100001+C)`
6964			`d=100000 -- !`
6965			`d=000000 -- ! cmp 177777,100000 -> n0z0v0c0; (077777)`
6966			`d=100000 -- !`
6967			`d=000001 -- ! cmp 000000,177777 -> n0z0v0c1; (000001+C)`
6968			`d=177777 -- !`
6969			`d=000001 -- ! cmp 000001,177777 -> n0z0v0c1; (000002+C)`
6970			`d=177777 -- !`
6971			`d=000004 -- ! cmp 177777,177777 -> n0z1v0c0; (000000)`
6972			`d=177777 -- !`
6973			`#--------`
6974			`C Exec test 46.18r: ADD - reg`
6975			`#`
6976			`wal 013246 -- setup test instructions:`
6977			`bwm 2`
6978			`000241 -- ccmov= clc`
6979			`060405 -- iut= add r4,r5`
6980			`wr0 177776 -- r0=177776`
6981			`wr1 000023 -- r1=23 (19.)`
6982			`wr2 036000 -- r2=36000`
6983			`wr3 037000 -- r3=37000`
6984			`wr4 000000 -- r4=0`
6985			`wr5 000000 -- r5=0`
6986			`wsp 001400 -- sp=1400`
6987			`stapc 013240 -- start @ 13240 (2op reg)`
6988			`wtgo`
6989			`rpc d=013262 -- ! pc=halt`
6990			`rr1 d=000000 -- ! r1=0`
6991			`wal 037000 -- check result area (Note: V=1 if s eq d and r neq d)`
6992			`brm 38`
6993			`d=000004 -- ! add 000000,000000 -> n0z1v0c0; 000000`
6994			`d=000000 -- !`
6995			`d=000000 -- ! add 000001,000000 -> n0z0v0c0; 000001`
6996			`d=000001 -- !`
6997			`d=000010 -- ! add 177777,000000 -> n1z0v0c0; 177777`
6998			`d=177777 -- !`
6999			`d=000000 -- ! add 000000,000001 -> n0z0v0c0; 000001`
7000			`d=000001 -- !`
7001			`d=000000 -- ! add 000001,000001 -> n0z0v0c0; 000002`
7002			`d=000002 -- !`
7003			`d=000005 -- ! add 177777,000001 -> n0z1v0c1; 000000+C`
7004			`d=000000 -- !`
7005			`d=000012 -- ! add 077776,077777 -> n1z0v1c0; 177775`
7006			`d=177775 -- !`
7007			`d=000012 -- ! add 077777,077777 -> n1z0v1c0; 177776`
7008			`d=177776 -- !`
7009			`d=000010 -- ! add 100000,077777 -> n1z0v0c0; 177777`
7010			`d=177777 -- !`
7011			`d=000012 -- ! add 000001,077777 -> n1z0v1c0; 100000`
7012			`d=100000 -- !`
7013			`d=000001 -- ! add 177777,077777 -> n0z0v0c1; 077776+C`
7014			`d=077776 -- !`
7015			`d=000010 -- ! add 077777,100000 -> n1z0v0c1; 177777+C`
7016			`d=177777 -- !`
7017			`d=000007 -- ! add 100000,100000 -> n0z1v1c1; 000000+C`
7018			`d=000000 -- !`
7019			`d=000003 -- ! add 100001,100000 -> n0z0v1c1; 000001+C`
7020			`d=000001 -- !`
7021			`d=000010 -- ! add 000001,100000 -> n1z0v0c0; 100001`
7022			`d=100001 -- !`
7023			`d=000003 -- ! add 177777,100000 -> n0z0v1c1; 077777+C`
7024			`d=077777 -- !`
7025			`d=000010 -- ! add 000000,177777 -> n1z0v0c0; 177777`
7026			`d=177777 -- !`
7027			`d=000005 -- ! add 000001,177777 -> n0z1v0c1; 000000+C`
7028			`d=000000 -- !`
7029			`d=000011 -- ! add 177777,177777 -> n1z0v0c1; 177776+C`
7030			`d=177776 -- !`
7031			`#--------`
7032			`C Exec test 46.19r: SUB - reg`
7033			`#`
7034			`wal 013246 -- setup test instructions:`
7035			`bwm 2`
7036			`000241 -- ccmov= clc`
7037			`160405 -- iut= sub r4,r5`
7038			`wr0 177776 -- r0=177776`
7039			`wr1 000023 -- r1=23 (19.)`
7040			`wr2 036000 -- r2=36000`
7041			`wr3 037000 -- r3=37000`
7042			`wr4 000000 -- r4=0`
7043			`wr5 000000 -- r5=0`
7044			`wsp 001400 -- sp=1400`
7045			`stapc 013240 -- start @ 13240 (2op reg)`
7046			`wtgo`
7047			`rpc d=013262 -- ! pc=halt`
7048			`rr1 d=000000 -- ! r1=0 (Note: C=1 if src > dst unsigned)`
7049			`wal 037000 -- check result area (Note: V=1 if s xor d and r eq s)`
7050			`brm 38`
7051			`d=000004 -- ! sub 000000,000000 -> n0z1v0c0; 000000`
7052			`d=000000 -- !`
7053			`d=000011 -- ! sub 000001,000000 -> n1z0v0c1; 177777+C`
7054			`d=177777 -- !`
7055			`d=000001 -- ! sub 177777,000000 -> n0z0v0c1; 000001+C`
7056			`d=000001 -- !`
7057			`d=000000 -- ! sub 000000,000001 -> n0z0v0c0; 000001`
7058			`d=000001 -- !`
7059			`d=000004 -- ! sub 000001,000001 -> n0z1v0c0; 000000`
7060			`d=000000 -- !`
7061			`d=000001 -- ! sub 177777,000001 -> n0z0v0c1; 000002+C`
7062			`d=000002 -- !`
7063			`d=000000 -- ! sub 077776,077777 -> n0z0v0c0; 000001`
7064			`d=000001 -- !`
7065			`d=000004 -- ! sub 077777,077777 -> n0z1v0c0; 000000`
7066			`d=000000 -- !`
7067			`d=000013 -- ! sub 100000,077777 -> n1z0v1c1; 177777+C`
7068			`d=177777 -- !`
7069			`d=000000 -- ! sub 000001,077777 -> n0z0v0c0; 077776`
7070			`d=077776 -- !`
7071			`d=000013 -- ! sub 177777,077777 -> n1z0v1c1; 100000+C`
7072			`d=100000 -- !`
7073			`d=000002 -- ! sub 077777,100000 -> n0z0v1c0; 000001`
7074			`d=000001 -- !`
7075			`d=000004 -- ! sub 100000,100000 -> n0z1v0c0; 000000`
7076			`d=000000 -- !`
7077			`d=000011 -- ! sub 100001,100000 -> n1z0v0c1; 177777+C`
7078			`d=177777 -- !`
7079			`d=000002 -- ! sub 000001,100000 -> n0z0v1c0; 077777`
7080			`d=077777 -- !`
7081			`d=000011 -- ! sub 177777,100000 -> n1z0v0c1: 100001+C`
7082			`d=100001 -- !`
7083			`d=000010 -- ! sub 000000,177777 -> n1z0v0c0; 177777`
7084			`d=177777 -- !`
7085			`d=000010 -- ! sub 000001,177777 -> n1z0v0c0; 177776`
7086			`d=177776 -- !`
7087			`d=000004 -- ! sub 177777,177777 -> n0z1v0c0; 000000`
7088			`d=000000 -- !`
7089			`#`
7090			`C Exec test 46.20r: SWAP - reg`
7091			`#`
7092			`wal 036000 -- setup test vector: for swap`
7093			`bwm 9`
7094			`000000 -- swap 000000`
7095			`000001 -- swap 000001`
7096			`000200 -- swap 000200`
7097			`000400 -- swap 000400`
7098			`100000 -- swap 100000`
7099			`000401 -- swap 000401`
7100			`000600 -- swap 000600`
7101			`100001 -- swap 100001`
7102			`100200 -- swap 100200`
7103			`wal 013204 -- setup test instructions:`
7104			`bwm 2`
7105			`000241 -- ccmov= clc`
7106			`000305 -- iut= swap r5`
7107			`wr0 177776 -- r0=177776`
7108			`wr1 000011 -- r1=11 (9.)`
7109			`wr2 036000 -- r2=36000`
7110			`wr3 037000 -- r3=37000`
7111			`wr4 000000 -- r4=0`
7112			`wr5 000000 -- r5=0`
7113			`wsp 001400 -- sp=1400`
7114			`stapc 013200 -- start @ 13200 (1op reg)`
7115			`wtgo`
7116			`rpc d=013220 -- ! pc=halt`
7117			`rr1 d=000000 -- ! r1=0`
7118			`wal 037000 -- check result area (Note: N,Z from lsb of result)`
7119			`brm 18`
7120			`d=000004 -- ! swap 000000 -> n0z1v0c0; 000000`
7121			`d=000000 -- !`
7122			`d=000004 -- ! swap 000001 -> n0z1v0c0; 000400`
7123			`d=000400 -- !`
7124			`d=000004 -- ! swap 000200 -> n0z1v0c0; 100000`
7125			`d=100000 -- !`
7126			`d=000000 -- ! swap 000400 -> n0z0v0c0; 000001`
7127			`d=000001 -- !`
7128			`d=000010 -- ! swap 100000 -> n1z0v0c0; 000200`
7129			`d=000200 -- !`
7130			`d=000000 -- ! swap 000401 -> n0z0v0c0; 000401`
7131			`d=000401 -- !`
7132			`d=000000 -- ! swap 000600 -> n0z0v0c0; 100001`
7133			`d=100001 -- !`
7134			`d=000010 -- ! swap 100001 -> n1z0v0c0; 000600`
7135			`d=000600 -- !`
7136			`d=000010 -- ! swap 100200 -> n1z0v0c0; 100200`
7137			`d=100200 -- !`
7138			`#--------`
7139			`C Exec code 46 pass 2 (systematic result+cc test of 1+2op instructions; byte)`
7140			`C Exec test 46.1br: COMB - reg`
7141			`#`
7142			`wal 036000 -- setup test vector: for com,inc,dec,neg,adc,sbc,tst (b)`
7143			`bwm 5`
7144			`000000 -- comb 000000`
7145			`000001 -- comb 000001`
7146			`000177 -- comb 000177`
7147			`000200 -- comb 000200`
7148			`000377 -- comb 000377`
7149			`wal 013204 -- setup test instructions:`
7150			`bwm 2`
7151			`000241 -- ccmov= clc`
7152			`105105 -- iut= comb r5`
7153			`wr0 177776 -- r0=177776`
7154			`wr1 000005 -- r1=5`
7155			`wr2 036000 -- r2=36000`
7156			`wr3 037000 -- r3=37000`
7157			`wr4 000000 -- r4=0`
7158			`wr5 000000 -- r5=0`
7159			`wsp 001400 -- sp=1400`
7160			`stapc 013200 -- start @ 13200 (1op reg)`
7161			`wtgo`
7162			`rpc d=013220 -- ! pc=halt`
7163			`rr1 d=000000 -- ! r1=0`
7164			`wal 037000 -- check result area`
7165			`brm 10`
7166			`d=000011 -- ! comb 000000 -> n1z0v0c1; 000377`
7167			`d=000377 -- !`
7168			`d=000011 -- ! comb 000001 -> n1z0v0c1; 000376`
7169			`d=000376 -- !`
7170			`d=000011 -- ! comb 000177 -> n1z0v0c1; 000200`
7171			`d=000200 -- !`
7172			`d=000001 -- ! comb 000200 -> n0z0v0c1; 000177`
7173			`d=000177 -- !`
7174			`d=000005 -- ! comb 000377 -> n0z1v0c1; 000000`
7175			`d=000000 -- !`
7176			`#--------`
7177			`C Exec test 46.1bm: COMB - mem`
7178			`#`
7179			`wal 013224 -- setup test instructions:`
7180			`bwm 2`
7181			`000241 -- ccmov= clc`
7182			`105115 -- iut= comb (r5)`
7183			`wr0 177776 -- r0=177776`
7184			`wr1 000005 -- r1=5`
7185			`wr2 036000 -- r2=36000`
7186			`wr3 037000 -- r3=37000`
7187			`wr4 001400 -- r4=1400`
7188			`wr5 001402 -- r5=1402`
7189			`wsp 001400 -- sp=1400`
7190			`stapc 013220 -- start @ 13220 (1op mem)`
7191			`wtgo`
7192			`rpc d=013240 -- ! pc=halt`
7193			`rr1 d=000000 -- ! r1=0`
7194			`wal 037000 -- check result area`
7195			`brm 10`
7196			`d=000011 -- ! comb 000000 -> n1z0v0c1; 000377`
7197			`d=000377 -- !`
7198			`d=000011 -- ! comb 000001 -> n1z0v0c1; 000376`
7199			`d=000376 -- !`
7200			`d=000011 -- ! comb 000177 -> n1z0v0c1; 000200`
7201			`d=000200 -- !`
7202			`d=000001 -- ! comb 000200 -> n0z0v0c1; 000177`
7203			`d=000177 -- !`
7204			`d=000005 -- ! comb 000377 -> n0z1v0c1; 000000`
7205			`d=000000 -- !`
7206			`#--------`
7207			`C Exec test 46.2brc0: INCB - reg,C=0`
7208			`#`
7209			`wal 013204 -- setup test instructions:`
7210			`bwm 2`
7211			`000241 -- ccmov= clc`
7212			`105205 -- iut= incb r5`
7213			`wr0 177776 -- r0=177776`
7214			`wr1 000005 -- r1=5`
7215			`wr2 036000 -- r2=36000`
7216			`wr3 037000 -- r3=37000`
7217			`wr4 000000 -- r4=0`
7218			`wr5 000000 -- r5=0`
7219			`wsp 001400 -- sp=1400`
7220			`stapc 013200 -- start @ 13200 (1op reg)`
7221			`wtgo`
7222			`rpc d=013220 -- ! pc=halt`
7223			`rr1 d=000000 -- ! r1=0`
7224			`wal 037000 -- check result area`
7225			`brm 10`
7226			`d=000000 -- ! incb 000000 -> n0z0v0c0; 000001`
7227			`d=000001 -- !`
7228			`d=000000 -- ! incb 000001 -> n0z0v0c0; 000002`
7229			`d=000002 -- !`
7230			`d=000012 -- ! incb 000177 -> n1z0v1c0; 000200`
7231			`d=000200 -- !`
7232			`d=000010 -- ! incb 000200 -> n1z0v0c0; 000201`
7233			`d=000201 -- !`
7234			`d=000004 -- ! incb 000377 -> n0z1v0c0; 000000`
7235			`d=000000 -- !`
7236			`#--------`
7237			`C Exec test 46.2brc1: INCB - reg,C=1`
7238			`#`
7239			`wal 013204 -- setup test instructions:`
7240			`bwm 2`
7241			`000261 -- ccmov= sec`
7242			`105205 -- iut= incb r5`
7243			`wr0 177776 -- r0=177776`
7244			`wr1 000005 -- r1=5`
7245			`wr2 036000 -- r2=36000`
7246			`wr3 037000 -- r3=37000`
7247			`wr4 000000 -- r4=0`
7248			`wr5 000000 -- r5=0`
7249			`wsp 001400 -- sp=1400`
7250			`stapc 013200 -- start @ 13200 (1op reg)`
7251			`wtgo`
7252			`rpc d=013220 -- ! pc=halt`
7253			`rr1 d=000000 -- ! r1=0`
7254			`wal 037000 -- check result area`
7255			`brm 10`
7256			`d=000001 -- ! incb 000000 -> n0z0v0c1; 000001`
7257			`d=000001 -- !`
7258			`d=000001 -- ! incb 000001 -> n0z0v0c1; 000002`
7259			`d=000002 -- !`
7260			`d=000013 -- ! incb 000177 -> n1z0v1c1; 000200`
7261			`d=000200 -- !`
7262			`d=000011 -- ! incb 000200 -> n1z0v0c1; 000201`
7263			`d=000201 -- !`
7264			`d=000005 -- ! incb 000377 -> n0z1v0c1; 000000`
7265			`d=000000 -- !`
7266			`#--------`
7267			`C Exec test 46.3brc0: DECB - reg,C=0`
7268			`#`
7269			`wal 013204 -- setup test instructions:`
7270			`bwm 2`
7271			`000241 -- ccmov= clc`
7272			`105305 -- iut= decb r5`
7273			`wr0 177776 -- r0=177776`
7274			`wr1 000005 -- r1=5`
7275			`wr2 036000 -- r2=36000`
7276			`wr3 037000 -- r3=37000`
7277			`wr4 000000 -- r4=0`
7278			`wr5 000000 -- r5=0`
7279			`wsp 001400 -- sp=1400`
7280			`stapc 013200 -- start @ 13200 (1op reg)`
7281			`wtgo`
7282			`rpc d=013220 -- ! pc=halt`
7283			`rr1 d=000000 -- ! r1=0`
7284			`wal 037000 -- check result area`
7285			`brm 10`
7286			`d=000010 -- ! decb 000000 -> n1z0v0c0; 000377`
7287			`d=000377 -- !`
7288			`d=000004 -- ! decb 000001 -> n0z1v0c0; 000000`
7289			`d=000000 -- !`
7290			`d=000000 -- ! decb 000177 -> n0z0v0c0; 000176`
7291			`d=000176 -- !`
7292			`d=000002 -- ! decb 000200 -> n0z0v1c0; 000177`
7293			`d=000177 -- !`
7294			`d=000010 -- ! decb 000377 -> n1z0v0c0; 000376`
7295			`d=000376 -- !`
7296			`#--------`
7297			`C Exec test 46.3brc1: DECB - reg,C=1`
7298			`#`
7299			`wal 013204 -- setup test instructions:`
7300			`bwm 2`
7301			`000261 -- ccmov= sec`
7302			`105305 -- iut= decb r5`
7303			`wr0 177776 -- r0=177776`
7304			`wr1 000005 -- r1=5`
7305			`wr2 036000 -- r2=36000`
7306			`wr3 037000 -- r3=37000`
7307			`wr4 000000 -- r4=0`
7308			`wr5 000000 -- r5=0`
7309			`wsp 001400 -- sp=1400`
7310			`stapc 013200 -- start @ 13200 (1op reg)`
7311			`wtgo`
7312			`rpc d=013220 -- ! pc=halt`
7313			`rr1 d=000000 -- ! r1=0`
7314			`wal 037000 -- check result area`
7315			`brm 10`
7316			`d=000011 -- ! decb 000000 -> n1z0v0c1; 000377`
7317			`d=000377 -- !`
7318			`d=000005 -- ! decb 000001 -> n0z1v0c1; 000000`
7319			`d=000000 -- !`
7320			`d=000001 -- ! decb 000177 -> n0z0v0c1; 000176`
7321			`d=000176 -- !`
7322			`d=000003 -- ! decb 000200 -> n0z0v1c1; 000177`
7323			`d=000177 -- !`
7324			`d=000011 -- ! decb 000377 -> n1z0v0c1; 000376`
7325			`d=000376 -- !`
7326			`#--------`
7327			`C Exec test 46.4br: NEGB - reg`
7328			`#`
7329			`wal 013204 -- setup test instructions:`
7330			`bwm 2`
7331			`000241 -- ccmov= clc`
7332			`105405 -- iut= negb r5`
7333			`wr0 177776 -- r0=177776`
7334			`wr1 000005 -- r1=5`
7335			`wr2 036000 -- r2=36000`
7336			`wr3 037000 -- r3=37000`
7337			`wr4 000000 -- r4=0`
7338			`wr5 000000 -- r5=0`
7339			`wsp 001400 -- sp=1400`
7340			`stapc 013200 -- start @ 13200 (1op reg)`
7341			`wtgo`
7342			`rpc d=013220 -- ! pc=halt`
7343			`rr1 d=000000 -- ! r1=0`
7344			`wal 037000 -- check result area`
7345			`brm 10`
7346			`d=000004 -- ! negb 000000 -> n0z1v0c0; 000000`
7347			`d=000000 -- !`
7348			`d=000011 -- ! negb 000001 -> n1z0v0c1; 000377`
7349			`d=000377 -- !`
7350			`d=000011 -- ! negb 000177 -> n1z0v0c1; 000201`
7351			`d=000201 -- !`
7352			`d=000013 -- ! negb 000200 -> n1z0v1c1; 000200`
7353			`d=000200 -- !`
7354			`d=000001 -- ! negb 000377 -> n0z0v0c1; 000001`
7355			`d=000001 -- !`
7356			`#--------`
7357			`C Exec test 46.5brc0: ADCB - reg,C=0`
7358			`#`
7359			`wal 013204 -- setup test instructions:`
7360			`bwm 2`
7361			`000241 -- ccmov= clc`
7362			`105505 -- iut= adcb r5`
7363			`wr0 177776 -- r0=177776`
7364			`wr1 000005 -- r1=5`
7365			`wr2 036000 -- r2=36000`
7366			`wr3 037000 -- r3=37000`
7367			`wr4 000000 -- r4=0`
7368			`wr5 000000 -- r5=0`
7369			`wsp 001400 -- sp=1400`
7370			`stapc 013200 -- start @ 13200 (1op reg)`
7371			`wtgo`
7372			`rpc d=013220 -- ! pc=halt`
7373			`rr1 d=000000 -- ! r1=0`
7374			`wal 037000 -- check result area`
7375			`brm 10`
7376			`d=000004 -- ! adcb 000000 -> n0z1v0c0; 000000`
7377			`d=000000 -- !`
7378			`d=000000 -- ! adcb 000001 -> n0z0v0c0; 000001`
7379			`d=000001 -- !`
7380			`d=000000 -- ! adcb 000177 -> n0z0v0c0; 000177`
7381			`d=000177 -- !`
7382			`d=000010 -- ! adcb 000200 -> n1z0v0c0; 000200`
7383			`d=000200 -- !`
7384			`d=000010 -- ! adcb 000377 -> n1z0v0c0; 000377`
7385			`d=000377 -- !`
7386			`#--------`
7387			`C Exec test 46.5brc1: ADCB - reg,C=1`
7388			`#`
7389			`wal 013204 -- setup test instructions:`
7390			`bwm 2`
7391			`000261 -- ccmov= sec`
7392			`105505 -- iut= adcb r5`
7393			`wr0 177776 -- r0=177776`
7394			`wr1 000005 -- r1=5`
7395			`wr2 036000 -- r2=36000`
7396			`wr3 037000 -- r3=37000`
7397			`wr4 000000 -- r4=0`
7398			`wr5 000000 -- r5=0`
7399			`wsp 001400 -- sp=1400`
7400			`stapc 013200 -- start @ 13200 (1op reg)`
7401			`wtgo`
7402			`rpc d=013220 -- ! pc=halt`
7403			`rr1 d=000000 -- ! r1=0`
7404			`wal 037000 -- check result area`
7405			`brm 10`
7406			`d=000000 -- ! adcb 000000 -> n0z0v0c0; 000001`
7407			`d=000001 -- !`
7408			`d=000000 -- ! adcb 000001 -> n0z0v0c0; 000002`
7409			`d=000002 -- !`
7410			`d=000012 -- ! adcb 000177 -> n1z0v1c0; 000200`
7411			`d=000200 -- !`
7412			`d=000010 -- ! adcb 000200 -> n1z0v0c0; 000201`
7413			`d=000201 -- !`
7414			`d=000005 -- ! adcb 000377 -> n0z1v0c1; 000000`
7415			`d=000000 -- !`
7416			`#--------`
7417			`C Exec test 46.6brc0: SBCB - reg,C=0`
7418			`#`
7419			`wal 013204 -- setup test instructions:`
7420			`bwm 2`
7421			`000241 -- ccmov= clc`
7422			`105605 -- iut= sbcb r5`
7423			`wr0 177776 -- r0=177776`
7424			`wr1 000005 -- r1=5`
7425			`wr2 036000 -- r2=36000`
7426			`wr3 037000 -- r3=37000`
7427			`wr4 000000 -- r4=0`
7428			`wr5 000000 -- r5=0`
7429			`wsp 001400 -- sp=1400`
7430			`stapc 013200 -- start @ 13200 (1op reg)`
7431			`wtgo`
7432			`rpc d=013220 -- ! pc=halt`
7433			`rr1 d=000000 -- ! r1=0`
7434			`wal 037000 -- check result area`
7435			`brm 10`
7436			`d=000004 -- ! sbcb 000000 -> n0z1v0c0; 000000`
7437			`d=000000 -- !`
7438			`d=000000 -- ! sbcb 000001 -> n0z0v0c0; 000001`
7439			`d=000001 -- !`
7440			`d=000000 -- ! sbcb 000177 -> n0z0v0c0; 000177`
7441			`d=000177 -- !`
7442			`d=000010 -- ! sbcb 000200 -> n1z0v0c0; 000200`
7443			`d=000200 -- !`
7444			`d=000010 -- ! sbcb 000377 -> n1z0v0c0; 000377`
7445			`d=000377 -- !`
7446			`#--------`
7447			`C Exec test 46.6brc1: SBCB - reg,C=1`
7448			`#`
7449			`wal 013204 -- setup test instructions:`
7450			`bwm 2`
7451			`000261 -- ccmov= sec`
7452			`105605 -- iut= sbcb r5`
7453			`wr0 177776 -- r0=177776`
7454			`wr1 000005 -- r1=5`
7455			`wr2 036000 -- r2=36000`
7456			`wr3 037000 -- r3=37000`
7457			`wr4 000000 -- r4=0`
7458			`wr5 000000 -- r5=0`
7459			`wsp 001400 -- sp=1400`
7460			`stapc 013200 -- start @ 13200 (1op reg)`
7461			`wtgo`
7462			`rpc d=013220 -- ! pc=halt`
7463			`rr1 d=000000 -- ! r1=0`
7464			`wal 037000 -- check result area`
7465			`brm 10`
7466			`d=000011 -- ! sbcb 000000 -> n1z0v0c1; 000377`
7467			`d=000377 -- !`
7468			`d=000004 -- ! sbcb 000001 -> n0z1v0c0; 000000`
7469			`d=000000 -- !`
7470			`d=000000 -- ! sbcb 000177 -> n0z0v0c0; 000176`
7471			`d=000176 -- !`
7472			`d=000002 -- ! sbcb 000200 -> n0z0v1c0; 000177`
7473			`d=000177 -- !`
7474			`d=000010 -- ! sbcb 000377 -> n1z0v0c0; 000376`
7475			`d=000376 -- !`
7476			`#--------`
7477			`C Exec test 46.7br: TSTB - reg`
7478			`#`
7479			`wal 013204 -- setup test instructions:`
7480			`bwm 2`
7481			`000261 -- ccmov= sec`
7482			`105705 -- iut= tstb r5`
7483			`wr0 177776 -- r0=177776`
7484			`wr1 000005 -- r1=5`
7485			`wr2 036000 -- r2=36000`
7486			`wr3 037000 -- r3=37000`
7487			`wr4 000000 -- r4=0`
7488			`wr5 000000 -- r5=0`
7489			`wsp 001400 -- sp=1400`
7490			`stapc 013200 -- start @ 13200 (1op reg)`
7491			`wtgo`
7492			`rpc d=013220 -- ! pc=halt`
7493			`rr1 d=000000 -- ! r1=0`
7494			`wal 037000 -- check result area`
7495			`brm 10`
7496			`d=000004 -- ! tstb 000000 -> n0z1v0c0;`
7497			`d=000000 -- !`
7498			`d=000000 -- ! tstb 000001 -> n0z0v0c0;`
7499			`d=000001 -- !`
7500			`d=000000 -- ! tstb 000177 -> n0z0v0c0;`
7501			`d=000177 -- !`
7502			`d=000010 -- ! tstb 000200 -> n1z0v0c0;`
7503			`d=000200 -- !`
7504			`d=000010 -- ! tstb 000377 -> n1z0v0c0;`
7505			`d=000377 -- !`
7506			`#--------`
7507			`C Exec test 46.7bm: TSTB - mem`
7508			`#`
7509			`wal 013224 -- setup test instructions:`
7510			`bwm 2`
7511			`000261 -- ccmov= sec`
7512			`105715 -- iut= tstb (r5)`
7513			`wr0 177776 -- r0=177776`
7514			`wr1 000005 -- r1=5`
7515			`wr2 036000 -- r2=36000`
7516			`wr3 037000 -- r3=37000`
7517			`wr4 001400 -- r4=1400`
7518			`wr5 001402 -- r5=1402`
7519			`wsp 001400 -- sp=1400`
7520			`stapc 013220 -- start @ 13220 (1op mem)`
7521			`wtgo`
7522			`rpc d=013240 -- ! pc=halt`
7523			`rr1 d=000000 -- ! r1=0`
7524			`wal 037000 -- check result area`
7525			`brm 10`
7526			`d=000004 -- ! tstb 000000 -> n0z1v0c0;`
7527			`d=000000 -- !`
7528			`d=000000 -- ! tstb 000001 -> n0z0v0c0;`
7529			`d=000001 -- !`
7530			`d=000000 -- ! tstb 000177 -> n0z0v0c0;`
7531			`d=000177 -- !`
7532			`d=000010 -- ! tstb 000200 -> n1z0v0c0;`
7533			`d=000200 -- !`
7534			`d=000010 -- ! tstb 000377 -> n1z0v0c0;`
7535			`d=000377 -- !`
7536			`#--------`
7537			`C Exec test 46.8brc0: RORB - reg, C=0`
7538			`#`
7539			`wal 036000 -- setup test vector: for ror,rol,ars,asl (b)`
7540			`bwm 7`
7541			`000000 -- ror 000000`
7542			`000001 -- ror 000001`
7543			`000200 -- ror 000200`
7544			`000010 -- ror 000010`
7545			`000011 -- ror 000011`
7546			`000110 -- ror 000110`
7547			`000210 -- ror 000210`
7548			`wal 013204 -- setup test instructions:`
7549			`bwm 2`
7550			`000241 -- ccmov= clc`
7551			`106005 -- iut= rorb r5`
7552			`wr0 177776 -- r0=177776`
7553			`wr1 000007 -- r1=7`
7554			`wr2 036000 -- r2=36000`
7555			`wr3 037000 -- r3=37000`
7556			`wr4 000000 -- r4=0`
7557			`wr5 000000 -- r5=0`
7558			`wsp 001400 -- sp=1400`
7559			`stapc 013200 -- start @ 13200 (1op reg)`
7560			`wtgo`
7561			`rpc d=013220 -- ! pc=halt`
7562			`rr1 d=000000 -- ! r1=0`
7563			`wal 037000 -- check result area (Note: V = N xor C !)`
7564			`brm 14`
7565			`d=000004 -- ! rorb 000000 -> n0z1v0c0; 000000`
7566			`d=000000 -- !`
7567			`d=000007 -- ! rorb 000001 -> n0z1v1c1; 000000`
7568			`d=000000 -- !`
7569			`d=000000 -- ! rorb 000200 -> n0z0v0c0; 000100`
7570			`d=000100 -- !`
7571			`d=000000 -- ! rorb 000010 -> n0z0v0c0; 000004`
7572			`d=000004 -- !`
7573			`d=000003 -- ! rorb 000011 -> n0z0v1c1; 000004`
7574			`d=000004 -- !`
7575			`d=000000 -- ! rorb 000110 -> n0z0v0c0; 000044`
7576			`d=000044 -- !`
7577			`d=000000 -- ! rorb 000210 -> n0z0v0c0; 000104`
7578			`d=000104 -- !`
7579			`#--------`
7580			`C Exec test 46.8brc1: RORB - reg, C=1`
7581			`#`
7582			`wal 013204 -- setup test instructions:`
7583			`bwm 2`
7584			`000261 -- ccmov= sec`
7585			`106005 -- iut= rorb r5`
7586			`wr0 177776 -- r0=177776`
7587			`wr1 000007 -- r1=7`
7588			`wr2 036000 -- r2=36000`
7589			`wr3 037000 -- r3=37000`
7590			`wr4 000000 -- r4=0`
7591			`wr5 000000 -- r5=0`
7592			`wsp 001400 -- sp=1400`
7593			`stapc 013200 -- start @ 13200 (1op reg)`
7594			`wtgo`
7595			`rpc d=013220 -- ! pc=halt`
7596			`rr1 d=000000 -- ! r1=0`
7597			`wal 037000 -- check result area (Note: V = N xor C !)`
7598			`brm 14`
7599			`d=000012 -- ! rorb 000000 -> n1z0v1c0; 000200`
7600			`d=000200 -- !`
7601			`d=000011 -- ! rorb 000001 -> n1z0v0c1; 000200`
7602			`d=000200 -- !`
7603			`d=000012 -- ! rorb 000200 -> n1z0v1c0; 000300`
7604			`d=000300 -- !`
7605			`d=000012 -- ! rorb 000010 -> n1z0v1c0; 000204`
7606			`d=000204 -- !`
7607			`d=000011 -- ! rorb 000011 -> n1z0v0c1; 000204`
7608			`d=000204 -- !`
7609			`d=000012 -- ! rorb 000110 -> n1z0v1c0; 000244`
7610			`d=000244 -- !`
7611			`d=000012 -- ! rorb 000210 -> n1z0v1c0; 000304`
7612			`d=000304 -- !`
7613			`#--------`
7614			`C Exec test 46.9brc0: ROLB - reg, C=0`
7615			`#`
7616			`wal 013204 -- setup test instructions:`
7617			`bwm 2`
7618			`000241 -- ccmov= clc`
7619			`106105 -- iut= rolb r5`
7620			`wr0 177776 -- r0=177776`
7621			`wr1 000007 -- r1=7`
7622			`wr2 036000 -- r2=36000`
7623			`wr3 037000 -- r3=37000`
7624			`wr4 000000 -- r4=0`
7625			`wr5 000000 -- r5=0`
7626			`wsp 001400 -- sp=1400`
7627			`stapc 013200 -- start @ 13200 (1op reg)`
7628			`wtgo`
7629			`rpc d=013220 -- ! pc=halt`
7630			`rr1 d=000000 -- ! r1=0`
7631			`wal 037000 -- check result area (Note: V = N xor C !)`
7632			`brm 14`
7633			`d=000004 -- ! rolb 000000 -> n0z1v0c0; 000000`
7634			`d=000000 -- !`
7635			`d=000000 -- ! rolb 000001 -> n0z0v0c0; 000002`
7636			`d=000002 -- !`
7637			`d=000007 -- ! rolb 000200 -> n0z1v1c1; 000000`
7638			`d=000000 -- !`
7639			`d=000000 -- ! rolb 000010 -> n0z0v0c0; 000020`
7640			`d=000020 -- !`
7641			`d=000000 -- ! rolb 000011 -> n0z0v0c0; 000022`
7642			`d=000022 -- !`
7643			`d=000012 -- ! rolb 000110 -> n1z0v1c0; 000220`
7644			`d=000220 -- !`
7645			`d=000003 -- ! rolb 000210 -> n0z0v1c1; 000020`
7646			`d=000020 -- !`
7647			`#--------`
7648			`C Exec test 46.9brc1: ROLB - reg, C=1`
7649			`#`
7650			`wal 013204 -- setup test instructions:`
7651			`bwm 2`
7652			`000261 -- ccmov= sec`
7653			`106105 -- iut= rolb r5`
7654			`wr0 177776 -- r0=177776`
7655			`wr1 000007 -- r1=7`
7656			`wr2 036000 -- r2=36000`
7657			`wr3 037000 -- r3=37000`
7658			`wr4 000000 -- r4=0`
7659			`wr5 000000 -- r5=0`
7660			`wsp 001400 -- sp=1400`
7661			`stapc 013200 -- start @ 13200 (1op reg)`
7662			`wtgo`
7663			`rpc d=013220 -- ! pc=halt`
7664			`rr1 d=000000 -- ! r1=0`
7665			`wal 037000 -- check result area (Note: V = N xor C !)`
7666			`brm 14`
7667			`d=000000 -- ! rolb 000000 -> n0z0v0c0; 000001`
7668			`d=000001 -- !`
7669			`d=000000 -- ! rolb 000001 -> n0z0v0c0; 000003`
7670			`d=000003 -- !`
7671			`d=000003 -- ! rolb 000200 -> n0z0v1c1; 000001`
7672			`d=000001 -- !`
7673			`d=000000 -- ! rolb 000010 -> n0z0v0c0; 000021`
7674			`d=000021 -- !`
7675			`d=000000 -- ! rolb 000011 -> n0z0v0c0; 000023`
7676			`d=000023 -- !`
7677			`d=000012 -- ! rolb 000110 -> n1z0v1c0; 000221`
7678			`d=000221 -- !`
7679			`d=000003 -- ! rolb 000210 -> n0z0v1c1; 000021`
7680			`d=000021 -- !`
7681			`#--------`
7682			`C Exec test 46.10brc0: ASRB - reg, C=0`
7683			`#`
7684			`wal 013204 -- setup test instructions:`
7685			`bwm 2`
7686			`000241 -- ccmov= clc`
7687			`106205 -- iut= asrb r5`
7688			`wr0 177776 -- r0=177776`
7689			`wr1 000007 -- r1=7`
7690			`wr2 036000 -- r2=36000`
7691			`wr3 037000 -- r3=37000`
7692			`wr4 000000 -- r4=0`
7693			`wr5 000000 -- r5=0`
7694			`wsp 001400 -- sp=1400`
7695			`stapc 013200 -- start @ 13200 (1op reg)`
7696			`wtgo`
7697			`rpc d=013220 -- ! pc=halt`
7698			`rr1 d=000000 -- ! r1=0`
7699			`wal 037000 -- check result area (Note: V = N xor C !)`
7700			`brm 14`
7701			`d=000004 -- ! asrb 000000 -> n0z1v0c0; 000000`
7702			`d=000000 -- !`
7703			`d=000007 -- ! asrb 000001 -> n0z1v1c1; 000000`
7704			`d=000000 -- !`
7705			`d=000012 -- ! asrb 000200 -> n1z0v1c0; 000300`
7706			`d=000300 -- !`
7707			`d=000000 -- ! asrb 000010 -> n0z0v0c0; 000004`
7708			`d=000004 -- !`
7709			`d=000003 -- ! asrb 000011 -> n0z0v1c1; 000004`
7710			`d=000004 -- !`
7711			`d=000000 -- ! asrb 000110 -> n0z0v0c0; 000044`
7712			`d=000044 -- !`
7713			`d=000012 -- ! asrb 000210 -> n1z0v1c0; 000304`
7714			`d=000304 -- !`
7715			`#--------`
7716			`C Exec test 46.10brc1: ASRB - reg, C=1`
7717			`#`
7718			`wal 013204 -- setup test instructions:`
7719			`bwm 2`
7720			`000261 -- ccmov= sec`
7721			`106205 -- iut= asrb r5`
7722			`wr0 177776 -- r0=177776`
7723			`wr1 000007 -- r1=7`
7724			`wr2 036000 -- r2=36000`
7725			`wr3 037000 -- r3=37000`
7726			`wr4 000000 -- r4=0`
7727			`wr5 000000 -- r5=0`
7728			`wsp 001400 -- sp=1400`
7729			`stapc 013200 -- start @ 13200 (1op reg)`
7730			`wtgo`
7731			`rpc d=013220 -- ! pc=halt`
7732			`rr1 d=000000 -- ! r1=0`
7733			`wal 037000 -- check result area (Note: V = N xor C !)`
7734			`brm 14`
7735			`d=000004 -- ! asrb 000000 -> n0z1v0c0; 000000`
7736			`d=000000 -- !`
7737			`d=000007 -- ! asrb 000001 -> n0z1v1c1; 000000`
7738			`d=000000 -- !`
7739			`d=000012 -- ! asrb 000200 -> n1z0v1c0; 000300`
7740			`d=000300 -- !`
7741			`d=000000 -- ! asrb 000010 -> n0z0v0c0; 000004`
7742			`d=000004 -- !`
7743			`d=000003 -- ! asrb 000011 -> n0z0v1c1; 000004`
7744			`d=000004 -- !`
7745			`d=000000 -- ! asrb 000110 -> n0z0v0c0; 000044`
7746			`d=000044 -- !`
7747			`d=000012 -- ! asrb 000210 -> n1z0v1c0; 000304`
7748			`d=000304 -- !`
7749			`#--------`
7750			`C Exec test 46.11brc0: ASLB - reg, C=0`
7751			`#`
7752			`wal 013204 -- setup test instructions:`
7753			`bwm 2`
7754			`000241 -- ccmov= clc`
7755			`106305 -- iut= aslb r5`
7756			`wr0 177776 -- r0=177776`
7757			`wr1 000007 -- r1=7`
7758			`wr2 036000 -- r2=36000`
7759			`wr3 037000 -- r3=37000`
7760			`wr4 000000 -- r4=0`
7761			`wr5 000000 -- r5=0`
7762			`wsp 001400 -- sp=1400`
7763			`stapc 013200 -- start @ 13200 (1op reg)`
7764			`wtgo`
7765			`rpc d=013220 -- ! pc=halt`
7766			`rr1 d=000000 -- ! r1=0`
7767			`wal 037000 -- check result area (Note: V = N xor C !)`
7768			`brm 14`
7769			`d=000004 -- ! aslb 000000 -> n0z1v0c0; 000000`
7770			`d=000000 -- !`
7771			`d=000000 -- ! aslb 000001 -> n0z0v0c0; 000002`
7772			`d=000002 -- !`
7773			`d=000007 -- ! aslb 000200 -> n0z1v1c1; 000000`
7774			`d=000000 -- !`
7775			`d=000000 -- ! aslb 000010 -> n0z0v0c0; 000020`
7776			`d=000020 -- !`
7777			`d=000000 -- ! aslb 000011 -> n0z0v0c0; 000022`
7778			`d=000022 -- !`
7779			`d=000012 -- ! aslb 000110 -> n1z0v1c0; 000220`
7780			`d=000220 -- !`
7781			`d=000003 -- ! aslb 000210 -> n0z0v1c1; 000020`
7782			`d=000020 -- !`
7783			`#--------`
7784			`C Exec test 46.11brc1: ASLB - reg, C=1`
7785			`#`
7786			`wal 013204 -- setup test instructions:`
7787			`bwm 2`
7788			`000261 -- ccmov= sec`
7789			`106305 -- iut= aslb r5`
7790			`wr0 177776 -- r0=177776`
7791			`wr1 000007 -- r1=7`
7792			`wr2 036000 -- r2=36000`
7793			`wr3 037000 -- r3=37000`
7794			`wr4 000000 -- r4=0`
7795			`wr5 000000 -- r5=0`
7796			`wsp 001400 -- sp=1400`
7797			`stapc 013200 -- start @ 13200 (1op reg)`
7798			`wtgo`
7799			`rpc d=013220 -- ! pc=halt`
7800			`rr1 d=000000 -- ! r1=0`
7801			`wal 037000 -- check result area (Note: V = N xor C !)`
7802			`brm 14`
7803			`d=000004 -- ! aslb 000000 -> n0z1v0c0; 000000`
7804			`d=000000 -- !`
7805			`d=000000 -- ! aslb 000001 -> n0z0v0c0; 000002`
7806			`d=000002 -- !`
7807			`d=000007 -- ! aslb 000200 -> n0z1v1c1; 000000`
7808			`d=000000 -- !`
7809			`d=000000 -- ! aslb 000010 -> n0z0v0c0; 000020`
7810			`d=000020 -- !`
7811			`d=000000 -- ! aslb 000011 -> n0z0v0c0; 000022`
7812			`d=000022 -- !`
7813			`d=000012 -- ! aslb 000110 -> n1z0v1c0; 000220`
7814			`d=000220 -- !`
7815			`d=000003 -- ! aslb 000210 -> n0z0v1c1; 000020`
7816			`d=000020 -- !`
7817			`#--------`
7818			`C Exec test 46.12brc0: MOVB - reg, C=0`
7819			`#`
7820			`wal 036000 -- setup test vector: for mov`
7821			`bwm 6`
7822			`000000 -- movb 000000,000000`
7823			`000000 --`
7824			`000001 -- movb 000001,000000`
7825			`000000 --`
7826			`000200 -- movb 000200,000000`
7827			`000000 --`
7828			`wal 013246 -- setup test instructions:`
7829			`bwm 2`
7830			`000241 -- ccmov= clc`
7831			`110405 -- iut= movb r4,r5`
7832			`wr0 177776 -- r0=177776`
7833			`wr1 000003 -- r1=3`
7834			`wr2 036000 -- r2=36000`
7835			`wr3 037000 -- r3=37000`
7836			`wr4 000000 -- r4=0`
7837			`wr5 000000 -- r5=0`
7838			`wsp 001400 -- sp=1400`
7839			`stapc 013240 -- start @ 13240 (2op reg)`
7840			`wtgo`
7841			`rpc d=013262 -- ! pc=halt`
7842			`rr1 d=000000 -- ! r1=0`
7843			`wal 037000 -- check result area`
7844			`brm 6`
7845			`d=000004 -- ! movb 000000,000000 -> n0z1v0c0; 000000`
7846			`d=000000 -- !`
7847			`d=000000 -- ! movb 000001,000000 -> n0z0v0c0; 000001`
7848			`d=000001 -- !`
7849			`d=000010 -- ! movb 000200,000000 -> n1z0v0c0; 177600`
7850			`d=177600 -- !`
7851			`#--------`
7852			`C Exec test 46.12brc1: MOVB - reg, C=1`
7853			`#`
7854			`wal 013246 -- setup test instructions:`
7855			`bwm 2`
7856			`000261 -- ccmov= sec`
7857			`110405 -- iut= movb r4,r5`
7858			`wr0 177776 -- r0=177776`
7859			`wr1 000003 -- r1=3`
7860			`wr2 036000 -- r2=36000`
7861			`wr3 037000 -- r3=37000`
7862			`wr4 000000 -- r4=0`
7863			`wr5 000000 -- r5=0`
7864			`wsp 001400 -- sp=1400`
7865			`stapc 013240 -- start @ 13240 (2op reg)`
7866			`wtgo`
7867			`rpc d=013262 -- ! pc=halt`
7868			`rr1 d=000000 -- ! r1=0`
7869			`wal 037000 -- check result area`
7870			`brm 6`
7871			`d=000005 -- ! movb 000000,000000 -> n0z1v0c1; 000000`
7872			`d=000000 -- !`
7873			`d=000001 -- ! movb 000001,000000 -> n0z0v0c1; 000001`
7874			`d=000001 -- !`
7875			`d=000011 -- ! movb 000200,000000 -> n1z0v0c1; 177600`
7876			`d=177600 -- !`
7877			`#--------`
7878			`C Exec test 46.12bmc0: MOVB - mem, C=0`
7879			`#`
7880			`wal 013276 -- setup test instructions:`
7881			`bwm 2`
7882			`000241 -- ccmov= clc`
7883			`111415 -- iut= movb (r4),(r5)`
7884			`wr0 177776 -- r0=177776`
7885			`wr1 000003 -- r1=3`
7886			`wr2 036000 -- r2=36000`
7887			`wr3 037000 -- r3=37000`
7888			`wr4 001400 -- r4=1400`
7889			`wr5 001402 -- r5=1402`
7890			`wsp 001400 -- sp=1400`
7891			`stapc 013270 -- start @ 13270 (2op mem)`
7892			`wtgo`
7893			`rpc d=013312 -- ! pc=halt`
7894			`rr1 d=000000 -- ! r1=0`
7895			`wal 037000 -- check result area`
7896			`brm 6`
7897			`d=000004 -- ! movb 000000,000000 -> n0z1v0c0; 000000`
7898			`d=000000 -- !`
7899			`d=000000 -- ! movb 000001,000000 -> n0z0v0c0; 000001`
7900			`d=000001 -- !`
7901			`d=000010 -- ! movb 000200,000000 -> n1z0v0c0; 000200`
7902			`d=000200 -- !`
7903			`#--------`
7904			`C Exec test 46.13brc0: BITB - reg, C=0`
7905			`#`
7906			`wal 036000 -- setup test vector: for bit,bic,bis (b)`
7907			`bwm 12`
7908			`000000 -- bitb 000000,000000`
7909			`000000 --`
7910			`000003 -- bitb 000003,000000`
7911			`000000 --`
7912			`000003 -- bitb 000003,000006`
7913			`000006 --`
7914			`000003 -- bitb 000003,000014`
7915			`000014 --`
7916			`000300 -- bitb 000300,000140`
7917			`000140 --`
7918			`000300 -- bitb 000300,000300`
7919			`000300 --`
7920			`wal 013246 -- setup test instructions:`
7921			`bwm 2`
7922			`000241 -- ccmov= clc`
7923			`130405 -- iut= bitb r4,r5`
7924			`wr0 177776 -- r0=177776`
7925			`wr1 000006 -- r1=6`
7926			`wr2 036000 -- r2=36000`
7927			`wr3 037000 -- r3=37000`
7928			`wr4 000000 -- r4=0`
7929			`wr5 000000 -- r5=0`
7930			`wsp 001400 -- sp=1400`
7931			`stapc 013240 -- start @ 13240 (2op reg)`
7932			`wtgo`
7933			`rpc d=013262 -- ! pc=halt`
7934			`rr1 d=000000 -- ! r1=0`
7935			`wal 037000 -- check result area`
7936			`brm 12`
7937			`d=000004 -- ! bitb 000000,000000 -> n0z1v0c0; (000000)`
7938			`d=000000 -- !`
7939			`d=000004 -- ! bitb 000003,000000 -> n0z1v0c0; (000000)`
7940			`d=000000 -- !`
7941			`d=000000 -- ! bitb 000003,000006 -> n0z0v0c0; (000002)`
7942			`d=000006 -- !`
7943			`d=000004 -- ! bitb 000003,000014 -> n0z1v0c0; (000000)`
7944			`d=000014 -- !`
7945			`d=000000 -- ! bitb 000300,000140 -> n0z0v0c0; (000100)`
7946			`d=000140 -- !`
7947			`d=000010 -- ! bitb 000300,000300 -> n1z0v0c0; (000300)`
7948			`d=000300 -- !`
7949			`#--------`
7950			`C Exec test 46.13brc1: BITB - reg, C=1`
7951			`#`
7952			`wal 013246 -- setup test instructions:`
7953			`bwm 2`
7954			`000261 -- ccmov= sec`
7955			`130405 -- iut= bitb r4,r5`
7956			`wr0 177776 -- r0=177776`
7957			`wr1 000006 -- r1=6`
7958			`wr2 036000 -- r2=36000`
7959			`wr3 037000 -- r3=37000`
7960			`wr4 000000 -- r4=0`
7961			`wr5 000000 -- r5=0`
7962			`wsp 001400 -- sp=1400`
7963			`stapc 013240 -- start @ 13240 (2op reg)`
7964			`wtgo`
7965			`rpc d=013262 -- ! pc=halt`
7966			`rr1 d=000000 -- ! r1=0`
7967			`wal 037000 -- check result area`
7968			`brm 12`
7969			`d=000005 -- ! bitb 000000,000000 -> n0z1v0c1; (000000)`
7970			`d=000000 -- !`
7971			`d=000005 -- ! bitb 000003,000000 -> n0z1v0c1; (000000)`
7972			`d=000000 -- !`
7973			`d=000001 -- ! bitb 000003,000006 -> n0z0v0c1; (000002)`
7974			`d=000006 -- !`
7975			`d=000005 -- ! bitb 000003,000014 -> n0z1v0c1; (000000)`
7976			`d=000014 -- !`
7977			`d=000001 -- ! bitb 000300,000140 -> n0z0v0c1; (000100)`
7978			`d=000140 -- !`
7979			`d=000011 -- ! bitb 000300,000300 -> n1z0v0c1; (000300)`
7980			`d=000300 -- !`
7981			`#--------`
7982			`C Exec test 46.13bmc0: BITB - mem, C=0`
7983			`#`
7984			`wal 013276 -- setup test instructions:`
7985			`bwm 2`
7986			`000241 -- ccmov= clc`
7987			`131415 -- iut= bitb (r4),(r5)`
7988			`wr0 177776 -- r0=177776`
7989			`wr1 000006 -- r1=6`
7990			`wr2 036000 -- r2=36000`
7991			`wr3 037000 -- r3=37000`
7992			`wr4 001400 -- r4=1400`
7993			`wr5 001402 -- r5=1402`
7994			`wsp 001400 -- sp=1400`
7995			`stapc 013270 -- start @ 13270 (2op mem)`
7996			`wtgo`
7997			`rpc d=013312 -- ! pc=halt`
7998			`rr1 d=000000 -- ! r1=0`
7999			`wal 037000 -- check result area`
8000			`brm 12`
8001			`d=000004 -- ! bitb 000000,000000 -> n0z1v0c0; (000000)`
8002			`d=000000 -- !`
8003			`d=000004 -- ! bitb 000003,000000 -> n0z1v0c0; (000000)`
8004			`d=000000 -- !`
8005			`d=000000 -- ! bitb 000003,000006 -> n0z0v0c0; (000002)`
8006			`d=000006 -- !`
8007			`d=000004 -- ! bitb 000003,000014 -> n0z1v0c0; (000000)`
8008			`d=000014 -- !`
8009			`d=000000 -- ! bitb 000300,000140 -> n0z0v0c0; (000100)`
8010			`d=000140 -- !`
8011			`d=000010 -- ! bitb 000300,000300 -> n1z0v0c0; (000300)`
8012			`d=000300 -- !`
8013			`#--------`
8014			`C Exec test 46.14brc0: BICB - reg, C=0`
8015			`#`
8016			`wal 013246 -- setup test instructions:`
8017			`bwm 2`
8018			`000241 -- ccmov= clc`
8019			`140405 -- iut= bicb r4,r5`
8020			`wr0 177776 -- r0=177776`
8021			`wr1 000006 -- r1=6`
8022			`wr2 036000 -- r2=36000`
8023			`wr3 037000 -- r3=37000`
8024			`wr4 000000 -- r4=0`
8025			`wr5 000000 -- r5=0`
8026			`wsp 001400 -- sp=1400`
8027			`stapc 013240 -- start @ 13240 (2op reg)`
8028			`wtgo`
8029			`rpc d=013262 -- ! pc=halt`
8030			`rr1 d=000000 -- ! r1=0`
8031			`wal 037000 -- check result area`
8032			`brm 12`
8033			`d=000004 -- ! bicb 000000,000000 -> n0z1v0c0; 000000`
8034			`d=000000 -- !`
8035			`d=000004 -- ! bicb 000003,000000 -> n0z1v0c0; 000000`
8036			`d=000000 -- !`
8037			`d=000000 -- ! bicb 000003,000006 -> n0z0v0c0; 000004`
8038			`d=000004 -- !`
8039			`d=000000 -- ! bicb 000003,000014 -> n0z0v0c0; 000014`
8040			`d=000014 -- !`
8041			`d=000000 -- ! bicb 000300,000140 -> n0z0v0c0; 000040`
8042			`d=000040 -- !`
8043			`d=000004 -- ! bicb 000300,000300 -> n0z1v0c0; 000000`
8044			`d=000000 -- !`
8045			`#--------`
8046			`C Exec test 46.14brc1: BICB - reg, C=1`
8047			`#`
8048			`wal 013246 -- setup test instructions:`
8049			`bwm 2`
8050			`000261 -- ccmov= sec`
8051			`140405 -- iut= bicb r4,r5`
8052			`wr0 177776 -- r0=177776`
8053			`wr1 000006 -- r1=6`
8054			`wr2 036000 -- r2=36000`
8055			`wr3 037000 -- r3=37000`
8056			`wr4 000000 -- r4=0`
8057			`wr5 000000 -- r5=0`
8058			`wsp 001400 -- sp=1400`
8059			`stapc 013240 -- start @ 13240 (2op reg)`
8060			`wtgo`
8061			`rpc d=013262 -- ! pc=halt`
8062			`rr1 d=000000 -- ! r1=0`
8063			`wal 037000 -- check result area`
8064			`brm 12`
8065			`d=000005 -- ! bicb 000000,000000 -> n0z1v0c1; 000000`
8066			`d=000000 -- !`
8067			`d=000005 -- ! bicb 000003,000000 -> n0z1v0c1; 000000`
8068			`d=000000 -- !`
8069			`d=000001 -- ! bicb 000003,000006 -> n0z0v0c1; 000004`
8070			`d=000004 -- !`
8071			`d=000001 -- ! bicb 000003,000014 -> n0z0v0c1; 000014`
8072			`d=000014 -- !`
8073			`d=000001 -- ! bicb 000300,000140 -> n0z0v0c1; 000040`
8074			`d=000040 -- !`
8075			`d=000005 -- ! bicb 000300,000300 -> n0z1v0c1; 000000`
8076			`d=000000 -- !`
8077			`#--------`
8078			`C Exec test 46.14bmrc0: BICB - mem, C=0`
8079			`#`
8080			`wal 013276 -- setup test instructions:`
8081			`bwm 2`
8082			`000241 -- ccmov= clc`
8083			`141415 -- iut= bicb (r4),(r5)`
8084			`wr0 177776 -- r0=177776`
8085			`wr1 000006 -- r1=6`
8086			`wr2 036000 -- r2=36000`
8087			`wr3 037000 -- r3=37000`
8088			`wr4 001400 -- r4=1400`
8089			`wr5 001402 -- r5=1402`
8090			`wsp 001400 -- sp=1400`
8091			`stapc 013270 -- start @ 13270 (2op mem)`
8092			`wtgo`
8093			`rpc d=013312 -- ! pc=halt`
8094			`rr1 d=000000 -- ! r1=0`
8095			`wal 037000 -- check result area`
8096			`brm 12`
8097			`d=000004 -- ! bicb 000000,000000 -> n0z1v0c0; 000000`
8098			`d=000000 -- !`
8099			`d=000004 -- ! bicb 000003,000000 -> n0z1v0c0; 000000`
8100			`d=000000 -- !`
8101			`d=000000 -- ! bicb 000003,000006 -> n0z0v0c0; 000004`
8102			`d=000004 -- !`
8103			`d=000000 -- ! bicb 000003,000014 -> n0z0v0c0; 000014`
8104			`d=000014 -- !`
8105			`d=000000 -- ! bicb 000300,000140 -> n0z0v0c0; 000040`
8106			`d=000040 -- !`
8107			`d=000004 -- ! bicb 000300,000300 -> n0z1v0c0; 000000`
8108			`d=000000 -- !`
8109			`#--------`
8110			`C Exec test 46.15brc0: BISB - reg, C=0`
8111			`#`
8112			`wal 013246 -- setup test instructions:`
8113			`bwm 2`
8114			`000241 -- ccmov= clc`
8115			`150405 -- iut= bisb r4,r5`
8116			`wr0 177776 -- r0=177776`
8117			`wr1 000006 -- r1=6`
8118			`wr2 036000 -- r2=36000`
8119			`wr3 037000 -- r3=37000`
8120			`wr4 000000 -- r4=0`
8121			`wr5 000000 -- r5=0`
8122			`wsp 001400 -- sp=1400`
8123			`stapc 013240 -- start @ 13240 (2op reg)`
8124			`wtgo`
8125			`rpc d=013262 -- ! pc=halt`
8126			`rr1 d=000000 -- ! r1=0`
8127			`wal 037000 -- check result area`
8128			`brm 12`
8129			`d=000004 -- ! bisb 000000,000000 -> n0z1v0c0; 000000`
8130			`d=000000 -- !`
8131			`d=000000 -- ! bisb 000003,000000 -> n0z0v0c0; 000003`
8132			`d=000003 -- !`
8133			`d=000000 -- ! bisb 000003,000006 -> n0z0v0c0; 000007`
8134			`d=000007 -- !`
8135			`d=000000 -- ! bisb 000003,000014 -> n0z0v0c0; 000017`
8136			`d=000017 -- !`
8137			`d=000010 -- ! bisb 000300,000140 -> n1z0v0c0; 000340`
8138			`d=000340 -- !`
8139			`d=000010 -- ! bisb 000300,000300 -> n1z0v0c0; 000300`
8140			`d=000300 -- !`
8141			`#--------`
8142			`C Exec test 46.15brc1: BISB - reg, C=1`
8143			`#`
8144			`wal 013246 -- setup test instructions:`
8145			`bwm 2`
8146			`000261 -- ccmov= sec`
8147			`150405 -- iut= bisb r4,r5`
8148			`wr0 177776 -- r0=177776`
8149			`wr1 000006 -- r1=6`
8150			`wr2 036000 -- r2=36000`
8151			`wr3 037000 -- r3=37000`
8152			`wr4 000000 -- r4=0`
8153			`wr5 000000 -- r5=0`
8154			`wsp 001400 -- sp=1400`
8155			`stapc 013240 -- start @ 13240 (2op reg)`
8156			`wtgo`
8157			`rpc d=013262 -- ! pc=halt`
8158			`rr1 d=000000 -- ! r1=0`
8159			`wal 037000 -- check result area`
8160			`brm 12`
8161			`d=000005 -- ! bisb 000000,000000 -> n0z1v0c1; 000000`
8162			`d=000000 -- !`
8163			`d=000001 -- ! bisb 000003,000000 -> n0z0v0c1; 000003`
8164			`d=000003 -- !`
8165			`d=000001 -- ! bisb 000003,000006 -> n0z0v0c1; 000007`
8166			`d=000007 -- !`
8167			`d=000001 -- ! bisb 000003,000014 -> n0z0v0c1; 000017`
8168			`d=000017 -- !`
8169			`d=000011 -- ! bisb 000300,000140 -> n1z0v0c1; 000340`
8170			`d=000340 -- !`
8171			`d=000011 -- ! bisb 000300,000300 -> n1z0v0c1; 000300`
8172			`d=000300 -- !`
8173			`#--------`
8174			`C Exec test 46.17br: CMPB - reg`
8175			`#`
8176			`wal 036000 -- setup test vector: for cmp (b)`
8177			`bwm 38`
8178			`000000 -- cmpb 000000,000000`
8179			`000000 --`
8180			`000001 -- cmpb 000001,000000`
8181			`000000 --`
8182			`000377 -- cmpb 000377,000000`
8183			`000000 --`
8184			`000000 -- cmpb 000000,000001`
8185			`000001 --`
8186			`000001 -- cmpb 000001,000001`
8187			`000001 --`
8188			`000377 -- cmpb 000377,000001`
8189			`000001 --`
8190			`000176 -- cmpb 000176,000177`
8191			`000177 --`
8192			`000177 -- cmpb 000177,000177`
8193			`000177 --`
8194			`000200 -- cmpb 000200,000177`
8195			`000177 --`
8196			`000001 -- cmpb 000001,000177`
8197			`000177 --`
8198			`000377 -- cmpb 000377,000177`
8199			`000177 --`
8200			`000177 -- cmpb 000177,000200`
8201			`000200 --`
8202			`000200 -- cmpb 000200,000200`
8203			`000200 --`
8204			`000201 -- cmpb 000201,000200`
8205			`000200 --`
8206			`000001 -- cmpb 000001,000200`
8207			`000200 --`
8208			`000377 -- cmpb 000377,000200`
8209			`000200 --`
8210			`000000 -- cmpb 000000,000377`
8211			`000377 --`
8212			`000001 -- cmpb 000001,000377`
8213			`000377 --`
8214			`000377 -- cmpb 000377,000377`
8215			`000377 --`
8216			`wal 013246 -- setup test instructions:`
8217			`bwm 2`
8218			`000241 -- ccmov= clc`
8219			`120405 -- iut= cmpb r4,r5`
8220			`wr0 177776 -- r0=177776`
8221			`wr1 000023 -- r1=23 (19.)`
8222			`wr2 036000 -- r2=36000`
8223			`wr3 037000 -- r3=37000`
8224			`wr4 000000 -- r4=0`
8225			`wr5 000000 -- r5=0`
8226			`wsp 001400 -- sp=1400`
8227			`stapc 013240 -- start @ 13240 (2op reg)`
8228			`wtgo`
8229			`rpc d=013262 -- ! pc=halt`
8230			`rr1 d=000000 -- ! r1=0 (Note: C=1 if dst > src unsigned)`
8231			`wal 037000 -- check result area (Note: V=1 if s xor d and r eq d)`
8232			`brm 38`
8233			`d=000004 -- ! cmpb 000000,000000 -> n0z1v0c0; (000000)`
8234			`d=000000 -- !`
8235			`d=000000 -- ! cmpb 000001,000000 -> n0z0v0c0; (000001)`
8236			`d=000000 -- !`
8237			`d=000010 -- ! cmpb 000377,000000 -> n1z0v0c0; (000377)`
8238			`d=000000 -- !`
8239			`d=000011 -- ! cmpb 000000,000001 -> n1z0v0c1; (000377+C)`
8240			`d=000001 -- !`
8241			`d=000004 -- ! cmpb 000001,000001 -> n0z1v0c0; (000000)`
8242			`d=000001 -- !`
8243			`d=000010 -- ! cmpb 000377,000001 -> n1z0v0c0; (000376)`
8244			`d=000001 -- !`
8245			`d=000011 -- ! cmpb 000176,000177 -> n1z0v0c1; (000377+C)`
8246			`d=000177 -- !`
8247			`d=000004 -- ! cmpb 000177,000177 -> n0z1v0c0; (000000)`
8248			`d=000177 -- !`
8249			`d=000002 -- ! cmpb 000200,000177 -> n0z0v1c0; (000001)`
8250			`d=000177 -- !`
8251			`d=000011 -- ! cmpb 000001,000177 -> n1z0v0c1; (000202+C)`
8252			`d=000177 -- !`
8253			`d=000010 -- ! cmpb 000377,000177 -> n1z0v0c0; (000200)`
8254			`d=000177 -- !`
8255			`d=000013 -- ! cmpb 000177,000200 -> n1z0v1c1; (000377+C)`
8256			`d=000200 -- !`
8257			`d=000004 -- ! cmpb 000200,000200 -> n0z1v0c0; (000000)`
8258			`d=000200 -- !`
8259			`d=000000 -- ! cmpb 000201,000200 -> n0z0v0c0; (000001)`
8260			`d=000200 -- !`
8261			`d=000013 -- ! cmpb 000001,000200 -> n1z0v1c1; (000201+C)`
8262			`d=000200 -- !`
8263			`d=000000 -- ! cmpb 000377,000200 -> n0z0v0c0; (000177)`
8264			`d=000200 -- !`
8265			`d=000001 -- ! cmpb 000000,000377 -> n0z0v0c1; (000001+C)`
8266			`d=000377 -- !`
8267			`d=000001 -- ! cmpb 000001,000377 -> n0z0v0c1; (000002+C)`
8268			`d=000377 -- !`
8269			`d=000004 -- ! cmpb 000377,000377 -> n0z1v0c0; (000000)`
8270			`d=000377 -- !`
8271			`#-----------------------------------------------------------------------------`
8272			`C Setup code 47 [base 13400] (pipeline torture tests)`
8273			`#`
8274			`wal 013400 -- data:`
8275			`wmi 000077 -- marker`
8276			`wal 013402 -- code 1:`
8277			`bwm 13`
8278			`016727 -- mov -6(pc),(pc)+ ;`
8279			`177772`
8280			`000000 -- halt ; will be overwritten`
8281			`016737 -- mov -10(pc),@(pc)+ ;`
8282			`177770`
8283			`013400`
8284			`005200 -- inc r0 ;`
8285			`#13420`
8286			`010317 -- mov r3,(pc) ; will overwrite next instruction`
8287			`000000 -- halt ; will be overwritten`
8288			`005200 -- inc r0 ;`
8289			`010447 -- mov r4,-(pc) ; will overwrite itself`
8290			`005200 -- inc r0 ;`
8291			`000000 -- halt ;`
8292			`#`
8293			`wal 013440 -- code 2: (pipeline tester adapted from KDJ11A.MAC)`
8294			`bwm 15`
8295			`012717 -- mov (pc)+,(pc) ; will replace jmp (r1) with nop`
8296			`000240 -- nop`
8297			`000111 -- jmp (r1)`
8298			`012717 -- mov (pc)+,(pc) ; will replace jmp (r1) with nop`
8299			`000240 -- nop`
8300			`000111 -- jmp (r1)`
8301			`012717 -- mov (pc)+,(pc) ; will replace jmp (r1) with nop`
8302			`000240 -- nop`
8303			`#13460`
8304			`000111 -- jmp (r1)`
8305			`012717 -- mov (pc)+,(pc) ; will replace jmp (r1) with nop`
8306			`000240 -- nop`
8307			`000111 -- jmp (r1)`
8308			`000000 -- halt ; should halt here !`
8309			`000000 -- halt ;`
8310			`000000 -- halt ; should not jmp here !`
8311			`#`
8312			`C Exec code 47 (pipeline torture tests)`
8313			`C Exec test 47.1 (some self-modifying code, use (pc)+, (pc), -(pc)):`
8314			`#`
8315			`wr0 000000 -- r0=0`
8316			`wr1 000000 -- r1=0`
8317			`wr2 000000 -- r2=0`
8318			`wr3 005201 -- r3= inc r1`
8319			`wr4 005202 -- r4= inc r2`
8320			`stapc 013402 -- start @ 13402`
8321			`wtgo`
8322			`rpc d=013434 -- ! pc`
8323			`rr0 d=000003 -- ! r0`
8324			`rr1 d=000001 -- ! r1`
8325			`rr2 d=000001 -- ! r2`
8326			`rr3 d=005201 -- ! r3`
8327			`rr4 d=005202 -- ! r4`
8328			`#`
8329			`wal 013400 -- check data area:`
8330			`rmi d=177772 -- ! new marker ; written by mov -10(pc),@(pc)+`
8331			`wal 013402 -- check code area:`
8332			`brm 13`
8333			`d=016727 -- ! mov -6(pc),(pc)+ ;`
8334			`d=177772 -- !`
8335			`d=000077 -- ! ; written by mov -6(pc),(pc)+`
8336			`d=016737 -- ! mov -10(pc),@(pc)+;`
8337			`d=177770 -- !`
8338			`d=013400 -- !`
8339			`d=005200 -- ! inc r0 ;`
8340			`#13320`
8341			`d=010317 -- ! mov r3,(pc) ;`
8342			`d=005201 -- ! inc r1 ; written by mov r3,(pc); executed`
8343			`d=005200 -- ! inc r0 ;`
8344			`d=005202 -- ! inc r2 ; written by mov r4,-(pc); executed`
8345			`d=005200 -- ! inc r0 ;`
8346			`d=000000 -- ! halt ;`
8347			`#`
8348			`C Exec test 47.1 (pipeline tester adapted from KDJ11A.MAC, test 121, p. 70)`
8349			`#`
8350			`wr1 013474 -- r1=13474 (alternate halt)`
8351			`stapc 013440 -- start @ 13440`
8352			`wtgo`
8353			`rpc d=013472 -- ! pc`
8354			`wal 013440 -- check code area:`
8355			`brm 13`
8356			`d=012717 -- ! mov (pc)+,(pc) ;`
8357			`d=000240 -- ! nop`
8358			`d=000240 -- ! nop ; written; executed`
8359			`d=012717 -- ! mov (pc)+,(pc) ;`
8360			`d=000240 -- ! nop`
8361			`d=000240 -- ! nop ; written; executed`
8362			`d=012717 -- ! mov (pc)+,(pc) ;`
8363			`d=000240 -- ! nop`
8364			`#13360`
8365			`d=000240 -- ! nop ; written; executed`
8366			`d=012717 -- ! mov (pc)+,(pc) ;`
8367			`d=000240 -- ! nop`
8368			`d=000240 -- ! nop ; written; executed`
8369			`d=000000 -- ! halt ;`
8370			`#-----------------------------------------------------------------------------`
8371			`C Setup code 50 [base 13500] (check that all reserved instructions trap to 10)`
8372			`#`
8373			`wal 013500 -- code (to be single stepped...)`
8374			`bwm 17`
8375			`000007 -- 000007`
8376			`000010 -- 000010-000077`
8377			`000077 --`
8378			`000210 -- 000210-000227`
8379			`000227 --`
8380			`007000 -- 007000-007777`
8381			`007777 --`
8382			`075000 -- 075000-076777`
8383			`#13420`
8384			`076777 --`
8385			`106400 -- 106400-106477`
8386			`106477 --`
8387			`106700 -- 106700-106777`
8388			`106777 --`
8389			`107000 -- 107000-107777`
8390			`107777 --`
8391			`170000 -- 170000-177777 (no FPU)`
8392			`#13440`
8393			`177777 --`
8394			`#`
8395			`C Exec code 50 (check that all reserved instructions trap to 10)`
8396			`C Test odd address abort`
8397			`#`
8398			`rst -- console reset`
8399			`wps 000000 -- clear psw`
8400			`wal 001374 -- clean stack`
8401			`bwm 2`
8402			`000000 --`
8403			`000000 --`
8404			`wsp 001400 -- sp=1400`
8405			`wpc 013500 -- pc=13500`
8406			`step -- step (000007): trap 10 [[s:2]]`
8407			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8408			`rsp d=001374 -- ! sp=1374`
8409			`#`
8410			`wsp 001400 -- sp=1400`
8411			`wpc 013502 -- pc=13502`
8412			`step -- step (000010): trap 10 [[s:2]]`
8413			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8414			`rsp d=001374 -- ! sp=1374`
8415			`#`
8416			`wsp 001400 -- sp=1400`
8417			`wpc 013504 -- pc=13504`
8418			`step -- step (000077): trap 10 [[s:2]]`
8419			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8420			`rsp d=001374 -- ! sp=1374`
8421			`#`
8422			`wsp 001400 -- sp=1400`
8423			`wpc 013506 -- pc=13506`
8424			`step -- step (000210): trap 10 [[s:2]]`
8425			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8426			`rsp d=001374 -- ! sp=1374`
8427			`#`
8428			`wsp 001400 -- sp=1400`
8429			`wpc 013510 -- pc=13510`
8430			`step -- step (000227): trap 10 [[s:2]]`
8431			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8432			`rsp d=001374 -- ! sp=1374`
8433			`#`
8434			`wsp 001400 -- sp=1400`
8435			`wpc 013512 -- pc=13512`
8436			`step -- step (007000): trap 10 [[s:2]]`
8437			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8438			`rsp d=001374 -- ! sp=1374`
8439			`#`
8440			`wsp 001400 -- sp=1400`
8441			`wpc 013514 -- pc=13514`
8442			`step -- step (007777): trap 10 [[s:2]]`
8443			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8444			`rsp d=001374 -- ! sp=1374`
8445			`#`
8446			`wsp 001400 -- sp=1400`
8447			`wpc 013516 -- pc=13516`
8448			`step -- step (075000): trap 10 [[s:2]]`
8449			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8450			`rsp d=001374 -- ! sp=1374`
8451			`#`
8452			`wsp 001400 -- sp=1400`
8453			`wpc 013520 -- pc=13520`
8454			`step -- step (076777): trap 10 [[s:2]]`
8455			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8456			`rsp d=001374 -- ! sp=1374`
8457			`#`
8458			`wsp 001400 -- sp=1400`
8459			`wpc 013522 -- pc=13522`
8460			`step -- step (106400): trap 10 [[s:2]]`
8461			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8462			`rsp d=001374 -- ! sp=1374`
8463			`#`
8464			`wsp 001400 -- sp=1400`
8465			`wpc 013524 -- pc=13524`
8466			`step -- step (106477): trap 10 [[s:2]]`
8467			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8468			`rsp d=001374 -- ! sp=1374`
8469			`#`
8470			`wsp 001400 -- sp=1400`
8471			`wpc 013526 -- pc=13526`
8472			`step -- step (106700): trap 10 [[s:2]]`
8473			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8474			`rsp d=001374 -- ! sp=1374`
8475			`#`
8476			`wsp 001400 -- sp=1400`
8477			`wpc 013530 -- pc=13530`
8478			`step -- step (106777): trap 10 [[s:2]]`
8479			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8480			`rsp d=001374 -- ! sp=1374`
8481			`#`
8482			`wsp 001400 -- sp=1400`
8483			`wpc 013532 -- pc=13532`
8484			`step -- step (107000): trap 10 [[s:2]]`
8485			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8486			`rsp d=001374 -- ! sp=1374`
8487			`#`
8488			`wsp 001400 -- sp=1400`
8489			`wpc 013534 -- pc=13534`
8490			`step -- step (107777): trap 10 [[s:2]]`
8491			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8492			`rsp d=001374 -- ! sp=1374`
8493			`#`
8494			`wsp 001400 -- sp=1400`
8495			`wpc 013536 -- pc=13536`
8496			`step -- step (170000): trap 10 [[s:2]]`
8497			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8498			`rsp d=001374 -- ! sp=1374`
8499			`#`
8500			`wsp 001400 -- sp=1400`
8501			`wpc 013540 -- pc=13540`
8502			`step -- step (177777): trap 10 [[s:2]]`
8503			`rpc d=000012 -- ! pc=12 (trap 12 catch) [[s:14]]`
8504			`rsp d=001374 -- ! sp=1374`
8505			`#-----------------------------------------------------------------------------`
8506			`#`
8507			`C Verify trap catchers integrity`
8508			`#`
8509			`wal 000004 -- vectors: 4...34 (trap catcher)`
8510			`brm 14`
8511			`d=000006 -- ! PC:06 ; vector 4`
8512			`d=000000 -- ! PS:0`
8513			`d=000012 -- ! PC:12 ; vector 10`
8514			`d=000000 -- ! PS:0`
8515			`d=000016 -- ! PC:16 ; vector 14 (T bit; BPT)`
8516			`d=000000 -- ! PS:0`
8517			`d=000022 -- ! PC:22 ; vector 20 (IOT)`
8518			`d=000000 -- ! PS:0`
8519			`d=000026 -- ! PC:26 ; vector 24 (Power fail, not used)`
8520			`d=000000 -- ! PS:0`
8521			`d=000032 -- ! PC:32 ; vector 30 (EMT)`
8522			`d=000000 -- ! PS:0`
8523			`d=000036 -- ! PC:36 ; vector 34 (TRAP)`
8524			`d=000000 -- ! PS:0`
8525			`wal 000240 -- vectors: 240,244,250 (trap catcher)`
8526			`brm 6`
8527			`d=000242 -- ! PC:242 ; vector 240 (PIRQ)`
8528			`d=000000 -- ! PS:0`
8529			`d=000246 -- ! PC:246 ; vector 244 (FPU)`
8530			`d=000000 -- ! PS:0`
8531			`d=000252 -- ! PC:252 ; vector 250 (MMU)`
8532			`d=000000 -- ! PS:0`
8533			`#`
8534			`C Verify setup MMU`
8535			`# to avoid seeing AIB bits:`
8536			`# 1. check ARs; 2. re-write ARs to clear AIBs in DRs; 3. check DRs`
8537			`#`
8538			`wal 172340 -- kernel I space AR`
8539			`brm 8`
8540			`d=000000 -- ! 0`
8541			`d=000200 -- ! 200 020000 base`
8542			`d=000400 -- ! 400 040000 base`
8543			`d=000600 -- ! 600 060000 base`
8544			`d=001000 -- ! 1000 100000 base`
8545			`d=001200 -- ! 1200 120000 base`
8546			`d=001400 -- ! 1400 140000 base`
8547			`d=177600 -- !176000 (map to I/O page)`
8548			`#`
8549			`wal 172340 -- kernel I space AR`
8550			`bwm 8`
8551			`000000 -- 0`
8552			`000200 -- 200 020000 base`
8553			`000400 -- 400 040000 base`
8554			`000600 -- 600 060000 base`
8555			`001000 -- 1000 100000 base`
8556			`001200 -- 1200 120000 base`
8557			`001400 -- 1400 140000 base`
8558			`177600 -- 176000 (map to I/O page)`
8559			`#`
8560			`wal 172300 -- kernel I space DR`
8561			`brm 8`
8562			`d=077406 -- ! slf=127; ed=0(up); acf=6(w/r)`
8563			`d=077406 -- ! slf=127; ed=0(up); acf=6(w/r)`
8564			`d=077406 -- ! slf=127; ed=0(up); acf=6(w/r)`
8565			`d=077406 -- ! slf=127; ed=0(up); acf=6(w/r)`
8566			`d=077406 -- ! slf=127; ed=0(up); acf=6(w/r)`
8567			`d=077406 -- ! slf=127; ed=0(up); acf=6(w/r)`
8568			`d=077406 -- ! slf=127; ed=0(up); acf=6(w/r)`
8569			`d=077406 -- ! slf=127; ed=0(up); acf=6(w/r)`
8570			`#`
8571			`wal 000000 -- last cmd shouldn't be 21 or 23 ...`

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