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[/] [w11/] [tags/] [w11a_V0.74/] [rtl/] [w11a/] [tb/] [tb_pdp11core_ubmap.dat] - Blame information for rev 40

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Line No.	Rev	Author	Line
1	37	wfjm	`# $Id: tb_pdp11core_ubmap.dat 674 2015-05-04 16:17:40Z mueller $`
2			`#`
3			`# Revision History:`
4			`# Date Rev Version Comment`
5			`# 2015-05-03 674 1.5 start/stop/suspend overhaul`
6			`# 2008-03-02 121 1.0 extracted from sys/tb/tb_s3board_pdp11core_mem70`
7			`#`
8			`.mode pdpcp`
9			`.tocmd 50`
10			`.tostp 100`
11			`.togo 5000`
12			`.rlmon 0`
13			`.rbmon 0`
14			`#`
15			`.reset`
16			`.wait 10`
17			`.anena 1`
18			`#`
19			`#-----------------------------------------------------------------------------`
20			`C Test 1: Write/Read ubmap registers`
21			`wal 170200`
22			`bwm 64`
23			`177777 -- write all bits`
24			`177777 -- write all bits`
25			`000100 -- map 1`
26			`000001`
27			`000200 -- map 2`
28			`000002`
29			`000300 -- map 3`
30			`000003`
31			`000400 -- map 4`
32			`000004`
33			`000500 -- map 5`
34			`000005`
35			`000600 -- map 6`
36			`000006`
37			`000700 -- map 7`
38			`000007`
39			`001000 -- map 10`
40			`000010`
41			`001100 -- map 11`
42			`000011`
43			`001200 -- map 12`
44			`000012`
45			`001300 -- map 13`
46			`000013`
47			`001400 -- map 14`
48			`000014`
49			`001500 -- map 15`
50			`000015`
51			`001600 -- map 16`
52			`000016`
53			`001700 -- map 17`
54			`000017`
55			`002000 -- map 20`
56			`000020`
57			`002100 -- map 21`
58			`000021`
59			`002200 -- map 22`
60			`000022`
61			`002300 -- map 23`
62			`000023`
63			`002400 -- map 24`
64			`000024`
65			`002500 -- map 25`
66			`000025`
67			`002600 -- map 26`
68			`000026`
69			`002700 -- map 27`
70			`000027`
71			`003000 -- map 30`
72			`000030`
73			`003100 -- map 31`
74			`000031`
75			`003200 -- map 32`
76			`000032`
77			`003300 -- map 33`
78			`000033`
79			`003400 -- map 34`
80			`000034`
81			`003500 -- map 35`
82			`000035`
83			`003600 -- map 36`
84			`000036`
85			`003700 -- map 37`
86			`000037`
87			`wal 170200`
88			`brm 64`
89			`d=177776 -- only 15:01 are writable, bit 0 is 0`
90			`d=000077 -- only 5:00 are writable, upper 10 bits are 0`
91			`d=000100 -- map 1`
92			`d=000001`
93			`d=000200 -- map 2`
94			`d=000002`
95			`d=000300 -- map 3`
96			`d=000003`
97			`d=000400 -- map 4`
98			`d=000004`
99			`d=000500 -- map 5`
100			`d=000005`
101			`d=000600 -- map 6`
102			`d=000006`
103			`d=000700 -- map 7`
104			`d=000007`
105			`d=001000 -- map 10`
106			`d=000010`
107			`d=001100 -- map 11`
108			`d=000011`
109			`d=001200 -- map 12`
110			`d=000012`
111			`d=001300 -- map 13`
112			`d=000013`
113			`d=001400 -- map 14`
114			`d=000014`
115			`d=001500 -- map 15`
116			`d=000015`
117			`d=001600 -- map 16`
118			`d=000016`
119			`d=001700 -- map 17`
120			`d=000017`
121			`d=002000 -- map 20`
122			`d=000020`
123			`d=002100 -- map 21`
124			`d=000021`
125			`d=002200 -- map 22`
126			`d=000022`
127			`d=002300 -- map 23`
128			`d=000023`
129			`d=002400 -- map 24`
130			`d=000024`
131			`d=002500 -- map 25`
132			`d=000025`
133			`d=002600 -- map 26`
134			`d=000026`
135			`d=002700 -- map 27`
136			`d=000027`
137			`d=003000 -- map 30`
138			`d=000030`
139			`d=003100 -- map 31`
140			`d=000031`
141			`d=003200 -- map 32`
142			`d=000032`
143			`d=003300 -- map 33`
144			`d=000033`
145			`d=003400 -- map 34`
146			`d=000034`
147			`d=003500 -- map 35`
148			`d=000035`
149			`d=003600 -- map 36`
150			`d=000036`
151			`d=003700 -- map 37`
152			`d=000037`
153			`#`
154			`#-----------------------------------------------------------------------------`
155			`C Test 2: Write/Read memory via bwm/brm and Unibus map`
156			`#`
157			`wal 170200 -- setup test map`
158			`bwm 4`
159			`000000 -- map 0: 000000 -> 000000`
160			`000000 --`
161			`004000 -- map 1: 020000 -> 004000`
162			`000000`
163			`wal 170200 -- verify test map`
164			`brm 4`
165			`d=000000 -- map 0`
166			`d=000000 --`
167			`d=004000 -- map 1`
168			`d=000000`
169			`#`
170			`C Test 2.1 write/read with ubmap off in MMU`
171			`#`
172			`wal 020000 -- Page 1`
173			`wah 000200 -- ubmap=1`
174			`bwm 4`
175			`000100`
176			`000101`
177			`000102`
178			`000103`
179			`wal 020000`
180			`brm 4`
181			`d=000100`
182			`d=000101`
183			`d=000102`
184			`d=000103`
185			`#`
186			`C Test 2.2 write/read with ubmap on in MMU`
187			`#`
188			`wal 172516 -- SSR3`
189			`wm 000040 -- set ubmap=1`
190			`wal 020000 -- Page 1`
191			`wah 000200 -- ubmap=1`
192			`bwm 4`
193			`000200`
194			`000201`
195			`000202`
196			`000203`
197			`wal 020000 -- check that old transfer data unchanged`
198			`brm 4`
199			`d=000100`
200			`d=000101`
201			`d=000102`
202			`d=000103`
203			`wal 004000 -- 020000 was mapped to 004000, check data`
204			`brm 4`
205			`d=000200`
206			`d=000201`
207			`d=000202`
208			`d=000203`
209			`#-----------------------------------------------------------------------------`
210			`C Test 3: Write/Read memory via bwm/brm and Unibus map while CPU running`
211			`C Setup trap catchers`
212			`#`
213			`# FU DATA C`
214			`wal 000004 -- vectors: 4...34 (trap catcher)`
215			`bwm 14`
216			`000006 -- PC:06 ; vector 4`
217			`000000 -- PS:0`
218			`000012 -- PC:12 ; vector 10`
219			`000000 -- PS:0`
220			`000016 -- PC:16 ; vector 14 (T bit; BPT)`
221			`000000 -- PS:0`
222			`000022 -- PC:22 ; vector 20 (IOT)`
223			`000000 -- PS:0`
224			`000026 -- PC:26 ; vector 24 (Power fail, not used)`
225			`000000 -- PS:0`
226			`000032 -- PC:32 ; vector 30 (EMT)`
227			`000000 -- PS:0`
228			`000036 -- PC:36 ; vector 34 (TRAP)`
229			`000000 -- PS:0`
230			`wal 000240 -- vectors: 240,244,250 (trap catcher)`
231			`bwm 6`
232			`000242 -- PC:242 ; vector 240 (PIRQ)`
233			`000000 -- PS:0`
234			`000246 -- PC:246 ; vector 244 (FPU)`
235			`000000 -- PS:0`
236			`000252 -- PC:252 ; vector 250 (MMU)`
237			`000000 -- PS:0`
238			`#`
239			`C Setup Code`
240			`#`
241			`wal 002000`
242			`bwm 7`
243			`005211 -- inc (r1) ; increment a mem location`
244			`005312 -- dec (r2) ; decrement a ubus location`
245			`005700 -- tst r0 ; test for loop`
246			`001774 -- beq .-4 ; loop while r0=0`
247			`011103 -- mov (r1),r3 ; sum mem and ubus location`
248			`061203 -- add (r2),r3 ; r3 should be 0`
249			`000000 -- halt`
250			`#`
251			`C Start Code`
252			`wr0 000000 -- 0 for looping`
253			`wr1 002100 -- a mem addr`
254			`wr2 172256 -- a ubus addr: MMU SM mode AR page 7 (is a 16bit r/w reg)`
255			`wpc 002000`
256			`sta -- 'start' does no reset (keeps SSR3.ubmap=1)`
257			`#`
258			`wal 020200 -- Page 1`
259			`wah 000200 -- ubmap=1`
260			`bwm 16`
261			`000300`
262			`000301`
263			`000302`
264			`000303`
265			`000304`
266			`000305`
267			`000306`
268			`000307`
269			`000310`
270			`000311`
271			`000312`
272			`000313`
273			`000314`
274			`000315`
275			`000316`
276			`000317`
277			`#`
278			`wr0 000001 -- 1 for stop looping`
279			`wtgo -- wait for cpu halt`
280			`#`
281			`rpc d=002016 -- ! pc`
282			`wal 002100 -- check mem loc (for visual inspection)`
283			`rm d=-`
284			`wal 172256 -- check ubus loc (for visual inspection)`
285			`rm d=-`
286			`rr3 d=000000 -- ! r3 (is sum of mem and ubus location)`
287			`#`
288			`wal 004200 -- 020200 was mapped to 004200, check data`
289			`brm 16`
290			`d=000300`
291			`d=000301`
292			`d=000302`
293			`d=000303`
294			`d=000304`
295			`d=000305`
296			`d=000306`
297			`d=000307`
298			`d=000310`
299			`d=000311`
300			`d=000312`
301			`d=000313`
302			`d=000314`
303			`d=000315`
304			`d=000316`
305			`d=000317`

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[/] [w11/] [tags/] [w11a_V0.74/] [rtl/] [w11a/] [tb/] [tb_pdp11core_ubmap.dat] - Blame information for rev 40