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wfjm |
# $Id: tb_rlink_tba_pdp11core_stim.dat 805 2016-09-03 08:09:52Z mueller $
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#
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# Revision History:
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# Date Rev Version Comment
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# 2015-05-08 675 1.5 start/stop/suspend overhaul
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# 2014-12-26 621 1.4 adopt wmembe,ribr,wibr testing to new 4k window
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# 2014-12-20 614 1.6 now for rlink v4 iface
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# 2014-08-15 583 1.5 rb_mreq addr now 16 bit
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# 2014-07-31 576 1.4.1 only one data item per line after rblk/wblk
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# 2010-06-13 305 1.4 adapt to new rri<->cp implementation
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# 2008-05-03 143 1.3.4 adapt to new cpurust code for reset
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# 2008-04-27 140 1.3.3 adapt to new stat interface (with cpursta)
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# 2008-02-24 119 1.3.2 added lah,rps,wps command definition; use them
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# 2008-01-20 113 1.3.1 CPU attn now on bit 0
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# 2007-11-24 98 1.3 adapt to new internal init handling
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# 2007-09-16 83 1.2.2 add 'rst' at end to get back into ground state
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# 2007-09-02 79 1.2.1 add '.mode' command
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# 2007-08-12 74 1.2 test LAM and attn handling
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# 2007-08-10 72 1.1.1 renamed to tb_rritba_pdp11core_stim.dat
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# 2007-07-29 70 1.1 use .amdef now
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# 2007-07-28 69 1.0 Initial version
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#
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.mode rri
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.wait 5
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.rlmon 0
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.rbmon 0
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.cmax 32
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#
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# setup address mnemonics
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.amclr
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#
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.amdef conf 0000000000000000
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.amdef cntl 0000000000000001
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.amdef stat 0000000000000010
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.amdef psw 0000000000000011
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.amdef al 0000000000000100
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.amdef ah 0000000000000101
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.amdef mem 0000000000000110
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.amdef memi 0000000000000111
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#
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.amdef r0 0000000000001000
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.amdef r1 0000000000001001
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.amdef r2 0000000000001010
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.amdef r3 0000000000001011
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.amdef r4 0000000000001100
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.amdef r5 0000000000001101
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.amdef sp 0000000000001110
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.amdef pc 0000000000001111
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#
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# setup stat check default
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.sdef s=00000000
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#
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C cmderr
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C |cmdmerr
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C ||cpususp
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C |||cpugo
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C ||||attention flags set
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C |||||rbtout
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C ||||||rbnak
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C |||||||rberr
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C ||||||||
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C 00000000
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C
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C cmd addr ----stat ------------data ---check---
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C
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C ----------------------------------------------------------------------------
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C write registers
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#
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wreg .r0 o"000001" -- set r0
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wreg .r1 o"000101" -- set r1
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wreg .r2 o"000201" -- set r2
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wreg .r3 o"000301" -- set r3
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wreg .r4 o"000401" -- set r4
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wreg .r5 o"000501" -- set r5
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wreg .sp o"000601" -- set sp
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wreg .pc o"000701" -- set pc
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C ---------------------------------------------------------------------------
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C read registers
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#
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rreg .r0 d=o"000001" -- ! r0
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rreg .r1 d=o"000101" -- ! r1
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rreg .r2 d=o"000201" -- ! r2
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rreg .r3 d=o"000301" -- ! r3
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rreg .r4 d=o"000401" -- ! r4
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rreg .r5 d=o"000501" -- ! r5
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rreg .sp d=o"000601" -- ! sp
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rreg .pc d=o"000701" -- ! pc
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C ---------------------------------------------------------------------------
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C write memory (via wreg, use wreg/memi)
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#
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wreg .al o"002000" -- write mem(2000,...,2006)
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wreg .memi o"007700"
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wreg .memi o"007710"
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wreg .memi o"007720"
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wreg .memi o"007730"
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C ----------------------------------------------------------------------------
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C read memory (via rreg, use rreg/memi)
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#
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wreg .al o"002000"
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rreg .memi d=o"007700"
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rreg .memi d=o"007710"
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rreg .memi d=o"007720"
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rreg .memi d=o"007730"
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C ----------------------------------------------------------------------------
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C write memory (via wblk)
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#
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wreg .al o"002010" -- write mem(2010,...,2016)
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wblk .memi 4
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o"007740"
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o"007750"
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o"007760"
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o"007770"
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C ----------------------------------------------------------------------------
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C read memory (via rblk)
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#
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wreg .al o"002000"
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rblk .memi 8
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d=o"007700"
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d=o"007710"
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d=o"007720"
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d=o"007730"
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d=o"007740"
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d=o"007750"
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d=o"007760"
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d=o"007770"
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C ----------------------------------------------------------------------------
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C read/write PSW via various mechanisms
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128 |
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C via wps/rps
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wreg .psw o"000017"
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rreg .psw d=o"000017"
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wreg .psw o"000000"
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rreg .psw d=o"000000"
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#
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C via 16bit cp addressing (al 177776)
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wreg .al o"177776" -- addr=psw
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wreg .mem o"000017" -- set all cc flags in psw
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rreg .mem d=o"000017" -- ! psw
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rreg .psw d=o"000017"
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wreg .mem o"000000" -- clear all cc flags in psw
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rreg .mem d=o"000000" -- ! psw
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rreg .psw d=o"000000"
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#
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C via 22bit cp addressing (al 177776; ah 177)
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wreg .al o"177776" -- addr=psw
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wreg .ah o"000177"
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wreg .mem o"000017" -- set all cc flags in psw
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rreg .mem d=o"000017" -- ! psw
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rreg .psw d=o"000017"
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wreg .mem o"000000" -- clear all cc flags in psw
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rreg .mem d=o"000000" -- ! psw
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rreg .psw d=o"000000"
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C ----------------------------------------------------------------------------
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C write register set 1, sm,um stack
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#
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wreg .psw o"004000" -- psw: cm=kernel, set=1
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wreg .r0 o"010001" -- set r0 = 010001
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wreg .r1 o"010101" -- set r1 = 010101
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wreg .r2 o"010201" -- set r2 = 010201
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wreg .r3 o"010301" -- set r3 = 010301
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wreg .r4 o"010401" -- set r4 = 010401
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wreg .r5 o"010501" -- set r5 = 010501
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wreg .psw o"044000" -- psw: cm=super(01),set=1
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wreg .sp o"010601" -- set ssp = 010601
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wreg .psw o"144000" -- psw: cm=user(11),set=1
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wreg .sp o"110601" -- set isp = 110601
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C ----------------------------------------------------------------------------
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167 |
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C read all registers set 0/1, km,sm,um stack
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168 |
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#
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wreg .psw o"000000" -- psw: cm=kernel(00),set=0
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rreg .r0 d=o"000001" -- ! r0
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rreg .r1 d=o"000101" -- ! r1
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rreg .r2 d=o"000201" -- ! r2
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rreg .r3 d=o"000301" -- ! r3
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rreg .r4 d=o"000401" -- ! r4
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rreg .r5 d=o"000501" -- ! r5
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rreg .sp d=o"000601" -- ! ksp
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rreg .pc d=o"000701" -- ! pc
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#
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wreg .psw o"040000" -- psw: cm=super(01),set=0
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rreg .sp d=o"010601" -- ! ssp
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wreg .psw o"140000" -- psw: cm=user(11),set=0
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rreg .sp d=o"110601" -- ! usp
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#
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wreg .psw o"144000" -- psw: cm=user(11),set=1
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rreg .r0 d=o"010001" -- ! r0
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rreg .r1 d=o"010101" -- ! r1
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rreg .r2 d=o"010201" -- ! r2
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rreg .r3 d=o"010301" -- ! r3
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rreg .r4 d=o"010401" -- ! r4
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rreg .r5 d=o"010501" -- ! r5
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#
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wreg .psw o"000000" -- psw=000000;
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C ----------------------------------------------------------------------------
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C write,read IB space: : MMU SAR supervisor mode (16 bit regs)
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#
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wreg .al o"172240" -- addr=172240; SM I addr reg
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wreg .memi o"012340" -- set 012340
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wreg .memi o"012342" -- set 012342
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wreg .memi o"012344" -- set 012344
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#
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wreg .al o"172240" -- addr=172240; SM I addr reg
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rreg .memi d=o"012340" -- ! 012340
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rreg .memi d=o"012342" -- ! 012342
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rreg .memi d=o"012344" -- ! 012344
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C ----------------------------------------------------------------------------
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C load simple test code 1: "1$:inc r1; sob r0,1$; halt"
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#
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wreg .al o"002100" -- addr=002100
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wreg .memi o"005201" -- inc r1
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wreg .memi o"077002" -- sob r0,-2
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wreg .memi o"000000" -- halt
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C exec test code 1 w/ r0=2; wait 50 cycle; test regs
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#
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wreg .r0 o"000002" -- set r0 = 2
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wreg .r1 o"000000" -- set r1 = 0
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wreg .pc o"002100" -- set pc = 2100
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wreg .cntl o"000001" s=00010000 -- start (cpfunc_start=00001)
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218 |
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.wait 50
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rreg .r0 d=o"000000" s=00001000 -- ! r0=0
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220 |
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rreg .r1 d=o"000002" s=00001000 -- ! r1=2
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221 |
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rreg .pc d=o"002106" s=00001000 -- ! pc=002106
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222 |
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attn d=o"000001" s=00000000 -- read/clean LAM's
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223 |
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wreg .cntl o"000004" -- reset (cpfunc_creset=00100)
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224 |
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C ----------------------------------------------------------------------------
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225 |
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C single step through test code 1
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226 |
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#
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227 |
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wreg .r0 o"000003" -- set r0 = 3
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228 |
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wreg .r1 o"000000" -- set r1 = 0
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wreg .pc o"002100" -- set pc = 2100
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#
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231 |
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wreg .cntl o"000003" -- step over inc (cpfunc_step=00011)
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rreg .r0 d=o"000003" -- ! r0=3
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rreg .r1 d=o"000001" -- ! r1=1
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rreg .pc d=o"002102" -- ! pc=002102
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#
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236 |
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wreg .cntl o"000003" -- step over sob (cpfunc_step=00011)
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237 |
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rreg .r0 d=o"000002" -- ! r0=2
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238 |
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rreg .r1 d=o"000001" -- ! r1=1
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239 |
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rreg .pc d=o"002100" -- ! pc=002100
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240 |
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#
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241 |
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wreg .cntl o"000003" -- step over inc
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242 |
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wreg .cntl o"000003" -- step over sob
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243 |
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rreg .r0 d=o"000001" -- ! r0=1
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244 |
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rreg .r1 d=o"000002" -- ! r1=2
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245 |
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rreg .pc d=o"002100" -- ! pc=002100
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246 |
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C ----------------------------------------------------------------------------
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247 |
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C execute code 1, test stat command while it runs
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248 |
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#
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249 |
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wreg .r0 o"000005" -- set r0 = 5
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250 |
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wreg .r1 o"000000" -- set r1 = 0
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251 |
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wreg .pc o"002100" -- set pc = 2100
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252 |
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wreg .cntl o"000001" s=00010000 -- start (cpfunc_start=00001)
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253 |
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#rreg .stat d=0000000000000100 s=00000000 -- possible w/ tb, not FPGA !!
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254 |
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rreg .stat d=- s=- --
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255 |
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rreg .stat d=- s=- --
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256 |
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rreg .stat d=- s=- -- somewhere the code will stop
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257 |
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rreg .stat d=- s=- --
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258 |
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rreg .stat d=- s=- --
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259 |
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rreg .stat d=0000000000010000 s=00001000 -- ! cpurust=0001
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260 |
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rreg .r0 d=o"000000" s=00001000 -- ! r0=0
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261 |
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rreg .r1 d=o"000005" s=00001000 -- ! r1=5
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262 |
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rreg .pc d=o"002106" s=00001000 -- ! pc=002106
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263 |
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attn d=o"000001" s=00000000 -- read/clean LAM's
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264 |
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wreg .cntl o"000004" -- init (cpfunc_creset=00100)
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265 |
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rreg .stat d=0000000000000000 -- ! cpurust=0000
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266 |
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C ----------------------------------------------------------------------------
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267 |
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C execute code 1, look for attn comma to happen
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268 |
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#
|
269 |
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wreg x"ffff" x"8000" -- set rlink anena=1
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270 |
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wreg .r0 o"000005" -- set r0 = 5
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271 |
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wreg .r1 o"000000" -- set r1 = 0
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272 |
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wreg .pc o"002100" -- set pc = 2100
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273 |
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wreg .cntl o"000001" s=00010000 -- start (cpfunc_start=00001)
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274 |
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.eop
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275 |
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.wtlam 100
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276 |
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rreg .stat d=0000000000010000 s=00001000 -- ! cpurust=0001
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277 |
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rreg .r0 d=o"000000" s=00001000 -- ! r0=0
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278 |
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rreg .r1 d=o"000005" s=00001000 -- ! r1=5
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279 |
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rreg .pc d=o"002106" s=00001000 -- ! pc=002106
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280 |
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attn d=o"000001" s=00000000 -- read/clean LAM's
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281 |
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wreg .cntl o"000004" -- init (cpfunc_creset=00100)
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282 |
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rreg .stat d=0000000000000000 -- ! cpurust=0000
|
283 |
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C ----------------------------------------------------------------------------
|
284 |
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C load test code 2 for single step testing of 'slow' instructions
|
285 |
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#
|
286 |
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wreg .al o"002200" -- addr=002200
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287 |
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wblk .memi 13
|
288 |
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o"067070" -- add @0(r0),@6(r0)
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289 |
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o"000000"
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290 |
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o"000006"
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291 |
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o"067070" -- add @2(r0),@6(r0)
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292 |
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#2210
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293 |
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o"000002"
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294 |
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o"000006"
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295 |
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o"067070" -- add @4(r0),@6(r0)
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296 |
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o"000004"
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297 |
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#2220
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298 |
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o"000006"
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299 |
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o"067070" -- add @0(r0),@6(r0)
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300 |
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o"000000"
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301 |
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o"000006"
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302 |
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#2230
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303 |
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o"000000" -- halt
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304 |
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#
|
305 |
|
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wreg .al o"002240" -- addr=002240
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306 |
|
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wblk .memi 12
|
307 |
|
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o"002260" -- addresses used by add's
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308 |
|
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o"002262"
|
309 |
|
|
o"002264"
|
310 |
|
|
o"002266"
|
311 |
|
|
#2250
|
312 |
|
|
d"1" -- some data to test d"nnn"
|
313 |
|
|
d"-1"
|
314 |
|
|
x"dead"
|
315 |
|
|
x"beaf"
|
316 |
|
|
#2260
|
317 |
|
|
o"000010" -- input data used by add's
|
318 |
|
|
o"000100"
|
319 |
|
|
o"001000"
|
320 |
|
|
o"000001" -- result of add's
|
321 |
|
|
C ----------------------------------------------------------------------------
|
322 |
|
|
C single step through test code 2
|
323 |
|
|
#
|
324 |
|
|
wreg .pc o"002200" -- set pc = 2200
|
325 |
|
|
wreg .r0 o"002240" -- set r0 = 2240
|
326 |
|
|
wreg .cntl o"000003" -- step over 1st add (cpfunc_step=00011)
|
327 |
|
|
wreg .cntl o"000003" -- step over 2nd add (cpfunc_step=00011)
|
328 |
|
|
wreg .cntl o"000003" -- step over 3rd add (cpfunc_step=00011)
|
329 |
|
|
#
|
330 |
|
|
rreg .r0 d=o"002240" -- ! r0=2240
|
331 |
|
|
rreg .pc d=o"002222" -- ! pc=002222
|
332 |
|
|
wreg .al o"002240" -- addr=002240
|
333 |
|
|
rblk .memi 12
|
334 |
|
|
d=- -- skip over pointers, test tag=-
|
335 |
|
|
d=-
|
336 |
|
|
d=-
|
337 |
|
|
d=-
|
338 |
|
|
d=b"0000000000000001" -- verify data written with d"nn"
|
339 |
|
|
d=b"1111111111111111"
|
340 |
|
|
d=x"dead" -- check data written with x"nn"
|
341 |
|
|
d=x"beaf"
|
342 |
|
|
d=o"000010" -- input data used by add's
|
343 |
|
|
d=o"000100"
|
344 |
|
|
d=o"001000"
|
345 |
|
|
d=o"001111" -- result of add's
|
346 |
|
|
#
|
347 |
|
|
wreg .cntl o"000003" -- step over 4th add (cpfunc_step=00011)
|
348 |
|
|
wreg .cntl o"000003" s=00000000 -- step over halt (cpfunc_step=00011)
|
349 |
|
|
rreg .pc d=o"002232" s=00000000 -- ! pc=002232
|
350 |
|
|
wreg .al o"002260" s=00000000 -- addr=002260
|
351 |
|
|
rblk .memi 4 s=00000000
|
352 |
|
|
d=o"000010" -- input data used by add's
|
353 |
|
|
d=o"000100"
|
354 |
|
|
d=o"001000"
|
355 |
|
|
d=o"001121" -- result of add's
|
356 |
|
|
C ----------------------------------------------------------------------------
|
357 |
|
|
C finally stop and init CPU (clears cpuhalt flag)
|
358 |
|
|
wreg .cntl o"000002" -- stop (cpfunc_stop=00010)
|
359 |
|
|
wreg .cntl o"000004" -- init (cpfunc_creset=00100)
|