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[/] [wb2axip/] [trunk/] [bench/] [cpp/] [aximemsim.h] - Blame information for rev 12

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1 8 dgisselq
////////////////////////////////////////////////////////////////////////////////
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//
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// Filename:    aximemsim.h
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//
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// Project:     Pipelined Wishbone to AXI converter
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//
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// Purpose:     To attempt to emulate how the MIG responds to AXI requests.
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//              Of course, this is written with no knowledge of how MIG actually
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//      responds, just a touch of knowledge regarding how a DDR3 memory works,
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//      so ... your mileage might vary.
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//
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// Creator:     Dan Gisselquist, Ph.D.
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//              Gisselquist Technology, LLC
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//
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////////////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2016, Gisselquist Technology, LLC
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//
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// This program is free software (firmware): you can redistribute it and/or
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// modify it under the terms of  the GNU General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or (at
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// your option) any later version.
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//
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// This program is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with this program.  (It's in the $(ROOT)/doc directory, run make with no
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// target there if the PDF file isn't present.)  If not, see
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// <http://www.gnu.org/licenses/> for a copy.
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//
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// License:     GPL, v3, as defined and found on www.gnu.org,
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//              http://www.gnu.org/licenses/gpl.html
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//
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//
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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#ifndef AXIMEMSIM_H
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#define AXIMEMSIM_H
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typedef struct {
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        unsigned        addr;
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        int             id, len, size, burst, lock, cache, prot, qos;
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        bool            ready, valid;
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} AXI_AWBUS;
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typedef struct {
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        unsigned        addr;
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        int             id, len, size, burst, lock, cache, prot, qos;
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        bool            ready, valid;
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} AXI_ARBUS;
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typedef struct {
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        int             strb;
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        unsigned        data[4];        // 128 bits
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        int             ready, valid, last;
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} AXI_WBUS;
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typedef struct {
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        int             id, resp;
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        int             ready, valid;
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} AXI_WRESP;
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typedef struct {
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        int             id, resp;
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        unsigned        data[4];        // 128 bits
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        int             ready, valid, last;
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} AXI_RDATA;
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typedef struct  {
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        AXI_AWBUS       aw;
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        AXI_ARBUS       ar;
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        AXI_WBUS        w;
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        AXI_WRESP       b;
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        AXI_RDATA       r;
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} AXIBUS;
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class   AXIMEMSIM {
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        unsigned        *m_mem;
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public:
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        AXIMEMSIM(unsigned abits);
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        void    apply(AXIBUS &bus);
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};
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#endif

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