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/////////////////////////////////////////////////////////////////////
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//// ////
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//// WISHBONE DMA Priority Encoder Sub-Module ////
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//// ////
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//// ////
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//// Author: Rudolf Usselmann ////
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//// rudi@asics.ws ////
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//// ////
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//// ////
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//// Downloaded from: http://www.opencores.org/cores/wb_dma/ ////
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//// ////
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/////////////////////////////////////////////////////////////////////
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//// ////
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//// Copyright (C) 2001 Rudolf Usselmann ////
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//// rudi@asics.ws ////
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//// ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer.////
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//// ////
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//// THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY ////
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//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED ////
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//// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS ////
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//// FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR ////
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//// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, ////
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//// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ////
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//// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE ////
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//// GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR ////
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//// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ////
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//// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ////
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//// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT ////
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//// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ////
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//// POSSIBILITY OF SUCH DAMAGE. ////
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//// ////
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/////////////////////////////////////////////////////////////////////
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// CVS Log
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//
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// $Id: wb_dma_pri_enc_sub.v,v 1.1 2001-08-07 08:00:43 rudi Exp $
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//
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// $Date: 2001-08-07 08:00:43 $
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// $Revision: 1.1 $
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// $Author: rudi $
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// $Locker: $
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// $State: Exp $
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//
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// Change History:
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// $Log: not supported by cvs2svn $
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//
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//
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//
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//
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//
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`include "wb_dma_defines.v"
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// Priority Encoder
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//
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// Determines the channel with the highest priority, also takes
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// the valid bit in consideration
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module wb_dma_pri_enc_sub(valid, pri_in, pri_out);
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input valid;
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input [2:0] pri_in;
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output [7:0] pri_out;
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reg [7:0] pri_out;
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`ifdef PRI_8
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always @(valid or pri_in)
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if(!valid) pri_out = 8'b0000_0001;
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else
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if(pri_in==3'h0) pri_out = 8'b0000_0001;
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else
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if(pri_in==3'h1) pri_out = 8'b0000_0010;
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else
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if(pri_in==3'h2) pri_out = 8'b0000_0100;
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else
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if(pri_in==3'h3) pri_out = 8'b0000_1000;
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else
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if(pri_in==3'h4) pri_out = 8'b0001_0000;
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else
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if(pri_in==3'h5) pri_out = 8'b0010_0000;
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else
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if(pri_in==3'h6) pri_out = 8'b0100_0000;
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else pri_out = 8'b1000_0000;
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`else
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`ifdef PRI_4
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always @(valid or pri_in)
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if(!valid) pri_out = 8'b0000_0001;
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else
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if(pri_in==3'h0) pri_out = 8'b0000_0001;
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else
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if(pri_in==3'h1) pri_out = 8'b0000_0010;
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else
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if(pri_in==3'h2) pri_out = 8'b0000_0100;
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else pri_out = 8'b0000_1000;
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`else
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always @(valid or pri_in)
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if(!valid) pri_out = 8'b0000_0001;
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else
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if(pri_in==3'h0) pri_out = 8'b0000_0001;
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else pri_out = 8'b0000_0010;
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`endif
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`endif
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endmodule
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