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[/] [wb_fifo/] [trunk/] [model/] [vhdl/] [packages/] [pkg-resolved.vhdl] - Blame information for rev 7

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1 7 daniel.kho
/*      Tauhop resolution package
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        Description
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        Defines common resolution functions.
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        To Do:
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        Author(s):
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        - Daniel C.K. Kho, daniel.kho@tauhop.com
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        Copyright (C) 2012-2014 Authors and Tauhop Solutions.
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        This source file may be used and distributed without
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        restriction provided that this copyright statement is not
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        removed from the file and that any derivative work contains
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        the original copyright notice and the associated disclaimer.
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        This source file is free software; you can redistribute it
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        and/or modify it under the terms of the GNU Lesser General
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        Public License as published by the Free Software Foundation;
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        either version 2.1 of the License, or (at your option) any
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        later version.
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        This source is distributed in the hope that it will be
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        useful, but WITHOUT ANY WARRANTY; without even the implied
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        warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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        PURPOSE. See the GNU Lesser General Public License for more
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        details.
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        You should have received a copy of the GNU Lesser General
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        Public License along with this source; if not, download it
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        from http://www.opencores.org/lgpl.shtml.
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*/
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library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all;
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package resolved is
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        generic(type t);
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        /* unresolved vector of generic type. */
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        type t_vector is array(natural range <>) of t;
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        type unsigned32_vector is array (natural range <>) of unsigned(31 downto 0);
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        type signed32_vector is array (natural range <>) of signed(31 downto 0);
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        type integer_vector is array(natural range <>) of integer;
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        function resolve(s:t_vector) return t;
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        function resolve(s:unsigned32_vector) return unsigned;
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        function resolve(s:integer_vector) return integer;
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        function to_int(u_unsigned: unresolved_unsigned) return integer;
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end package resolved;
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package body resolved is
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        function resolve(s: t_vector) return t is
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                variable result: t;
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        begin
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                for i in s'range loop
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                        for j in s(i)'range loop
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                                if is_LH01(s(i)(j)) then
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                                        if is_LH01(result(j)) then
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                                                report "Multiple driving signals detected." severity warning;
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                                        end if;
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                                        result(j) := s(i)(j);
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                                end if;
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                        end loop;
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                end loop;
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        end function resolve;
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        function resolve(s: unsigned32_vector) return unsigned is
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                variable result: unsigned(31 downto 0);
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        begin
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                for i in s'range loop
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                        if s(i) /= 0 then
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                                if result /= 0 then
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                                        report "Multiple driving signals on unsigned32" severity warning;
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                                end if;
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                                result := s(i);
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                        end if;
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                end loop;
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                return result;
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        end function resolve;
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        function resolve(s:integer_vector) return integer is
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                variable result:integer:=0;
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        begin
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                for i in s'range loop
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                        if s(i) /= 0 then
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                                if result /= 0 then
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                                        report "Multiple driving signals on integer" severity warning;
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                                end if;
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                                result := s(i);
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                        end if;
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                end loop;
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                return result;
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        end function resolve;
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        function to_int(u_unsigned: unresolved_unsigned) return integer is
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                variable result: natural:=0;
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        begin
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                for i in u_unsigned'range loop
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                        result := result+result;
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                        if u_unsigned(i) = '1' then
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                                result := result + 1;
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                        end if;
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                end loop;
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                return result;
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        end function to_int;
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end package body resolved;

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