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#!/bin/bash
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#
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# Example bash script for Mentor Graphics QuestaSim/ModelSim simulation.
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#
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# Author(s):
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# - Daniel C.K. Kho, daniel.kho@opencores.org | daniel.kho@tauhop.com
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#
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# Copyright (C) 2012-2013 Authors and OPENCORES.ORG
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#
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# This program is free software: you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation, either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program. If not, see <http://www.gnu.org/licenses/>.
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#
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# This notice and disclaimer must be retained as part of this text at all times.
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#
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# @dependencies:
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# @designer: Daniel C.K. Kho [daniel.kho@gmail.com] | [daniel.kho@tauhop.com]
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# @history: @see Mercurial log for full list of changes.
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#
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# @Description:
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#
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ROOT_PATH=$PWD
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MODEL_SRC_PATH=$ROOT_PATH/../model
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VHDL_SRC_PATH=$ROOT_PATH/../hw/vhdl
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TB_SRC_PATH=$ROOT_PATH/../hw/tester
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#set COMMONFILES_PATH = $SRC_PATH/common
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# model files
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#set MODEL_FILES = $SRC_PATH/*.sagews $SRC_PATH/*.m $SRC_PATH/*.c
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# vhdl files
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#VHDL_FILES = $(SRC_PATH)/*.vhdl
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#COMMON_VHDL_FILES = $(COMMONFILES_PATH)/*.vhdl
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# build options
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GHDL_BUILD_OPTS=--std=02
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QUESTA_BUILD_OPTS=-2008
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DC_BUILD_OPTS=
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VCS_BUILD_OPTS=-vhdl08
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# Simulation break condition
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GHDL_SIM_OPTS=--assert-level=error
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#GHDL_SIM_OPTS = --stop-time=5us #500ns
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# Workspaces
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#SIM_PATH = $(ROOT_PATH)/simulation/ghdl
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#SYNTH_PATH = $(ROOT_PATH)/synthesis/vivado
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VCS_SIM_PATH=$ROOT_PATH/simulation/vcs-mx
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QUESTA_SIM_PATH=$ROOT_PATH/simulation/questa
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DC_SYNTH_PATH=$ROOT_PATH/synthesis/dc
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##read -p "press Enter to run full simulation now, or Ctrl-C to exit: ";
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#echo $(date "+[%Y-%m-%d %H:%M:%S]: Removing previously-generated files and folders...");
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#rm -rf *./simulate.log ./work ./altera ./osvvm ./tauhop;
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#
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#echo $(date "+[%Y-%m-%d %H:%M:%S]: Remove successful.");
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#echo $(date "+[%Y-%m-%d %H:%M:%S]: Compiling project...");
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#vlib work; vmap work work;
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#vlib tauhop; vmap tauhop tauhop;
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#vlib osvvm; vmap osvvm osvvm;
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isNotExists_vhdlan=`hash vhdlan 2>&1 | grep >&1 "not found"` ;
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if [ `echo ${#isNotExists_vhdlan}` -gt 0 ]
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then echo "Warning: vhdlan not installed. Skipping compilation for VCS.";
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else
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echo "Starting VCS compile..."
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vhdlan $VCS_BUILD_OPTS -work tauhop 2>&1 \
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$VHDL_SRC_PATH/packages/tauhop/pkg-tlm.vhdl \
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$VHDL_SRC_PATH/packages/tauhop/pkg-dsp.vhdl \
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| tee -ai $VCS_SIM_PATH/simulate.log;
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vhdlan $VCS_BUILD_OPTS -work work 2>&1 \
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$VHDL_SRC_PATH/flight-controller.vhdl \
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| tee -ai $VCS_SIM_PATH/simulate.log;
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errorStr=`grep "Error-\[" $1/simulate.log`;
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if [ `echo ${#errorStr}` -gt 0 ]
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then echo "Errors exist. Refer simulate.log for more details. Exiting."; exit;
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else
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echo $(date "+[%Y-%m-%d %H:%M:%S]: Running simulation...");
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#vcs -R -debug_all work.system 2>&1 \
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vcs -debug_all work.system 2>&1 \
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| tee -ai $1/simulate.log;
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$1/simv -gui -dve_opt -session=./view-04212015.tcl -dve_opt -cmd=run 2>&1 \
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| tee -ai $1/simulate.log;
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echo $(date "+[%Y-%m-%d %H:%M:%S]: simulation loaded.");
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fi
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fi
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isNotExists_vcom=`hash vcom 2>&1 | grep >&1 "not found"` ;
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#isNotExists_vcom=`hash vhdlan 2>/dev/null || { echo >&2 "Warning: vcom not installed. Skipping compilation for Questa/ModelSim."; }`;
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if [ `echo ${#isNotExists_vcom}` -gt 0 ]
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then echo "Warning: vcom not installed. Skipping compilation for Questa/ModelSim.";
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else
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echo "Starting Questa/ModelSim compile..."
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cd $QUESTA_SIM_PATH;
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#read -p "press Enter to run full simulation now, or Ctrl-C to exit: ";
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echo $(date "+[%Y-%m-%d %H:%M:%S]: Removing previously-generated files and folders...");
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rm -rf ./transcript ./simulate.log ./work ./altera ./osvvm ./tauhop;
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echo $(date "+[%Y-%m-%d %H:%M:%S]: Remove successful.");
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echo $(date "+[%Y-%m-%d %H:%M:%S]: Compiling project...");
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vlib work; vmap work work;
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vlib tauhop; vmap tauhop tauhop;
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vlib osvvm; vmap osvvm osvvm;
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#vcom $QUESTA_BUILD_OPTS -work osvvm 2>&1 \
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# $VHDL_SRC_PATH/packages/os-vvm/SortListPkg_int.vhd \
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# $VHDL_SRC_PATH/packages/os-vvm/RandomBasePkg.vhd \
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# $VHDL_SRC_PATH/packages/os-vvm/RandomPkg.vhd \
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# $VHDL_SRC_PATH/packages/os-vvm/CoveragePkg.vhd \
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# | tee -ai ./simulate.log;
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# Pass the simulation path into script.
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eval 2>&1 "vcom $QUESTA_BUILD_OPTS -work osvvm \
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$(cat ../osvvm.f)" \
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| tee -ai ./simulate.log;
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#vcom -2008 -work tauhop $VHDL_SRC_PATH/packages/pkg-types.vhdl \
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eval 2>&1 "vcom $QUESTA_BUILD_OPTS -work tauhop \
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$(cat ../tauhop.f)" \
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| tee -ai ./simulate.log;
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#../../model/vhdl/packages/pkg-resolved.vhdl \
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eval 2>&1 "vcom $QUESTA_BUILD_OPTS -work work \
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$(cat ../work.f)" \
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| tee -ai ./simulate.log;
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errorStr=`grep "\*\* Error: " ./simulate.log`
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if [ `echo ${#errorStr}` -gt 0 ]
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then echo "Errors exist. Refer simulate.log for more details. Exiting."; exit;
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else
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echo $(date "+[%Y-%m-%d %H:%M:%S]: Running simulation...");
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vsim -i -t fs -do ./waves.do -voptargs="+acc" "work.testbench(simulation)" 2>&1 \
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| tee -ai ./simulate.log &
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#vsim -t ps -voptargs="+acc" "tauhop.fifo(rtl)";
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#vsim -t ps -voptargs="+acc" "work.testbench(simulation)";
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echo $(date "+[%Y-%m-%d %H:%M:%S]: simulation loaded.");
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fi
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fi
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