URL
https://opencores.org/ocsvn/wb_lpc/wb_lpc/trunk
Details |
Compare with Previous |
View Log
Line No. |
Rev |
Author |
Line |
1 |
7 |
hharte |
#PACE: Start of Constraints generated by PACE
|
2 |
|
|
|
3 |
|
|
#PACE: Start of PACE I/O Pin Assignments
|
4 |
|
|
NET "DISP_LED<0>" LOC = "AB20" | IOSTANDARD = LVCMOS33 ;
|
5 |
|
|
NET "DISP_LED<1>" LOC = "AA20" | IOSTANDARD = LVCMOS33 ;
|
6 |
|
|
NET "DISP_LED<2>" LOC = "V18" | IOSTANDARD = LVCMOS33 ;
|
7 |
|
|
NET "DISP_LED<3>" LOC = "Y17" | IOSTANDARD = LVCMOS33 ;
|
8 |
|
|
NET "DISP_LED<4>" LOC = "AB18" | IOSTANDARD = LVCMOS33 ;
|
9 |
|
|
NET "DISP_LED<5>" LOC = "AA18" | IOSTANDARD = LVCMOS33 ;
|
10 |
|
|
NET "DISP_LED<6>" LOC = "W18" | IOSTANDARD = LVCMOS33 ;
|
11 |
|
|
NET "DISP_SEL<0>" LOC = "AA17" | IOSTANDARD = LVCMOS33 ;
|
12 |
|
|
NET "DISP_SEL<1>" LOC = "U17" | IOSTANDARD = LVCMOS33 ;
|
13 |
|
|
NET "DISP_SEL<2>" LOC = "U16" | IOSTANDARD = LVCMOS33 ;
|
14 |
|
|
NET "DISP_SEL<3>" LOC = "U14" | IOSTANDARD = LVCMOS33 ;
|
15 |
|
|
NET "LAD<0>" LOC = "V5" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | IOBDELAY = BOTH | KEEPER ;
|
16 |
|
|
NET "LAD<1>" LOC = "U5" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | IOBDELAY = BOTH | KEEPER ;
|
17 |
|
|
NET "LAD<2>" LOC = "V2" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | IOBDELAY = BOTH | KEEPER ;
|
18 |
|
|
NET "LAD<3>" LOC = "V1" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | IOBDELAY = BOTH | KEEPER ;
|
19 |
|
|
NET "LAD_OE" LOC = "T5" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 12 ;
|
20 |
|
|
NET "LFRAME" LOC = "W2" | IOSTANDARD = LVCMOS33 ;
|
21 |
|
|
NET "LPC_CLK" LOC = "W1" | IOSTANDARD = LVCMOS33 ;
|
22 |
|
|
NET "RST" LOC = "A19" | IOSTANDARD = PCI33_3 ;
|
23 |
14 |
hharte |
|
24 |
|
|
# Update for ISE 10.1, which complains about this.
|
25 |
|
|
NET "LPC_CLK" CLOCK_DEDICATED_ROUTE = FALSE;
|
26 |
7 |
hharte |
|
27 |
|
|
#PACE: Start of PACE Area Constraints
|
28 |
|
|
|
29 |
|
|
#PACE: Start of PACE Prohibit Constraints
|
30 |
|
|
|
31 |
|
|
#PACE: End of Constraints generated by PACE
|
© copyright 1999-2025
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.