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7 |
hharte |
#PACE: Start of Constraints generated by PACE
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| 2 |
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| 3 |
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#PACE: Start of PACE I/O Pin Assignments
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| 4 |
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NET "CBE0" LOC = "F9" | IOSTANDARD = PCI33_3 ;
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| 5 |
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NET "CBE1" LOC = "C10" | IOSTANDARD = PCI33_3 ;
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| 6 |
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NET "CBE2" LOC = "D13" | IOSTANDARD = PCI33_3 ;
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| 7 |
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NET "CBE3" LOC = "E13" | IOSTANDARD = PCI33_3 ;
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| 8 |
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NET "CLK" LOC = "A11" | IOSTANDARD = PCI33_3 ;
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| 9 |
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NET "DEVSEL" LOC = "E12" | IOSTANDARD = PCI33_3 ;
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| 10 |
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NET "DISP_LED<0>" LOC = "AB20" | IOSTANDARD = LVCMOS33 ;
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| 11 |
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NET "DISP_LED<1>" LOC = "AA20" | IOSTANDARD = LVCMOS33 ;
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| 12 |
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NET "DISP_LED<2>" LOC = "V18" | IOSTANDARD = LVCMOS33 ;
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| 13 |
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NET "DISP_LED<3>" LOC = "Y17" | IOSTANDARD = LVCMOS33 ;
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| 14 |
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NET "DISP_LED<4>" LOC = "AB18" | IOSTANDARD = LVCMOS33 ;
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| 15 |
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NET "DISP_LED<5>" LOC = "AA18" | IOSTANDARD = LVCMOS33 ;
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| 16 |
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NET "DISP_LED<6>" LOC = "W18" | IOSTANDARD = LVCMOS33 ;
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| 17 |
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NET "DISP_SEL<0>" LOC = "AA17" | IOSTANDARD = LVCMOS33 ;
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| 18 |
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NET "DISP_SEL<1>" LOC = "U17" | IOSTANDARD = LVCMOS33 ;
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| 19 |
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NET "DISP_SEL<2>" LOC = "U16" | IOSTANDARD = LVCMOS33 ;
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| 20 |
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NET "DISP_SEL<3>" LOC = "U14" | IOSTANDARD = LVCMOS33 ;
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| 21 |
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NET "FRAME" LOC = "C13" | IOSTANDARD = PCI33_3 ;
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| 22 |
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NET "GNT" LOC = "D18" | IOSTANDARD = PCI33_3 ;
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| 23 |
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NET "IDSEL" LOC = "D14" | IOSTANDARD = PCI33_3 ;
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| 24 |
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NET "INTA" LOC = "B19" | IOSTANDARD = PCI33_3 ;
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| 25 |
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NET "IRDY" LOC = "A13" | IOSTANDARD = PCI33_3 ;
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| 26 |
12 |
hharte |
NET "LAD<0>" LOC = "V5" | IOSTANDARD = LVCMOS33 | PULLUP ;
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| 27 |
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NET "LAD<1>" LOC = "U5" | IOSTANDARD = LVCMOS33 | PULLUP ;
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| 28 |
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NET "LAD<2>" LOC = "V2" | IOSTANDARD = LVCMOS33 | PULLUP ;
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| 29 |
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NET "LAD<3>" LOC = "V1" | IOSTANDARD = LVCMOS33 | PULLUP ;
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| 30 |
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NET "LAD_OE" LOC = "T5" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 12 ;
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| 31 |
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NET "LFRAME" LOC = "W2" | IOSTANDARD = LVCMOS33 ;
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| 32 |
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NET "LPC_CLK" LOC = "W1" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 24 ;
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| 33 |
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NET "LPC_RST" LOC = "U4" | IOSTANDARD = LVCMOS33 ;
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| 34 |
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NET "LPC_INT" LOC = "T4" | IOSTANDARD = LVCMOS33 | PULLUP ;
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| 35 |
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NET "LPC_GND<0>" LOC = "W4" | IOSTANDARD = LVCMOS33 ; # These are tied to GND to provide some
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| 36 |
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NET "LPC_GND<1>" LOC = "W3" | IOSTANDARD = LVCMOS33 ; # "shielding" on the cable.
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| 37 |
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NET "LPC_GND<2>" LOC = "V3" | IOSTANDARD = LVCMOS33 ;
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| 38 |
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NET "LPC_GND<3>" LOC = "V4" | IOSTANDARD = LVCMOS33 ;
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| 39 |
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NET "LPC_GND<4>" LOC = "N4" | IOSTANDARD = LVCMOS33 ;
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| 40 |
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NET "LPC_GND<5>" LOC = "N3" | IOSTANDARD = LVCMOS33 ;
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| 41 |
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NET "LPC_GND<6>" LOC = "N2" | IOSTANDARD = LVCMOS33 ;
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| 42 |
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| 44 |
7 |
hharte |
NET "PAR" LOC = "A9" | IOSTANDARD = PCI33_3 ;
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| 45 |
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NET "PCI_AD<0>" LOC = "A5" | IOSTANDARD = PCI33_3 ;
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| 46 |
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NET "PCI_AD<10>" LOC = "E9" | IOSTANDARD = PCI33_3 ;
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| 47 |
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NET "PCI_AD<11>" LOC = "F11" | IOSTANDARD = PCI33_3 ;
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| 48 |
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NET "PCI_AD<12>" LOC = "E10" | IOSTANDARD = PCI33_3 ;
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| 49 |
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NET "PCI_AD<13>" LOC = "A8" | IOSTANDARD = PCI33_3 ;
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| 50 |
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NET "PCI_AD<14>" LOC = "B9" | IOSTANDARD = PCI33_3 ;
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| 51 |
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NET "PCI_AD<15>" LOC = "B10" | IOSTANDARD = PCI33_3 ;
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| 52 |
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NET "PCI_AD<16>" LOC = "F17" | IOSTANDARD = PCI33_3 ;
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| 53 |
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NET "PCI_AD<17>" LOC = "F16" | IOSTANDARD = PCI33_3 ;
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| 54 |
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NET "PCI_AD<18>" LOC = "A14" | IOSTANDARD = PCI33_3 ;
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| 55 |
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NET "PCI_AD<19>" LOC = "B14" | IOSTANDARD = PCI33_3 ;
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| 56 |
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NET "PCI_AD<1>" LOC = "B5" | IOSTANDARD = PCI33_3 ;
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| 57 |
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NET "PCI_AD<20>" LOC = "B15" | IOSTANDARD = PCI33_3 ;
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| 58 |
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NET "PCI_AD<21>" LOC = "A15" | IOSTANDARD = PCI33_3 ;
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| 59 |
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NET "PCI_AD<22>" LOC = "F12" | IOSTANDARD = PCI33_3 ;
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| 60 |
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NET "PCI_AD<23>" LOC = "F13" | IOSTANDARD = PCI33_3 ;
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| 61 |
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NET "PCI_AD<24>" LOC = "D15" | IOSTANDARD = PCI33_3 ;
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| 62 |
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NET "PCI_AD<25>" LOC = "E15" | IOSTANDARD = PCI33_3 ;
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| 63 |
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NET "PCI_AD<26>" LOC = "D17" | IOSTANDARD = PCI33_3 ;
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| 64 |
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NET "PCI_AD<27>" LOC = "C17" | IOSTANDARD = PCI33_3 ;
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| 65 |
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NET "PCI_AD<28>" LOC = "B17" | IOSTANDARD = PCI33_3 ;
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| 66 |
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NET "PCI_AD<29>" LOC = "E17" | IOSTANDARD = PCI33_3 ;
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| 67 |
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NET "PCI_AD<2>" LOC = "E6" | IOSTANDARD = PCI33_3 ;
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| 68 |
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NET "PCI_AD<30>" LOC = "A18" | IOSTANDARD = PCI33_3 ;
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| 69 |
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NET "PCI_AD<31>" LOC = "B18" | IOSTANDARD = PCI33_3 ;
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| 70 |
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NET "PCI_AD<3>" LOC = "D6" | IOSTANDARD = PCI33_3 ;
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| 71 |
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NET "PCI_AD<4>" LOC = "C6" | IOSTANDARD = PCI33_3 ;
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| 72 |
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NET "PCI_AD<5>" LOC = "B6" | IOSTANDARD = PCI33_3 ;
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| 73 |
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NET "PCI_AD<6>" LOC = "D7" | IOSTANDARD = PCI33_3 ;
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| 74 |
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NET "PCI_AD<7>" LOC = "E7" | IOSTANDARD = PCI33_3 ;
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| 75 |
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NET "PCI_AD<8>" LOC = "B8" | IOSTANDARD = PCI33_3 ;
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| 76 |
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NET "PCI_AD<9>" LOC = "F10" | IOSTANDARD = PCI33_3 ;
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| 77 |
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NET "PERR" LOC = "D12" | IOSTANDARD = PCI33_3 ;
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| 78 |
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NET "PREVENT_STRIPPING_OF_UNUSED_INPUTS" LOC = "AA4" | IOSTANDARD = LVCMOS33 ;
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| 79 |
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NET "REQ" LOC = "C18" | IOSTANDARD = PCI33_3 ;
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| 80 |
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NET "RST" LOC = "A19" | IOSTANDARD = PCI33_3 ;
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| 81 |
12 |
hharte |
NET "SERR" LOC = "B12" | IOSTANDARD = PCI33_3 | PULLUP;
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| 82 |
7 |
hharte |
NET "STOP" LOC = "A12" | IOSTANDARD = PCI33_3 ;
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| 83 |
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NET "TRDY" LOC = "B13" | IOSTANDARD = PCI33_3 ;
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| 84 |
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| 85 |
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#PACE: Start of PACE Area Constraints
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| 86 |
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| 87 |
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#PACE: Start of PACE Prohibit Constraints
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| 88 |
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| 89 |
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#PACE: End of Constraints generated by PACE
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