Subversion Repositories wbddr3

################################################################################

##

## Filename:    Makefile

##

## Project:     A wishbone controlled DDR3 SDRAM memory controller.

##

## Purpose:     This coordinates the build of the singular test bench C++

##              program found in this directory: ddrsdram_tb.

##

## Creator:     Dan Gisselquist, Ph.D.

##              Gisselquist Technology, LLC

##

################################################################################

##

## Copyright (C) 2015-2016, Gisselquist Technology, LLC

##

## This program is free software (firmware): you can redistribute it and/or

## modify it under the terms of  the GNU General Public License as published

## by the Free Software Foundation, either version 3 of the License, or (at

## your option) any later version.

##

## This program is distributed in the hope that it will be useful, but WITHOUT

## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or

## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

## for more details.

##

## You should have received a copy of the GNU General Public License along

## with this program.  (It's in the $(ROOT)/doc directory, run make with no

## target there if the PDF file isn't present.)  If not, see

##  for a copy.

##

## License:     GPL, v3, as defined and found on www.gnu.org,

##              http://www.gnu.org/licenses/gpl.html

##

##

################################################################################

##

##

OBJDIR  := obj-pc

CXX     := g++

YYMMDD  := `date +%Y%m%d`

RTLD    := ../../rtl

VOBJDR  := $(RTLD)/obj_dir

VROOT   := /usr/share/verilator

VINC    := -I$(VROOT)/include -I$(VOBJDR)

CFLAGS  := -Wall -c -Og -g -I. $(VINC)

SOURCES := ddrsdramsim.cpp ddrsdram_tb.cpp

VOBJDR  := $(RTLD)/obj_dir

VLIB    := $(VROOT)/include/verilated.cpp

all:    $(OBJDIR)/ ddrsdram_tb

$(OBJDIR)/:

        @bash -c "if [ ! -e $(OBJDIR) ]; then mkdir -p $(OBJDIR); fi"

$(OBJDIR)/ddrsdramsim.o: ddrsdramsim.cpp ddrsdramsim.h $(VOBJDR)/Vwbddrsdram.h

        $(CXX) $(CFLAGS) ddrsdramsim.cpp -o $@

$(OBJDIR)/verilated.o: $(VLIB) $(OBJDIR)/

        $(CXX) $(CFLAGS) $(VLIB) -o $@

$(OBJDIR)/ddrsdram_tb.o: ddrsdram_tb.cpp ddrsdramsim.h $(VOBJDR)/Vwbddrsdram.h

        $(CXX) $(CFLAGS) ddrsdram_tb.cpp -o $@

OBJECTS := ddrsdramsim.o ddrsdram_tb.o verilated.o

OBJECTSDR:= $(addprefix $(OBJDIR)/,$(OBJECTS))

ddrsdram_tb: $(OBJECTSDR) $(VOBJDR)/Vwbddrsdram__ALL.a

        $(CXX) -Wall $(INCS) $^ -o $@

.PHONY: clean

clean:

        rm -rf $(OBJDIR)/ ddrsdram_tb

.PHONY: test

test: ddrsdram_tb

        ./ddrsdram_tb