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dgisselq |
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##
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## Filename: Makefile
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##
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## Project: A wishbone conrolled DDR3 SDRAM controller.
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##
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## Purpose: To direct the Verilator build of our one source file. The
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## result will be a library, Vwbddrsdram__ALL.a, found and kept
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## in the obj_dir/ subdirectory.
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##
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##
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## Creator: Dan Gisselquist, Ph.D.
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## Gisselquist Technology, LLC
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##
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################################################################################
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##
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## Copyright (C) 2015, Gisselquist Technology, LLC
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##
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## This program is free software (firmware): you can redistribute it and/or
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## modify it under the terms of the GNU General Public License as published
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## by the Free Software Foundation, either version 3 of the License, or (at
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## your option) any later version.
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##
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## This program is distributed in the hope that it will be useful, but WITHOUT
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## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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## for more details.
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##
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## License: GPL, v3, as defined and found on www.gnu.org,
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## http:##www.gnu.org/licenses/gpl.html
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##
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##
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################################################################################
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##
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##
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all: wbddrsdram
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YYMMDD=`date +%Y%m%d`
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CXX := g++
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FBDIR := .
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SOURCES:= wbddrsdram.v
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VDIRFB:= $(FBDIR)/obj_dir
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.PHONY: wbddrsdram
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wbddrsdram: $(VDIRFB)/Vwbddrsdram__ALL.a
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$(VDIRFB)/Vwbddrsdram__ALL.a: $(VDIRFB)/Vwbddrsdram.h $(VDIRFB)/Vwbddrsdram.cpp
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$(VDIRFB)/Vfastmaster__ALL.a: $(VDIRFB)/Vwbddrsdram.mk
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$(VDIRFB)/Vwbddrsdram.h $(VDIRFB)/wbddrsdram.cpp $(VDIRFB)/wbddrsdram.mk: $(SOURCES)
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$(VDIRFB)/V%.cpp $(VDIRFB)/V%.h $(VDIRFB)/V%.mk: $(FBDIR)/%.v
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verilator -cc $*.v
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$(VDIRFB)/V%__ALL.a: $(VDIRFB)/V%.mk
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cd $(VDIRFB); make -f V$*.mk
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.PHONY: clean
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clean:
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rm -rf $(VDIRFB)/*.mk
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rm -rf $(VDIRFB)/*.cpp
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rm -rf $(VDIRFB)/*.h
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rm -rf $(VDIRFB)/
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