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[/] [wdsp/] [trunk/] [rtl/] [verilog/] [minsoc/] [wb_conmax/] [tags/] [start/] [syn/] [bin/] [lib_spec.dc] - Blame information for rev 7

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1 7 parrado
###############################################################################
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#
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# Library Specification
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#
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# Author: Rudolf Usselmann
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#         rudi@asics.ws
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#
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# Revision:
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# 3/7/01 RU Initial Sript
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#
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#
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###############################################################################
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# ==============================================
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# Setup Libraries
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set search_path [list $search_path .                                                    \
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                /tools/dc_libraries/virtual_silicon/UMCL18U250D2_2.2/design_compiler/   \
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                $hdl_src_dir]
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set snps  [getenv "SYNOPSYS"]
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set synthetic_library ""
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append synthetic_library $snps "/libraries/syn/dw01.sldb "
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append synthetic_library $snps "/libraries/syn/dw02.sldb "
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append synthetic_library $snps "/libraries/syn/dw03.sldb "
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append synthetic_library $snps "/libraries/syn/dw04.sldb "
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append synthetic_library $snps "/libraries/syn/dw05.sldb "
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append synthetic_library $snps "/libraries/syn/dw06.sldb "
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append synthetic_library $snps "/libraries/syn/dw07.sldb "
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set target_library { umcl18u250t2_typ.db }
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set link_library ""
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append link_library  $target_library " "  $synthetic_library
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set symbol_library { umcl18u250t2.sdb }
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