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URL https://opencores.org/ocsvn/wdsp/wdsp/trunk

Subversion Repositories wdsp

[/] [wdsp/] [trunk/] [rtl/] [verilog/] [minsoc/] [wb_conmax/] [tags/] [start/] [x] - Blame information for rev 7

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Line No. Rev Author Line
1 7 parrado 
// Master 0 Interface
2 
input   [dw-1:0]        m0_data_i;
3 
output  [dw-1:0]        m0_data_o;
4 
input   [aw-1:0]        m0_addr_i;
5 
input   [sw-1:0]        m0_sel_i;
6 
input                   m0_we_i;
7 
input                   m0_cyc_i;
8 
input                   m0_stb_i;
9 
output                  m0_ack_o;
10 
output                  m0_err_o;
11 
output                  m0_rty_o;
12 
 
13 
// Master 1 Interface
14 
input   [dw-1:0]        m1_data_i;
15 
output  [dw-1:0]        m1_data_o;
16 
input   [aw-1:0]        m1_addr_i;
17 
input   [sw-1:0]        m1_sel_i;
18 
input                   m1_we_i;
19 
input                   m1_cyc_i;
20 
input                   m1_stb_i;
21 
output                  m1_ack_o;
22 
output                  m1_err_o;
23 
output                  m1_rty_o;
24 
 
25 
// Master 2 Interface
26 
input   [dw-1:0]        m2_data_i;
27 
output  [dw-1:0]        m2_data_o;
28 
input   [aw-1:0]        m2_addr_i;
29 
input   [sw-1:0]        m2_sel_i;
30 
input                   m2_we_i;
31 
input                   m2_cyc_i;
32 
input                   m2_stb_i;
33 
output                  m2_ack_o;
34 
output                  m2_err_o;
35 
output                  m2_rty_o;
36 
 
37 
// Master 3 Interface
38 
input   [dw-1:0]        m3_data_i;
39 
output  [dw-1:0]        m3_data_o;
40 
input   [aw-1:0]        m3_addr_i;
41 
input   [sw-1:0]        m3_sel_i;
42 
input                   m3_we_i;
43 
input                   m3_cyc_i;
44 
input                   m3_stb_i;
45 
output                  m3_ack_o;
46 
output                  m3_err_o;
47 
output                  m3_rty_o;
48 
 
49 
// Master 4 Interface
50 
input   [dw-1:0]        m4_data_i;
51 
output  [dw-1:0]        m4_data_o;
52 
input   [aw-1:0]        m4_addr_i;
53 
input   [sw-1:0]        m4_sel_i;
54 
input                   m4_we_i;
55 
input                   m4_cyc_i;
56 
input                   m4_stb_i;
57 
output                  m4_ack_o;
58 
output                  m4_err_o;
59 
output                  m4_rty_o;
60 
 
61 
// Master 5 Interface
62 
input   [dw-1:0]        m5_data_i;
63 
output  [dw-1:0]        m5_data_o;
64 
input   [aw-1:0]        m5_addr_i;
65 
input   [sw-1:0]        m5_sel_i;
66 
input                   m5_we_i;
67 
input                   m5_cyc_i;
68 
input                   m5_stb_i;
69 
output                  m5_ack_o;
70 
output                  m5_err_o;
71 
output                  m5_rty_o;
72 
 
73 
// Master 6 Interface
74 
input   [dw-1:0]        m6_data_i;
75 
output  [dw-1:0]        m6_data_o;
76 
input   [aw-1:0]        m6_addr_i;
77 
input   [sw-1:0]        m6_sel_i;
78 
input                   m6_we_i;
79 
input                   m6_cyc_i;
80 
input                   m6_stb_i;
81 
output                  m6_ack_o;
82 
output                  m6_err_o;
83 
output                  m6_rty_o;
84 
 
85 
// Master 7 Interface
86 
input   [dw-1:0]        m7_data_i;
87 
output  [dw-1:0]        m7_data_o;
88 
input   [aw-1:0]        m7_addr_i;
89 
input   [sw-1:0]        m7_sel_i;
90 
input                   m7_we_i;
91 
input                   m7_cyc_i;
92 
input                   m7_stb_i;
93 
output                  m7_ack_o;
94 
output                  m7_err_o;
95 
output                  m7_rty_o;
96 
 
97 
// Slave 0 Interface
98 
input   [dw-1:0]        s0_data_i;
99 
output  [dw-1:0]        s0_data_o;
100 
output  [aw-1:0]        s0_addr_o;
101 
output  [sw-1:0]        s0_sel_o;
102 
output                  s0_we_o;
103 
output                  s0_cyc_o;
104 
output                  s0_stb_o;
105 
input                   s0_ack_i;
106 
input                   s0_err_i;
107 
input                   s0_rty_i;
108 
 
109 
// Slave 1 Interface
110 
input   [dw-1:0]        s1_data_i;
111 
output  [dw-1:0]        s1_data_o;
112 
output  [aw-1:0]        s1_addr_o;
113 
output  [sw-1:0]        s1_sel_o;
114 
output                  s1_we_o;
115 
output                  s1_cyc_o;
116 
output                  s1_stb_o;
117 
input                   s1_ack_i;
118 
input                   s1_err_i;
119 
input                   s1_rty_i;
120 
 
121 
// Slave 2 Interface
122 
input   [dw-1:0]        s2_data_i;
123 
output  [dw-1:0]        s2_data_o;
124 
output  [aw-1:0]        s2_addr_o;
125 
output  [sw-1:0]        s2_sel_o;
126 
output                  s2_we_o;
127 
output                  s2_cyc_o;
128 
output                  s2_stb_o;
129 
input                   s2_ack_i;
130 
input                   s2_err_i;
131 
input                   s2_rty_i;
132 
 
133 
// Slave 3 Interface
134 
input   [dw-1:0]        s3_data_i;
135 
output  [dw-1:0]        s3_data_o;
136 
output  [aw-1:0]        s3_addr_o;
137 
output  [sw-1:0]        s3_sel_o;
138 
output                  s3_we_o;
139 
output                  s3_cyc_o;
140 
output                  s3_stb_o;
141 
input                   s3_ack_i;
142 
input                   s3_err_i;
143 
input                   s3_rty_i;
144 
 
145 
// Slave 4 Interface
146 
input   [dw-1:0]        s4_data_i;
147 
output  [dw-1:0]        s4_data_o;
148 
output  [aw-1:0]        s4_addr_o;
149 
output  [sw-1:0]        s4_sel_o;
150 
output                  s4_we_o;
151 
output                  s4_cyc_o;
152 
output                  s4_stb_o;
153 
input                   s4_ack_i;
154 
input                   s4_err_i;
155 
input                   s4_rty_i;
156 
 
157 
// Slave 5 Interface
158 
input   [dw-1:0]        s5_data_i;
159 
output  [dw-1:0]        s5_data_o;
160 
output  [aw-1:0]        s5_addr_o;
161 
output  [sw-1:0]        s5_sel_o;
162 
output                  s5_we_o;
163 
output                  s5_cyc_o;
164 
output                  s5_stb_o;
165 
input                   s5_ack_i;
166 
input                   s5_err_i;
167 
input                   s5_rty_i;
168 
 
169 
// Slave 6 Interface
170 
input   [dw-1:0]        s6_data_i;
171 
output  [dw-1:0]        s6_data_o;
172 
output  [aw-1:0]        s6_addr_o;
173 
output  [sw-1:0]        s6_sel_o;
174 
output                  s6_we_o;
175 
output                  s6_cyc_o;
176 
output                  s6_stb_o;
177 
input                   s6_ack_i;
178 
input                   s6_err_i;
179 
input                   s6_rty_i;
180 
 
181 
// Slave 7 Interface
182 
input   [dw-1:0]        s7_data_i;
183 
output  [dw-1:0]        s7_data_o;
184 
output  [aw-1:0]        s7_addr_o;
185 
output  [sw-1:0]        s7_sel_o;
186 
output                  s7_we_o;
187 
output                  s7_cyc_o;
188 
output                  s7_stb_o;
189 
input                   s7_ack_i;
190 
input                   s7_err_i;
191 
input                   s7_rty_i;
192 
 
193 
// Slave 8 Interface
194 
input   [dw-1:0]        s8_data_i;
195 
output  [dw-1:0]        s8_data_o;
196 
output  [aw-1:0]        s8_addr_o;
197 
output  [sw-1:0]        s8_sel_o;
198 
output                  s8_we_o;
199 
output                  s8_cyc_o;
200 
output                  s8_stb_o;
201 
input                   s8_ack_i;
202 
input                   s8_err_i;
203 
input                   s8_rty_i;
204 
 
205 
// Slave 9 Interface
206 
input   [dw-1:0]        s9_data_i;
207 
output  [dw-1:0]        s9_data_o;
208 
output  [aw-1:0]        s9_addr_o;
209 
output  [sw-1:0]        s9_sel_o;
210 
output                  s9_we_o;
211 
output                  s9_cyc_o;
212 
output                  s9_stb_o;
213 
input                   s9_ack_i;
214 
input                   s9_err_i;
215 
input                   s9_rty_i;
216 
 
217 
// Slave 10 Interface
218 
input   [dw-1:0]        s10_data_i;
219 
output  [dw-1:0]        s10_data_o;
220 
output  [aw-1:0]        s10_addr_o;
221 
output  [sw-1:0]        s10_sel_o;
222 
output                  s10_we_o;
223 
output                  s10_cyc_o;
224 
output                  s10_stb_o;
225 
input                   s10_ack_i;
226 
input                   s10_err_i;
227 
input                   s10_rty_i;
228 
 
229 
// Slave 11 Interface
230 
input   [dw-1:0]        s11_data_i;
231 
output  [dw-1:0]        s11_data_o;
232 
output  [aw-1:0]        s11_addr_o;
233 
output  [sw-1:0]        s11_sel_o;
234 
output                  s11_we_o;
235 
output                  s11_cyc_o;
236 
output                  s11_stb_o;
237 
input                   s11_ack_i;
238 
input                   s11_err_i;
239 
input                   s11_rty_i;
240 
 
241 
// Slave 12 Interface
242 
input   [dw-1:0]        s12_data_i;
243 
output  [dw-1:0]        s12_data_o;
244 
output  [aw-1:0]        s12_addr_o;
245 
output  [sw-1:0]        s12_sel_o;
246 
output                  s12_we_o;
247 
output                  s12_cyc_o;
248 
output                  s12_stb_o;
249 
input                   s12_ack_i;
250 
input                   s12_err_i;
251 
input                   s12_rty_i;
252 
 
253 
// Slave 13 Interface
254 
input   [dw-1:0]        s13_data_i;
255 
output  [dw-1:0]        s13_data_o;
256 
output  [aw-1:0]        s13_addr_o;
257 
output  [sw-1:0]        s13_sel_o;
258 
output                  s13_we_o;
259 
output                  s13_cyc_o;
260 
output                  s13_stb_o;
261 
input                   s13_ack_i;
262 
input                   s13_err_i;
263 
input                   s13_rty_i;
264 
 
265 
// Slave 14 Interface
266 
input   [dw-1:0]        s14_data_i;
267 
output  [dw-1:0]        s14_data_o;
268 
output  [aw-1:0]        s14_addr_o;
269 
output  [sw-1:0]        s14_sel_o;
270 
output                  s14_we_o;
271 
output                  s14_cyc_o;
272 
output                  s14_stb_o;
273 
input                   s14_ack_i;
274 
input                   s14_err_i;
275 
input                   s14_rty_i;
276 
 
277 
// Slave 15 Interface
278 
input   [dw-1:0]        s15_data_i;
279 
output  [dw-1:0]        s15_data_o;
280 
output  [aw-1:0]        s15_addr_o;
281 
output  [sw-1:0]        s15_sel_o;
282 
output                  s15_we_o;
283 
output                  s15_cyc_o;
284 
output                  s15_stb_o;
285 
input                   s15_ack_i;
286 
input                   s15_err_i;
287 
input                   s15_rty_i;
288 
 

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