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parrado |
function romgen_rc(rp,fp,tbits,rnum)
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% romgen_rc(rp,fp,tbits)
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% rp= number of points in this rom
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% fp= total number of points in the FFT.
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% tbits=width of the twiddle factor
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% rnum=rom number
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%
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% This function creates the vhdl ROM file used to store the twiddle fac tors.
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% The resulting file is named rom<rnum>.vhdl, where <rnum> is the value specifi ed in rp.
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% For exa mple: romgen_rc(16,64,10,1) would create a file called rom1.vhdl
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%
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% This program uses:
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% frac2bin.m
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% writ ebin.m
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%opening file for writing , (modified by Alex-Parrado)
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fname=sprintf('../../../rtl/vhdl/WISHBONE_FFT/rom%d.vhd',rnum);
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fprintf('creating file %s\n',fname);
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fid=fopen(fname,'w');
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%writing beginning stuff to the file
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aw=log2(rp);
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fprintf(fid,'-- Rom file for twiddle factors \n');
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fprintf(fid ,'-- %s',fname);
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fprintf(fid,' contains %d points of %d width \n',rp,tbits);
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fprintf(fid,'-- for a %d point fft.\n\n',fp);
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%Synchronous ROM modification by Alex-Parrado
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fprintf(fid,'LIBRARY ieee;\nUSE ieee.std_logic_1164.ALL;\nUSE ieee.std_logic_arith.ALL;\n');
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fprintf(fid,'\n\nENTITY rom%d IS\n GENERIC(\n',rnum);
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fprintf(fid,' data_width : integer :=%d;\n',tbits);
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fprintf(fid,' address_width : integer :=%d\n',aw);
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fprintf (fid,' );\n PORT(\n');
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fprintf(fid,' clk :in std_logic;\n');
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fprintf(fid,' address :in std_logic_vector (%d downto 0);\n',aw-1);
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fprintf(fid ,' datar : OUT std_logic_vector (data_width-1 DOWNTO 0) ;\n');
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fprintf(fid,' datai : OUT std_logic_vector (data_width-1 DOWNTO 0)\n );\n');
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fprintf(fid,'end rom%d;\n',rnum);
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%begin writing architecture
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fprintf(fid,'ARCHITECTURE behavior OF rom%d IS\n\n BEGIN\n\n',rnum);
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fprintf(fid,'process (address,clk)\nbegin\n if(rising_edge(clk)) then \n case address is\n');
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ma=fp/rp*[2 1 3];
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address=0;
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for m=1:3
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for n=0:((rp/4)-1)
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% fprintf('%d %d %d %d %d',n,m,ma(m),rp,fp);
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expval=exp(-2*pi* j*n*ma(m)/fp);
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rscld=round(real(expval)*(2^(tbits-1)-1));
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iscld=round(imag(expval)*(2^(tbits-1)-1));
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bitvecr=frac2bin(rscld,tbits,0);
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bitveci=frac2bin(iscld,tbits,0);
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addrvec=dec2bin(address,aw);
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fprintf(fid,' when "%s" => datar <= "',addrvec);
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writebin( fid,bitvecr);
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fprintf(fid,'";datai <= "');
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writebin(fid,bitveci);
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fprintf(fid,'"; --%d\n',n*ma(m));
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address=address+1;
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end
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end
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%filling out the remaining zeros
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bitvecr=frac2bin((2^(tbits-1)-1),tbits,0);
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bitveci=frac2bin(0,tbits,0);
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for n=0:(rp/4-1)
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addrvec=dec2bin(address,aw);
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fprintf(fid,' when "%s" => datar <= "',addrvec);
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writebin(fid,bitvecr);
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fprintf(fid,'";datai <= "');
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writebin(fid,bitveci);
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fprintf(fid,'"; --0\n');
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address=address+1;
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end
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fprintf(fid,' when others => for i in data_width-1 downto 0 loop\n');
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fprintf(fid,' datar(i)<=''0'';datai(i)<=''0'';end loop;\n');
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fprintf(fid,' end case;\n\n');
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fprintf(fid,' end if;\n\n');
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fprintf(fid,'end process;\nEND behavior;\n');
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fclose(fid);
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