1 |
2 |
specular |
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2 |
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3 |
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4 |
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name="$${FILENAME}"
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5 |
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displayName="$${FILENAME}"
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6 |
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version="1.0"
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7 |
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description=""
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8 |
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tags=""
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9 |
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categories="System" />
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10 |
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11 |
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{
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12 |
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element $${FILENAME}
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13 |
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{
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14 |
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}
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15 |
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element altpll_0
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16 |
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{
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17 |
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datum _sortIndex
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18 |
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{
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19 |
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value = "2";
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20 |
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type = "int";
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21 |
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}
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22 |
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}
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23 |
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element clk_0
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24 |
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{
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25 |
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datum _sortIndex
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26 |
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{
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27 |
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value = "0";
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28 |
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type = "int";
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29 |
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}
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30 |
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}
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31 |
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element epcs_flash_controller_0
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32 |
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{
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33 |
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datum _sortIndex
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34 |
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{
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35 |
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value = "10";
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36 |
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type = "int";
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37 |
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}
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38 |
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}
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39 |
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element fm_3d_wrapper_0
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40 |
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{
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41 |
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datum _sortIndex
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42 |
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{
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43 |
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value = "11";
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44 |
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type = "int";
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45 |
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}
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46 |
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}
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47 |
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element fm_vga_wrapper_0
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48 |
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{
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49 |
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datum _sortIndex
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50 |
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{
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51 |
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value = "12";
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52 |
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type = "int";
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53 |
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}
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54 |
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}
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55 |
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element nios2_qsys_0.jtag_debug_module
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56 |
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{
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57 |
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datum baseAddress
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58 |
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{
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59 |
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value = "2048";
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60 |
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type = "String";
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61 |
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}
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62 |
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}
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63 |
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element jtag_uart_0
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64 |
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{
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65 |
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datum _sortIndex
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66 |
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{
|
67 |
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value = "5";
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68 |
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type = "int";
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69 |
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}
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70 |
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}
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71 |
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element new_sdram_controller_0
|
72 |
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{
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73 |
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datum _sortIndex
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74 |
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{
|
75 |
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value = "3";
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76 |
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type = "int";
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77 |
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}
|
78 |
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}
|
79 |
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element nios2_qsys_0
|
80 |
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{
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81 |
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datum _sortIndex
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82 |
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{
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83 |
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value = "1";
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84 |
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type = "int";
|
85 |
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}
|
86 |
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}
|
87 |
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element onchip_memory2_0
|
88 |
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{
|
89 |
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datum _sortIndex
|
90 |
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{
|
91 |
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value = "9";
|
92 |
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type = "int";
|
93 |
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}
|
94 |
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}
|
95 |
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element pio_0
|
96 |
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{
|
97 |
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datum _sortIndex
|
98 |
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{
|
99 |
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value = "6";
|
100 |
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type = "int";
|
101 |
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}
|
102 |
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}
|
103 |
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element sysid_qsys_0
|
104 |
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{
|
105 |
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datum _sortIndex
|
106 |
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{
|
107 |
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value = "4";
|
108 |
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type = "int";
|
109 |
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}
|
110 |
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}
|
111 |
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element timer_0
|
112 |
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{
|
113 |
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datum _sortIndex
|
114 |
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{
|
115 |
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value = "7";
|
116 |
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type = "int";
|
117 |
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}
|
118 |
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}
|
119 |
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element timer_1
|
120 |
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{
|
121 |
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datum _sortIndex
|
122 |
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{
|
123 |
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value = "8";
|
124 |
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type = "int";
|
125 |
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}
|
126 |
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}
|
127 |
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}
|
128 |
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]]>
|
129 |
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130 |
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131 |
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132 |
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133 |
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134 |
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135 |
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136 |
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137 |
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138 |
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139 |
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140 |
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141 |
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142 |
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143 |
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144 |
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145 |
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146 |
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147 |
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148 |
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name="sdram0_wire"
|
149 |
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internal="new_sdram_controller_0.wire"
|
150 |
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type="conduit"
|
151 |
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dir="end" />
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152 |
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153 |
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name="pio_0_in"
|
154 |
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internal="pio_0.external_connection"
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155 |
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type="conduit"
|
156 |
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dir="end" />
|
157 |
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|
158 |
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name="epcs_flash_controller_0_external"
|
159 |
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internal="epcs_flash_controller_0.external"
|
160 |
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type="conduit"
|
161 |
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dir="end" />
|
162 |
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|
163 |
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name="altpll_0_phasedone_conduit"
|
164 |
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internal="altpll_0.phasedone_conduit"
|
165 |
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type="conduit"
|
166 |
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dir="end" />
|
167 |
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|
168 |
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name="altpll_0_locked_conduit"
|
169 |
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internal="altpll_0.locked_conduit"
|
170 |
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type="conduit"
|
171 |
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dir="end" />
|
172 |
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|
173 |
|
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name="altpll_0_areset_conduit"
|
174 |
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internal="altpll_0.areset_conduit"
|
175 |
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type="conduit"
|
176 |
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dir="end" />
|
177 |
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|
178 |
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|
179 |
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|
180 |
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name="vga_out"
|
181 |
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internal="fm_vga_wrapper_0.conduit_end"
|
182 |
|
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type="conduit"
|
183 |
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dir="end" />
|
184 |
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185 |
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186 |
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187 |
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|
188 |
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|
189 |
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|
190 |
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|
191 |
|
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kind="altera_nios2_qsys"
|
192 |
|
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version="13.1"
|
193 |
|
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enabled="1"
|
194 |
|
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name="nios2_qsys_0">
|
195 |
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196 |
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197 |
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198 |
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199 |
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200 |
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201 |
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202 |
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203 |
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204 |
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205 |
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206 |
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207 |
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208 |
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209 |
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210 |
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211 |
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212 |
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213 |
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214 |
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215 |
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216 |
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217 |
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218 |
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219 |
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225 |
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226 |
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240 |
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241 |
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244 |
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246 |
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247 |
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248 |
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249 |
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|
250 |
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|
251 |
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epcs_flash_controller_0.epcs_control_port
|
252 |
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|
253 |
|
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new_sdram_controller_0.s1
|
254 |
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nios2_qsys_0.jtag_debug_module
|
255 |
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|
256 |
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257 |
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258 |
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259 |
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276 |
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277 |
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278 |
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279 |
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280 |
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281 |
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282 |
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283 |
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284 |
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285 |
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286 |
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287 |
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288 |
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289 |
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290 |
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291 |
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292 |
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293 |
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294 |
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295 |
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296 |
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297 |
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298 |
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299 |
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300 |
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301 |
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302 |
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303 |
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304 |
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]]>
|
305 |
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]]>
|
306 |
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307 |
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308 |
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309 |
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310 |
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ADDRESS_STALL 1 ADVANCED_INFO 0 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 1 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 1 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_EARLY_TIMING_ESTIMATE_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 1 HAS_ICD_DATA_IP 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_INTERFACE_PLANNER_SUPPORT 0 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LIMITED_TCL_FITTER_SUPPORT 0 HAS_LOGICAL_FLOORPLANNER_SUPPORT 0 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_BINNING_LIMITS_DATA 0 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 1 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_SUPPORT 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 0 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1
|
311 |
|
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|
312 |
|
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|
313 |
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314 |
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315 |
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316 |
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317 |
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|
318 |
|
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|
319 |
|
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|
320 |
|
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|
321 |
|
|
kind="altera_avalon_new_sdram_controller"
|
322 |
|
|
version="13.1"
|
323 |
|
|
enabled="1"
|
324 |
|
|
name="new_sdram_controller_0">
|
325 |
|
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|
326 |
|
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|
327 |
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|
328 |
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|
329 |
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330 |
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331 |
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|
332 |
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333 |
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|
334 |
|
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|
335 |
|
|
single_Micron_MT48LC4M32B2_7_chip
|
336 |
|
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|
337 |
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338 |
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339 |
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340 |
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341 |
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342 |
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343 |
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344 |
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345 |
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346 |
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|
347 |
|
|
$${FILENAME}_new_sdram_controller_0
|
348 |
|
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|
349 |
|
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|
350 |
|
|
kind="altera_avalon_sysid_qsys"
|
351 |
|
|
version="13.1"
|
352 |
|
|
enabled="1"
|
353 |
|
|
name="sysid_qsys_0">
|
354 |
|
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|
355 |
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|
356 |
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|
357 |
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|
358 |
|
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|
359 |
|
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|
360 |
|
|
kind="altera_avalon_jtag_uart"
|
361 |
|
|
version="13.1"
|
362 |
|
|
enabled="1"
|
363 |
|
|
name="jtag_uart_0">
|
364 |
|
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|
365 |
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|
366 |
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|
367 |
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|
368 |
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|
369 |
|
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NO_INTERACTIVE_WINDOWS
|
370 |
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|
371 |
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372 |
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|
373 |
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374 |
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375 |
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376 |
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377 |
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378 |
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379 |
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380 |
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381 |
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382 |
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383 |
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384 |
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385 |
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386 |
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387 |
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388 |
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389 |
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390 |
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391 |
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392 |
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393 |
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394 |
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395 |
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396 |
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397 |
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398 |
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|
399 |
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|
400 |
|
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|
401 |
|
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|
402 |
|
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|
403 |
|
|
kind="altera_avalon_onchip_memory2"
|
404 |
|
|
version="13.1"
|
405 |
|
|
enabled="0"
|
406 |
|
|
name="onchip_memory2_0">
|
407 |
|
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|
408 |
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|
409 |
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|
410 |
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|
411 |
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412 |
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413 |
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414 |
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415 |
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416 |
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|
417 |
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418 |
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419 |
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420 |
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421 |
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|
422 |
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|
423 |
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|
424 |
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|
425 |
|
|
usbhost_system_onchip_memory2_0
|
426 |
|
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|
427 |
|
|
ADDRESS_STALL 1 ADVANCED_INFO 0 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 1 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 1 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_EARLY_TIMING_ESTIMATE_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 1 HAS_ICD_DATA_IP 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_INTERFACE_PLANNER_SUPPORT 0 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LIMITED_TCL_FITTER_SUPPORT 0 HAS_LOGICAL_FLOORPLANNER_SUPPORT 0 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_BINNING_LIMITS_DATA 0 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 1 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_SUPPORT 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 0 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1
|
428 |
|
|
|
429 |
|
|
|
430 |
|
|
kind="altera_avalon_epcs_flash_controller"
|
431 |
|
|
version="13.1"
|
432 |
|
|
enabled="1"
|
433 |
|
|
name="epcs_flash_controller_0">
|
434 |
|
|
|
435 |
|
|
|
436 |
|
|
|
437 |
|
|
|
438 |
|
|
$${FILENAME}_epcs_flash_controller_0
|
439 |
|
|
|
440 |
|
|
|
441 |
|
|
altpll_avalon_elaboration
|
442 |
|
|
altpll_avalon_post_edit
|
443 |
|
|
|
444 |
|
|
|
445 |
|
|
|
446 |
|
|
|
447 |
|
|
|
448 |
|
|
|
449 |
|
|
|
450 |
|
|
|
451 |
|
|
|
452 |
|
|
|
453 |
|
|
|
454 |
|
|
|
455 |
|
|
|
456 |
|
|
|
457 |
|
|
|
458 |
|
|
|
459 |
|
|
|
460 |
|
|
|
461 |
|
|
|
462 |
|
|
|
463 |
|
|
|
464 |
|
|
|
465 |
|
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|
466 |
|
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|
467 |
|
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|
468 |
|
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|
469 |
|
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|
470 |
|
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|
471 |
|
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|
472 |
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|
473 |
|
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|
474 |
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|
475 |
|
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|
476 |
|
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|
477 |
|
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|
478 |
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|
479 |
|
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|
480 |
|
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|
481 |
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|
482 |
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|
483 |
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|
484 |
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|
485 |
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|
486 |
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|
487 |
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|
488 |
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|
489 |
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|
490 |
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|
491 |
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|
492 |
|
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|
493 |
|
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|
494 |
|
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|
495 |
|
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|
496 |
|
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|
497 |
|
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|
498 |
|
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|
499 |
|
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|
500 |
|
|
|
501 |
|
|
|
502 |
|
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|
503 |
|
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|
504 |
|
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|
505 |
|
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|
506 |
|
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|
507 |
|
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|
508 |
|
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|
509 |
|
|
|
510 |
|
|
|
511 |
|
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|
512 |
|
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|
513 |
|
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|
514 |
|
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|
515 |
|
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|
516 |
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|
517 |
|
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|
518 |
|
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|
519 |
|
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|
520 |
|
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|
521 |
|
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|
522 |
|
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|
523 |
|
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|
524 |
|
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|
525 |
|
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|
526 |
|
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|
527 |
|
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|
528 |
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|
529 |
|
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|
530 |
|
|
|
531 |
|
|
|
532 |
|
|
|
533 |
|
|
|
534 |
|
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|
535 |
|
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|
536 |
|
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|
537 |
|
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|
538 |
|
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|
539 |
|
|
|
540 |
|
|
|
541 |
|
|
|
542 |
|
|
|
543 |
|
|
|
544 |
|
|
|
545 |
|
|
|
546 |
|
|
|
547 |
|
|
|
548 |
|
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|
549 |
|
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|
550 |
|
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|
551 |
|
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|
552 |
|
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|
553 |
|
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|
554 |
|
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|
555 |
|
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|
556 |
|
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|
557 |
|
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|
558 |
|
|
|
559 |
|
|
|
560 |
|
|
|
561 |
|
|
|
562 |
|
|
|
563 |
|
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|
564 |
|
|
|
565 |
|
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|
566 |
|
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|
567 |
|
|
|
568 |
|
|
|
569 |
|
|
|
570 |
|
|
|
571 |
|
|
|
572 |
|
|
|
573 |
|
|
|
574 |
|
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|
575 |
|
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|
576 |
|
|
|
577 |
|
|
|
578 |
|
|
|
579 |
|
|
|
580 |
|
|
|
581 |
|
|
|
582 |
|
|
|
583 |
|
|
|
584 |
|
|
|
585 |
|
|
|
586 |
|
|
|
587 |
|
|
|
588 |
|
|
|
589 |
|
|
|
590 |
|
|
|
591 |
|
|
|
592 |
|
|
|
593 |
|
|
|
594 |
|
|
|
595 |
|
|
|
596 |
|
|
|
597 |
|
|
CT#CLK2_DIVIDE_BY 25 CT#PORT_clk5 PORT_UNUSED CT#PORT_clk4 PORT_USED CT#PORT_clk3 PORT_USED CT#PORT_clk2 PORT_USED CT#PORT_clk1 PORT_USED CT#PORT_clk0 PORT_USED CT#CLK0_MULTIPLY_BY 1 CT#PORT_SCANWRITE PORT_UNUSED CT#PORT_SCANACLR PORT_UNUSED CT#PORT_PFDENA PORT_UNUSED CT#CLK3_DUTY_CYCLE 50 CT#CLK3_DIVIDE_BY 2 CT#PORT_PLLENA PORT_UNUSED CT#PORT_SCANDATA PORT_UNUSED CT#CLK3_PHASE_SHIFT 0 CT#PORT_SCANCLKENA PORT_UNUSED CT#CLK4_DIVIDE_BY 1 CT#WIDTH_CLOCK 5 CT#PORT_SCANDATAOUT PORT_UNUSED CT#CLK4_MULTIPLY_BY 3 CT#LPM_TYPE altpll CT#PLL_TYPE AUTO CT#CLK0_PHASE_SHIFT 0 CT#CLK1_DUTY_CYCLE 50 CT#PORT_PHASEDONE PORT_UNUSED CT#OPERATION_MODE NORMAL CT#PORT_CONFIGUPDATE PORT_UNUSED CT#CLK1_MULTIPLY_BY 1 CT#COMPENSATE_CLOCK CLK0 CT#PORT_CLKSWITCH PORT_UNUSED CT#CLK4_PHASE_SHIFT 0 CT#INCLK0_INPUT_FREQUENCY 20000 CT#CLK4_DUTY_CYCLE 50 CT#PORT_SCANDONE PORT_UNUSED CT#PORT_CLKLOSS PORT_UNUSED CT#PORT_INCLK1 PORT_UNUSED CT#AVALON_USE_SEPARATE_SYSCLK NO CT#PORT_INCLK0 PORT_USED CT#PORT_clkena5 PORT_UNUSED CT#PORT_clkena4 PORT_UNUSED CT#PORT_clkena3 PORT_UNUSED CT#PORT_clkena2 PORT_UNUSED CT#PORT_clkena1 PORT_UNUSED CT#PORT_clkena0 PORT_UNUSED CT#CLK1_PHASE_SHIFT -3333 CT#PORT_ARESET PORT_UNUSED CT#BANDWIDTH_TYPE AUTO CT#CLK2_MULTIPLY_BY 24 CT#INTENDED_DEVICE_FAMILY {Cyclone III} CT#PORT_SCANREAD PORT_UNUSED CT#CLK2_DUTY_CYCLE 50 CT#PORT_PHASESTEP PORT_UNUSED CT#PORT_SCANCLK PORT_UNUSED CT#PORT_CLKBAD1 PORT_UNUSED CT#PORT_CLKBAD0 PORT_UNUSED CT#PORT_FBIN PORT_UNUSED CT#PORT_PHASEUPDOWN PORT_UNUSED CT#PORT_extclk3 PORT_UNUSED CT#PORT_extclk2 PORT_UNUSED CT#PORT_extclk1 PORT_UNUSED CT#PORT_PHASECOUNTERSELECT PORT_UNUSED CT#PORT_extclk0 PORT_UNUSED CT#PORT_ACTIVECLOCK PORT_UNUSED CT#CLK2_PHASE_SHIFT 0 CT#CLK0_DUTY_CYCLE 50 CT#CLK0_DIVIDE_BY 1 CT#CLK1_DIVIDE_BY 1 CT#CLK3_MULTIPLY_BY 1 CT#PORT_LOCKED PORT_UNUSED
|
598 |
|
|
PT#GLOCKED_FEATURE_ENABLED 0 PT#SPREAD_FEATURE_ENABLED 0 PT#BANDWIDTH_FREQ_UNIT MHz PT#CUR_DEDICATED_CLK c0 PT#INCLK0_FREQ_EDIT 50.000 PT#BANDWIDTH_PRESET Low PT#PLL_LVDS_PLL_CHECK 0 PT#BANDWIDTH_USE_PRESET 0 PT#AVALON_USE_SEPARATE_SYSCLK NO PT#OUTPUT_FREQ_UNIT4 MHz PT#OUTPUT_FREQ_UNIT3 MHz PT#PLL_ENHPLL_CHECK 0 PT#OUTPUT_FREQ_UNIT2 MHz PT#OUTPUT_FREQ_UNIT1 MHz PT#OUTPUT_FREQ_UNIT0 MHz PT#PHASE_RECONFIG_FEATURE_ENABLED 1 PT#CREATE_CLKBAD_CHECK 0 PT#CLKSWITCH_CHECK 0 PT#INCLK1_FREQ_EDIT 100.000 PT#NORMAL_MODE_RADIO 1 PT#SRC_SYNCH_COMP_RADIO 0 PT#PLL_ARESET_CHECK 0 PT#LONG_SCAN_RADIO 1 PT#SCAN_FEATURE_ENABLED 1 PT#USE_CLK4 1 PT#USE_CLK3 1 PT#USE_CLK2 1 PT#PHASE_RECONFIG_INPUTS_CHECK 0 PT#USE_CLK1 1 PT#USE_CLK0 1 PT#PRIMARY_CLK_COMBO inclk0 PT#BANDWIDTH 1.000 PT#GLOCKED_COUNTER_EDIT_CHANGED 1 PT#PLL_FASTPLL_CHECK 0 PT#SPREAD_FREQ_UNIT KHz PT#LVDS_PHASE_SHIFT_UNIT4 deg PT#LVDS_PHASE_SHIFT_UNIT3 deg PT#PLL_AUTOPLL_CHECK 1 PT#OUTPUT_FREQ_MODE4 1 PT#LVDS_PHASE_SHIFT_UNIT2 deg PT#OUTPUT_FREQ_MODE3 1 PT#LVDS_PHASE_SHIFT_UNIT1 deg PT#OUTPUT_FREQ_MODE2 1 PT#LVDS_PHASE_SHIFT_UNIT0 deg PT#OUTPUT_FREQ_MODE1 1 PT#SWITCHOVER_FEATURE_ENABLED 0 PT#MIG_DEVICE_SPEED_GRADE Any PT#OUTPUT_FREQ_MODE0 1 PT#BANDWIDTH_FEATURE_ENABLED 1 PT#INCLK0_FREQ_UNIT_COMBO MHz PT#ZERO_DELAY_RADIO 0 PT#OUTPUT_FREQ4 150.00000000 PT#OUTPUT_FREQ3 25.00000000 PT#OUTPUT_FREQ2 48.00000000 PT#OUTPUT_FREQ1 50.00000000 PT#OUTPUT_FREQ0 50.00000000 PT#SHORT_SCAN_RADIO 0 PT#LVDS_MODE_DATA_RATE_DIRTY 0 PT#CUR_FBIN_CLK c0 PT#PLL_ADVANCED_PARAM_CHECK 0 PT#CLKBAD_SWITCHOVER_CHECK 0 PT#PHASE_SHIFT_STEP_ENABLED_CHECK 0 PT#DEVICE_SPEED_GRADE Any PT#PLL_FBMIMIC_CHECK 0 PT#LVDS_MODE_DATA_RATE {Not Available} PT#PHASE_SHIFT4 0.00000000 PT#LOCKED_OUTPUT_CHECK 0 PT#SPREAD_PERCENT 0.500 PT#PHASE_SHIFT3 0.00000000 PT#DIV_FACTOR4 1 PT#PHASE_SHIFT2 0.00000000 PT#DIV_FACTOR3 2 PT#DIV_FACTOR2 25 PT#PHASE_SHIFT1 -60.00000000 PT#DIV_FACTOR1 1 PT#PHASE_SHIFT0 0.00000000 PT#DIV_FACTOR0 1 PT#CNX_NO_COMPENSATE_RADIO 0 PT#USE_CLKENA4 0 PT#USE_CLKENA3 0 PT#USE_CLKENA2 0 PT#USE_CLKENA1 0 PT#USE_CLKENA0 0 PT#CREATE_INCLK1_CHECK 0 PT#GLOCK_COUNTER_EDIT 1048575 PT#INCLK1_FREQ_UNIT_COMBO MHz PT#EFF_OUTPUT_FREQ_VALUE4 150.000000 PT#EFF_OUTPUT_FREQ_VALUE3 25.000000 PT#EFF_OUTPUT_FREQ_VALUE2 48.000000 PT#EFF_OUTPUT_FREQ_VALUE1 50.000000 PT#EFF_OUTPUT_FREQ_VALUE0 50.000000 PT#SPREAD_FREQ 50.000 PT#USE_MIL_SPEED_GRADE 0 PT#EXPLICIT_SWITCHOVER_COUNTER 0 PT#STICKY_CLK4 1 PT#STICKY_CLK3 1 PT#STICKY_CLK2 1 PT#STICKY_CLK1 1 PT#STICKY_CLK0 1 PT#MIRROR_CLK4 0 PT#EXT_FEEDBACK_RADIO 0 PT#MIRROR_CLK3 0 PT#MIRROR_CLK2 0 PT#MIRROR_CLK1 0 PT#SWITCHOVER_COUNT_EDIT 1 PT#MIRROR_CLK0 0 PT#SELF_RESET_LOCK_LOSS 0 PT#PLL_PFDENA_CHECK 0 PT#INT_FEEDBACK__MODE_RADIO 1 PT#INCLK1_FREQ_EDIT_CHANGED 1 PT#SYNTH_WRAPPER_GEN_POSTFIX 0 PT#CLKLOSS_CHECK 0 PT#PHASE_SHIFT_UNIT4 deg PT#PHASE_SHIFT_UNIT3 deg PT#PHASE_SHIFT_UNIT2 deg PT#PHASE_SHIFT_UNIT1 deg PT#PHASE_SHIFT_UNIT0 deg PT#BANDWIDTH_USE_AUTO 1 PT#HAS_MANUAL_SWITCHOVER 1 PT#MULT_FACTOR4 1 PT#MULT_FACTOR3 1 PT#MULT_FACTOR2 24 PT#MULT_FACTOR1 1 PT#MULT_FACTOR0 1 PT#SPREAD_USE 0 PT#GLOCKED_MODE_CHECK 0 PT#DUTY_CYCLE4 50.00000000 PT#DUTY_CYCLE3 50.00000000 PT#DUTY_CYCLE2 50.00000000 PT#SACN_INPUTS_CHECK 0 PT#DUTY_CYCLE1 50.00000000 PT#INTENDED_DEVICE_FAMILY {Cyclone III} PT#DUTY_CYCLE0 50.00000000 PT#PLL_TARGET_HARCOPY_CHECK 0 PT#INCLK1_FREQ_UNIT_CHANGED 1 PT#RECONFIG_FILE ALTPLL1372981370804131.mif PT#ACTIVECLK_CHECK 0
|
599 |
|
|
UP#locked used UP#c4 used UP#c3 used UP#c2 used UP#c1 used UP#c0 used UP#areset used UP#inclk0 used
|
600 |
|
|
IN#WIDTH_CLOCK 1 IN#CLK0_DUTY_CYCLE 1 IN#CLK2_DIVIDE_BY 1 IN#PLL_TARGET_HARCOPY_CHECK 1 IN#CLK3_DIVIDE_BY 1 IN#CLK4_MULTIPLY_BY 1 IN#CLK1_MULTIPLY_BY 1 IN#CLK3_DUTY_CYCLE 1 IN#CLK4_DIVIDE_BY 1 IN#SWITCHOVER_COUNT_EDIT 1 IN#INCLK0_INPUT_FREQUENCY 1 IN#PLL_LVDS_PLL_CHECK 1 IN#PLL_AUTOPLL_CHECK 1 IN#PLL_FASTPLL_CHECK 1 IN#CLK1_DUTY_CYCLE 1 IN#PLL_ENHPLL_CHECK 1 IN#CLK2_MULTIPLY_BY 1 IN#DIV_FACTOR4 1 IN#DIV_FACTOR3 1 IN#DIV_FACTOR2 1 IN#DIV_FACTOR1 1 IN#DIV_FACTOR0 1 IN#LVDS_MODE_DATA_RATE_DIRTY 1 IN#CLK4_DUTY_CYCLE 1 IN#GLOCK_COUNTER_EDIT 1 IN#CLK2_DUTY_CYCLE 1 IN#CLK0_DIVIDE_BY 1 IN#CLK3_MULTIPLY_BY 1 IN#MULT_FACTOR4 1 IN#MULT_FACTOR3 1 IN#MULT_FACTOR2 1 IN#MULT_FACTOR1 1 IN#MULT_FACTOR0 1 IN#CLK0_MULTIPLY_BY 1 IN#USE_MIL_SPEED_GRADE 1 IN#CLK1_DIVIDE_BY 1
|
601 |
|
|
MF#areset 1 MF#clk 1 MF#locked 1 MF#inclk 1
|
602 |
|
|
IF#locked {output 0} IF#reset {input 0} IF#clk {input 0} IF#readdata {output 32} IF#write {input 0} IF#phasedone {output 0} IF#c4 {output 0} IF#c3 {output 0} IF#address {input 2} IF#c2 {output 0} IF#c1 {output 0} IF#c0 {output 0} IF#writedata {input 32} IF#read {input 0} IF#areset {input 0}
|
603 |
|
|
|
604 |
|
|
|
605 |
|
|
|
606 |
|
|
|
607 |
|
|
|
608 |
|
|
|
609 |
|
|
|
610 |
|
|
|
611 |
|
|
|
612 |
|
|
|
613 |
|
|
|
614 |
|
|
|
615 |
|
|
|
616 |
|
|
|
617 |
|
|
|
618 |
|
|
|
619 |
|
|
|
620 |
|
|
|
621 |
|
|
|
622 |
|
|
kind="fm_vga_wrapper"
|
623 |
|
|
version="1.0"
|
624 |
|
|
enabled="1"
|
625 |
|
|
name="fm_vga_wrapper_0">
|
626 |
|
|
|
627 |
|
|
|
628 |
|
|
|
629 |
|
|
|
630 |
|
|
kind="reset"
|
631 |
|
|
version="13.1"
|
632 |
|
|
start="clk_0.clk_reset"
|
633 |
|
|
end="nios2_qsys_0.reset_n" />
|
634 |
|
|
|
635 |
|
|
kind="reset"
|
636 |
|
|
version="13.1"
|
637 |
|
|
start="clk_0.clk_reset"
|
638 |
|
|
end="new_sdram_controller_0.reset" />
|
639 |
|
|
|
640 |
|
|
kind="avalon"
|
641 |
|
|
version="13.1"
|
642 |
|
|
start="nios2_qsys_0.data_master"
|
643 |
|
|
end="new_sdram_controller_0.s1">
|
644 |
|
|
|
645 |
|
|
|
646 |
|
|
|
647 |
|
|
|
648 |
|
|
|
649 |
|
|
kind="reset"
|
650 |
|
|
version="13.1"
|
651 |
|
|
start="clk_0.clk_reset"
|
652 |
|
|
end="sysid_qsys_0.reset" />
|
653 |
|
|
|
654 |
|
|
kind="avalon"
|
655 |
|
|
version="13.1"
|
656 |
|
|
start="nios2_qsys_0.data_master"
|
657 |
|
|
end="sysid_qsys_0.control_slave">
|
658 |
|
|
|
659 |
|
|
|
660 |
|
|
|
661 |
|
|
|
662 |
|
|
|
663 |
|
|
kind="reset"
|
664 |
|
|
version="13.1"
|
665 |
|
|
start="clk_0.clk_reset"
|
666 |
|
|
end="jtag_uart_0.reset" />
|
667 |
|
|
|
668 |
|
|
kind="avalon"
|
669 |
|
|
version="13.1"
|
670 |
|
|
start="nios2_qsys_0.data_master"
|
671 |
|
|
end="jtag_uart_0.avalon_jtag_slave">
|
672 |
|
|
|
673 |
|
|
|
674 |
|
|
|
675 |
|
|
|
676 |
|
|
|
677 |
|
|
kind="reset"
|
678 |
|
|
version="13.1"
|
679 |
|
|
start="nios2_qsys_0.jtag_debug_module_reset"
|
680 |
|
|
end="nios2_qsys_0.reset_n" />
|
681 |
|
|
|
682 |
|
|
kind="avalon"
|
683 |
|
|
version="13.1"
|
684 |
|
|
start="nios2_qsys_0.instruction_master"
|
685 |
|
|
end="nios2_qsys_0.jtag_debug_module">
|
686 |
|
|
|
687 |
|
|
|
688 |
|
|
|
689 |
|
|
|
690 |
|
|
|
691 |
|
|
kind="avalon"
|
692 |
|
|
version="13.1"
|
693 |
|
|
start="nios2_qsys_0.data_master"
|
694 |
|
|
end="nios2_qsys_0.jtag_debug_module">
|
695 |
|
|
|
696 |
|
|
|
697 |
|
|
|
698 |
|
|
|
699 |
|
|
|
700 |
|
|
kind="interrupt"
|
701 |
|
|
version="13.1"
|
702 |
|
|
start="nios2_qsys_0.d_irq"
|
703 |
|
|
end="jtag_uart_0.irq">
|
704 |
|
|
|
705 |
|
|
|
706 |
|
|
|
707 |
|
|
|
708 |
|
|
kind="avalon"
|
709 |
|
|
version="13.1"
|
710 |
|
|
start="nios2_qsys_0.data_master"
|
711 |
|
|
end="pio_0.s1">
|
712 |
|
|
|
713 |
|
|
|
714 |
|
|
|
715 |
|
|
|
716 |
|
|
|
717 |
|
|
kind="interrupt"
|
718 |
|
|
version="13.1"
|
719 |
|
|
start="nios2_qsys_0.d_irq"
|
720 |
|
|
end="timer_0.irq">
|
721 |
|
|
|
722 |
|
|
|
723 |
|
|
|
724 |
|
|
kind="reset"
|
725 |
|
|
version="13.1"
|
726 |
|
|
start="clk_0.clk_reset"
|
727 |
|
|
end="timer_0.reset" />
|
728 |
|
|
|
729 |
|
|
kind="avalon"
|
730 |
|
|
version="13.1"
|
731 |
|
|
start="nios2_qsys_0.data_master"
|
732 |
|
|
end="timer_0.s1">
|
733 |
|
|
|
734 |
|
|
|
735 |
|
|
|
736 |
|
|
|
737 |
|
|
|
738 |
|
|
kind="reset"
|
739 |
|
|
version="13.1"
|
740 |
|
|
start="clk_0.clk_reset"
|
741 |
|
|
end="onchip_memory2_0.reset1" />
|
742 |
|
|
|
743 |
|
|
kind="avalon"
|
744 |
|
|
version="13.1"
|
745 |
|
|
start="nios2_qsys_0.instruction_master"
|
746 |
|
|
end="onchip_memory2_0.s1">
|
747 |
|
|
|
748 |
|
|
|
749 |
|
|
|
750 |
|
|
|
751 |
|
|
|
752 |
|
|
kind="interrupt"
|
753 |
|
|
version="13.1"
|
754 |
|
|
start="nios2_qsys_0.d_irq"
|
755 |
|
|
end="pio_0.irq">
|
756 |
|
|
|
757 |
|
|
|
758 |
|
|
|
759 |
|
|
kind="reset"
|
760 |
|
|
version="13.1"
|
761 |
|
|
start="clk_0.clk_reset"
|
762 |
|
|
end="epcs_flash_controller_0.reset" />
|
763 |
|
|
|
764 |
|
|
kind="avalon"
|
765 |
|
|
version="13.1"
|
766 |
|
|
start="nios2_qsys_0.data_master"
|
767 |
|
|
end="epcs_flash_controller_0.epcs_control_port">
|
768 |
|
|
|
769 |
|
|
|
770 |
|
|
|
771 |
|
|
|
772 |
|
|
|
773 |
|
|
kind="avalon"
|
774 |
|
|
version="13.1"
|
775 |
|
|
start="nios2_qsys_0.instruction_master"
|
776 |
|
|
end="epcs_flash_controller_0.epcs_control_port">
|
777 |
|
|
|
778 |
|
|
|
779 |
|
|
|
780 |
|
|
|
781 |
|
|
|
782 |
|
|
kind="interrupt"
|
783 |
|
|
version="13.1"
|
784 |
|
|
start="nios2_qsys_0.d_irq"
|
785 |
|
|
end="epcs_flash_controller_0.irq">
|
786 |
|
|
|
787 |
|
|
|
788 |
|
|
|
789 |
|
|
kind="reset"
|
790 |
|
|
version="13.1"
|
791 |
|
|
start="nios2_qsys_0.jtag_debug_module_reset"
|
792 |
|
|
end="epcs_flash_controller_0.reset" />
|
793 |
|
|
|
794 |
|
|
kind="reset"
|
795 |
|
|
version="13.1"
|
796 |
|
|
start="nios2_qsys_0.jtag_debug_module_reset"
|
797 |
|
|
end="new_sdram_controller_0.reset" />
|
798 |
|
|
|
799 |
|
|
kind="reset"
|
800 |
|
|
version="13.1"
|
801 |
|
|
start="nios2_qsys_0.jtag_debug_module_reset"
|
802 |
|
|
end="sysid_qsys_0.reset" />
|
803 |
|
|
|
804 |
|
|
kind="reset"
|
805 |
|
|
version="13.1"
|
806 |
|
|
start="nios2_qsys_0.jtag_debug_module_reset"
|
807 |
|
|
end="jtag_uart_0.reset" />
|
808 |
|
|
|
809 |
|
|
kind="reset"
|
810 |
|
|
version="13.1"
|
811 |
|
|
start="nios2_qsys_0.jtag_debug_module_reset"
|
812 |
|
|
end="pio_0.reset" />
|
813 |
|
|
|
814 |
|
|
kind="reset"
|
815 |
|
|
version="13.1"
|
816 |
|
|
start="nios2_qsys_0.jtag_debug_module_reset"
|
817 |
|
|
end="timer_0.reset" />
|
818 |
|
|
|
819 |
|
|
kind="reset"
|
820 |
|
|
version="13.1"
|
821 |
|
|
start="nios2_qsys_0.jtag_debug_module_reset"
|
822 |
|
|
end="onchip_memory2_0.reset1" />
|
823 |
|
|
|
824 |
|
|
kind="avalon"
|
825 |
|
|
version="13.1"
|
826 |
|
|
start="nios2_qsys_0.data_master"
|
827 |
|
|
end="onchip_memory2_0.s2">
|
828 |
|
|
|
829 |
|
|
|
830 |
|
|
|
831 |
|
|
|
832 |
|
|
|
833 |
|
|
kind="clock"
|
834 |
|
|
version="13.1"
|
835 |
|
|
start="clk_0.clk"
|
836 |
|
|
end="altpll_0.inclk_interface" />
|
837 |
|
|
|
838 |
|
|
kind="reset"
|
839 |
|
|
version="13.1"
|
840 |
|
|
start="clk_0.clk_reset"
|
841 |
|
|
end="altpll_0.inclk_interface_reset" />
|
842 |
|
|
|
843 |
|
|
kind="clock"
|
844 |
|
|
version="13.1"
|
845 |
|
|
start="altpll_0.c0"
|
846 |
|
|
end="new_sdram_controller_0.clk" />
|
847 |
|
|
|
848 |
|
|
kind="avalon"
|
849 |
|
|
version="13.1"
|
850 |
|
|
start="nios2_qsys_0.data_master"
|
851 |
|
|
end="altpll_0.pll_slave">
|
852 |
|
|
|
853 |
|
|
|
854 |
|
|
|
855 |
|
|
|
856 |
|
|
|
857 |
|
|
kind="clock"
|
858 |
|
|
version="13.1"
|
859 |
|
|
start="altpll_0.c0"
|
860 |
|
|
end="sysid_qsys_0.clk" />
|
861 |
|
|
|
862 |
|
|
|
863 |
|
|
|
864 |
|
|
|
865 |
|
|
kind="clock"
|
866 |
|
|
version="13.1"
|
867 |
|
|
start="altpll_0.c0"
|
868 |
|
|
end="epcs_flash_controller_0.clk" />
|
869 |
|
|
|
870 |
|
|
kind="reset"
|
871 |
|
|
version="13.1"
|
872 |
|
|
start="nios2_qsys_0.jtag_debug_module_reset"
|
873 |
|
|
end="altpll_0.inclk_interface_reset" />
|
874 |
|
|
|
875 |
|
|
kind="clock"
|
876 |
|
|
version="13.1"
|
877 |
|
|
start="altpll_0.c0"
|
878 |
|
|
end="nios2_qsys_0.clk" />
|
879 |
|
|
|
880 |
|
|
kind="clock"
|
881 |
|
|
version="13.1"
|
882 |
|
|
start="altpll_0.c0"
|
883 |
|
|
end="onchip_memory2_0.clk1" />
|
884 |
|
|
|
885 |
|
|
|
886 |
|
|
kind="reset"
|
887 |
|
|
version="13.1"
|
888 |
|
|
start="clk_0.clk_reset"
|
889 |
|
|
end="timer_1.reset" />
|
890 |
|
|
|
891 |
|
|
kind="avalon"
|
892 |
|
|
version="13.1"
|
893 |
|
|
start="nios2_qsys_0.data_master"
|
894 |
|
|
end="timer_1.s1">
|
895 |
|
|
|
896 |
|
|
|
897 |
|
|
|
898 |
|
|
|
899 |
|
|
|
900 |
|
|
kind="interrupt"
|
901 |
|
|
version="13.1"
|
902 |
|
|
start="nios2_qsys_0.d_irq"
|
903 |
|
|
end="timer_1.irq">
|
904 |
|
|
|
905 |
|
|
|
906 |
|
|
|
907 |
|
|
kind="avalon"
|
908 |
|
|
version="13.1"
|
909 |
|
|
start="nios2_qsys_0.instruction_master"
|
910 |
|
|
end="new_sdram_controller_0.s1">
|
911 |
|
|
|
912 |
|
|
|
913 |
|
|
|
914 |
|
|
|
915 |
|
|
|
916 |
|
|
kind="reset"
|
917 |
|
|
version="13.1"
|
918 |
|
|
start="nios2_qsys_0.jtag_debug_module_reset"
|
919 |
|
|
end="fm_3d_wrapper_0.reset_sink" />
|
920 |
|
|
|
921 |
|
|
kind="reset"
|
922 |
|
|
version="13.1"
|
923 |
|
|
start="clk_0.clk_reset"
|
924 |
|
|
end="fm_3d_wrapper_0.reset_sink" />
|
925 |
|
|
|
926 |
|
|
kind="avalon"
|
927 |
|
|
version="13.1"
|
928 |
|
|
start="nios2_qsys_0.data_master"
|
929 |
|
|
end="fm_3d_wrapper_0.avalon_slave">
|
930 |
|
|
|
931 |
|
|
|
932 |
|
|
|
933 |
|
|
|
934 |
|
|
|
935 |
|
|
kind="avalon"
|
936 |
|
|
version="13.1"
|
937 |
|
|
start="fm_3d_wrapper_0.avalon_master"
|
938 |
|
|
end="new_sdram_controller_0.s1">
|
939 |
|
|
|
940 |
|
|
|
941 |
|
|
|
942 |
|
|
|
943 |
|
|
|
944 |
|
|
kind="reset"
|
945 |
|
|
version="13.1"
|
946 |
|
|
start="nios2_qsys_0.jtag_debug_module_reset"
|
947 |
|
|
end="fm_vga_wrapper_0.reset_sink" />
|
948 |
|
|
|
949 |
|
|
kind="clock"
|
950 |
|
|
version="13.1"
|
951 |
|
|
start="altpll_0.c3"
|
952 |
|
|
end="fm_vga_wrapper_0.clock_sink_1" />
|
953 |
|
|
|
954 |
|
|
kind="avalon"
|
955 |
|
|
version="13.1"
|
956 |
|
|
start="nios2_qsys_0.data_master"
|
957 |
|
|
end="fm_vga_wrapper_0.avalon_slave">
|
958 |
|
|
|
959 |
|
|
|
960 |
|
|
|
961 |
|
|
|
962 |
|
|
|
963 |
|
|
kind="avalon"
|
964 |
|
|
version="13.1"
|
965 |
|
|
start="fm_vga_wrapper_0.avalon_master"
|
966 |
|
|
end="new_sdram_controller_0.s1">
|
967 |
|
|
|
968 |
|
|
|
969 |
|
|
|
970 |
|
|
|
971 |
|
|
|
972 |
|
|
kind="interrupt"
|
973 |
|
|
version="13.1"
|
974 |
|
|
start="nios2_qsys_0.d_irq"
|
975 |
|
|
end="fm_3d_wrapper_0.interrupt_sender">
|
976 |
|
|
|
977 |
|
|
|
978 |
|
|
|
979 |
|
|
kind="interrupt"
|
980 |
|
|
version="13.1"
|
981 |
|
|
start="nios2_qsys_0.d_irq"
|
982 |
|
|
end="fm_vga_wrapper_0.interrupt_sender">
|
983 |
|
|
|
984 |
|
|
|
985 |
|
|
|
986 |
|
|
kind="clock"
|
987 |
|
|
version="13.1"
|
988 |
|
|
start="altpll_0.c0"
|
989 |
|
|
end="fm_vga_wrapper_0.clock_sink" />
|
990 |
|
|
|
991 |
|
|
kind="clock"
|
992 |
|
|
version="13.1"
|
993 |
|
|
start="altpll_0.c0"
|
994 |
|
|
end="fm_3d_wrapper_0.clock_sink" />
|
995 |
|
|
|
996 |
|
|
|
997 |
|
|
|