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//// ////
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//// wiegand_defines.v ////
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//// ////
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//// ////
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//// This file is part of the Wiegand Controller ////
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//// http://www.opencores.org/projects/wiegand/ ////
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//// ////
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//// ////
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//// Author(s): ////
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//// Jeff Anderson ////
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//// jeaander@opencores.org ////
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//// ////
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//// ////
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//// All additional information is available in the README.txt ////
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//// file. ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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//// ////
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//// Copyright (C) 2013 Authors ////
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//// ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer. ////
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//// ////
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//// This source file is free software; you can redistribute it ////
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//// and/or modify it under the terms of the GNU Lesser General ////
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//// Public License as published by the Free Software Foundation; ////
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//// either version 2.1 of the License, or (at your option) any ////
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//// later version. ////
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//// ////
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//// This source is distributed in the hope that it will be ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
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//// PURPOSE. See the GNU Lesser General Public License for more ////
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//// details. ////
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//// ////
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//// You should have received a copy of the GNU Lesser General ////
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//// Public License along with this source; if not, download it ////
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//// from http://www.opencores.org/lgpl.shtml ////
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//// ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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//
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// Revisions at end of file
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//
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/********************** WISHBONE DEFINES ***************************/
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// define the WB bus width; uncomment ONE correct width
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//`define WB_WIDTH64
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`define WB_WIDTH32
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//`define WB_WIDTH16
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//`define WB_WIDTH08
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`ifdef WB_WIDTH64
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`define WB_WIDTH 64
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`define WB_DATA_W 63:0
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`define WIEGAND_WIDTH64
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`elsif WB_WIDTH32
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`define WB_WIDTH 32
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`define WB_DATA_W 31:0
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`define WIEGAND_WIDTH32
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`elsif WB_WIDTH16
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`define WB_WIDTH 16
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`define WB_DATA_W 15:0
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`define WIEGAND_WIDTH16
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`else
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`define WB_WIDTH 8
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`define WB_DATA_W 7:0
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`define WIEGAND_WIDTH8
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`endif
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//define the width of WB address
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`define WB_ADDR_WIDTH 6
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/*********************** WIEGAND DEFINES *****************************/
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//WIEGAND_WIDTH defined above
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`define WB_ADDR_WIDTH_DIV2 (`WIEGAND_ADDR)/2
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//define depth of FIFO for 64-bit message format; largest message I've seen in open literature; 64/`WB_WIDTH
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`define WIEGAND_FIFODEPTH 3
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//uncomment a single implementation of FIFO;
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`define WIEGAND_CUSTOMFIFO
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//set to base address of controller; base address is data FIFO, and the config registers are relative to it
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`define WIEG_ADDR_MASK 6'b111100
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`define WIEGAND_ADDR 6'h00
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`define WB_CNFG_PW (`WIEGAND_ADDR)+1
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`define WB_CNFG_P2P (`WIEGAND_ADDR)+2
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`define WB_CNFG_MSGSIZE (`WIEGAND_ADDR)+3
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//states in teh state machine
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`define BIT 3'b111
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`define LASTBIT 3'b100
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`define IDLE 3'b000
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`define DATA 3'b001
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`define TX 3'b101
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`define DONE 3'b110
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//////////////////////////////////////////////////////////////////////
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//
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// CVS Revision History
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//
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// $Log: $
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//
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