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/******************************************************************************
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*
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* Copyright (C) 2002 - 2016 Xilinx, Inc.  All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file xiic.h
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* @addtogroup iic_v3_1
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* @{
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* @details
39
*
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* XIic is the driver for an IIC master or slave device.
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*
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* In order to reduce the memory requirements of the driver the driver is
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* partitioned such that there are optional parts of the driver.
44
* Slave, master, and multimaster features are optional such that all these files
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* are not required at the same time.
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* In order to use the slave and multimaster features of the driver, the user
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* must call functions (XIic_SlaveInclude and XIic_MultiMasterInclude)
48
* to dynamically include the code. These functions may be called at any time.
49
*
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* Two sets of higher level API's are available in the XIic driver that can
51
* be used for Transmission/Reception in Master mode :
52
* - XIic_MasterSend()/ XIic_MasterRecv() which is used in normal mode.
53
* - XIic_DynMasterSend()/ XIic_DynMasterRecv() which is used in Dynamic mode.
54
*
55
* Similarly two sets of lower level API's are available in XIic driver that
56
* can be used for Transmission/Reception in Master mode:
57
* - XIic_Send()/ XIic_Recv() which is used in normal mode
58
* - XIic_DynSend()/ XIic_DynRecv() which is used in Dynamic mode.
59
*
60
* The user should use a single set of APIs as per his requirement and
61
* should not intermix them.
62
*
63
* All the driver APIs can be used for read, write and  combined mode of
64
* operations on the IIC bus.
65
*
66
* In the normal mode IIC support both 7-bit and 10-bit addressing, and in
67
* the dynamic mode support only 7-bit addressing.
68
*
69
* <b>Initialization & Configuration</b>
70
*
71
* The XIic_Config structure is used by the driver to configure itself. This
72
* configuration structure is typically created by the tool-chain based on HW
73
* build properties.
74
*
75
* To support multiple runtime loading and initialization strategies employed
76
* by various operating systems, the driver instance can be initialized in one
77
* of the following ways:
78
*
79
*   - XIic_Initialize() - The driver looks up its own
80
*     configuration structure created by the tool-chain based on an ID provided
81
*     by the tool-chain.
82
*
83
*   - XIic_CfgInitialize() - The driver uses a configuration structure provided
84
*     by the caller. If running in a system with address translation, the
85
*     provided virtual memory base address replaces the physical address present
86
*     in the configuration structure.
87
*
88
* <b>General Purpose Output</b>
89
* The IIC hardware provides a General Purpose Output Register that allows the
90
* user to connect general purpose outputs to devices, such as a write protect,
91
* for an EEPROM. This register is parameterizable in the hardware such that
92
* there could be zero bits in this register and in this case it will cause
93
* a bus error if read or written.
94
*
95
* <b>Bus Throttling</b>
96
*
97
* The IIC hardware provides bus throttling which allows either the device, as
98
* either a master or a slave, to stop the clock on the IIC bus. This feature
99
* allows the software to perform the appropriate processing for each interrupt
100
* without an unreasonable response restriction.  With this design, it is
101
* important for the user to understand the implications of bus throttling.
102
*
103
* <b>Repeated Start</b>
104
*
105
* An application can send multiple messages, as a master, to a slave device
106
* and re-acquire the IIC bus each time a message is sent. The repeated start
107
* option allows the application to send multiple messages without re-acquiring
108
* the IIC bus for each message. The transactions involving repeated start
109
* are also called combined transfers if there is Read and Write in the
110
* same transaction.
111
*
112
* The repeated start feature works with all the API's in XIic driver.
113
*
114
* The Repeated Start feature also could cause the application to lock up, or
115
* monopolize the IIC bus, should repeated start option be enabled and sequences
116
* of messages never end(periodic data collection).
117
* Also when repeated start is not disable before the last master message is
118
* sent or received, will leave the bus captive to the master, but unused.
119
*
120
* <b>Addressing</b>
121
*
122
* The IIC hardware is parameterized such that it can be built for 7 or 10
123
* bit addresses. The driver provides the ability to control which address
124
* size is sent in messages as a master to a slave device.  The address size
125
* which the hardware responds to as a slave is parameterized as 7 or 10 bits
126
* but fixed by the hardware build.
127
*
128
* Addresses are represented as hex values with no adjustment for the data
129
* direction bit as the software manages address bit placement. This is
130
* especially important as the bit placement is not handled the same depending
131
* on which options are used such as repeated start and 7 vs 10 bit addessing.
132
*
133
* <b>Data Rates</b>
134
*
135
* The IIC hardware is parameterized such that it can be built to support
136
* data rates from DC to 400KBit. The frequency of the interrupts which
137
* occur is proportional to the data rate.
138
*
139
* <b>Polled Mode Operation</b>
140
*
141
* This driver does not provide a polled mode of operation primarily because
142
* polled mode which is non-blocking is difficult with the amount of
143
* interaction with the hardware that is necessary.
144
*
145
* <b>Interrupts</b>
146
*
147
* The device has many interrupts which allow IIC data transactions as well
148
* as bus status processing to occur.
149
*
150
* The interrupts are divided into two types, data and status. Data interrupts
151
* indicate data has been received or transmitted while the status interrupts
152
* indicate the status of the IIC bus. Some of the interrupts, such as Not
153
* Addressed As Slave and Bus Not Busy, are only used when these specific
154
* events must be recognized as opposed to being enabled at all times.
155
*
156
* Many of the interrupts are not a single event in that they are continuously
157
* present such that they must be disabled after recognition or when undesired.
158
* Some of these interrupts, which are data related, may be acknowledged by the
159
* software by reading or writing data to the appropriate register, or must
160
* be disabled. The following interrupts can be continuous rather than single
161
* events.
162
*   - Data Transmit Register Empty/Transmit FIFO Empty
163
*   - Data Receive Register Full/Receive FIFO
164
*   - Transmit FIFO Half Empty
165
*   - Bus Not Busy
166
*   - Addressed As Slave
167
*   - Not Addressed As Slave
168
*
169
* The following interrupts are not passed directly to the application thru the
170
* status callback.  These are only used internally for the driver processing
171
* and may result in the receive and send handlers being called to indicate
172
* completion of an operation.  The following interrupts are data related
173
* rather than status.
174
*   - Data Transmit Register Empty/Transmit FIFO Empty
175
*   - Data Receive Register Full/Receive FIFO
176
*   - Transmit FIFO Half Empty
177
*   - Slave Transmit Complete
178
*
179
* <b>Interrupt To Event Mapping</b>
180
*
181
* The following table provides a mapping of the interrupts to the events which
182
* are passed to the status handler and the intended role (master or slave) for
183
* the event. Some interrupts can cause multiple events which are combined
184
* together into a single status event such as XII_MASTER_WRITE_EVENT and
185
* XII_GENERAL_CALL_EVENT
186
* <pre>
187
* Interrupt                         Event(s)                      Role
188
*
189
* Arbitration Lost Interrupt        XII_ARB_LOST_EVENT            Master
190
* Transmit Error                    XII_SLAVE_NO_ACK_EVENT        Master
191
* IIC Bus Not Busy                  XII_BUS_NOT_BUSY_EVENT        Master
192
* Addressed As Slave                XII_MASTER_READ_EVENT,        Slave
193
*                                   XII_MASTER_WRITE_EVENT,       Slave
194
*                                   XII_GENERAL_CALL_EVENT        Slave
195
* </pre>
196
* <b>Not Addressed As Slave Interrupt</b>
197
*
198
* The Not Addressed As Slave interrupt is not passed directly to the
199
* application thru the status callback.  It is used to determine the end of
200
* a message being received by a slave when there was no stop condition
201
* (repeated start).  It will cause the receive handler to be called to
202
* indicate completion of the operation.
203
*
204
* <b>RTOS Independence</b>
205
*
206
* This driver is intended to be RTOS and processor independent.  It works
207
* with physical addresses only.  Any needs for dynamic memory management,
208
* threads or thread mutual exclusion, virtual memory, or cache control must
209
* be satisfied by the layer above this driver.
210
*
211
* <pre>
212
* MODIFICATION HISTORY:
213
*
214
* Ver   Who  Date     Changes
215
* ----- ---- -------- -----------------------------------------------
216
* 1.01a rfp  10/19/01 release
217
* 1.01c ecm  12/05/02 new rev
218
* 1.01d jhl  10/08/03 Added general purpose output feature
219
* 1.01d sv   05/09/05 Changed the data being written to the Address/Control
220
*                     Register and removed the code for testing the
221
*                     Receive Data Register in XIic_SelfTest function of
222
*                     xiic_selftest.c source file
223
* 1.02a jvb  12/14/05 I separated dependency on the static config table and
224
*                     xparameters.h from the driver initialization by moving
225
*                     _Initialize and _LookupConfig to _sinit.c. I also added
226
*                     the new _CfgInitialize routine.
227
* 1.02a mta  03/09/06 Added a new function XIic_IsIicBusy() which returns
228
*                       whether IIC Bus is Busy or Free.
229
* 1.02a mta  03/09/06 Implemented Repeated Start in the Low Level Driver.
230
* 1.03a mta  07/17/06 Added files to support Dynamic IIC controller in High
231
*                     level driver. Added xiic_dyn_master.c. Added support
232
*                     for IIC Dynamic controller in Low level driver in xiic_l.c
233
* 1.13a wgr  03/22/07 Converted to new coding style.
234
* 1.13b ecm  11/29/07 added BB polling loops to the DynSend and DynRecv
235
*                     routines to handle the race condition with BNB in IISR.
236
* 1.14a sdm  08/22/08 Removed support for static interrupt handlers from the MDD
237
*                     file
238
* 1.14a ecm  11/13/08 changed BB polling loops in DynRecv to handle race
239
*                     condition, CR491889. DynSend was correct from v1.13.b
240
* 1.15a ktn  02/17/09 Fixed XIic_GetAddress() to return correct device address.
241
* 1.16a ktn  07/17/09 Updated the XIic_SelfTest() to test only Interrupt
242
*                     Registers.
243
* 2.00a ktn  10/22/09 Converted all register accesses to 32 bit access.,
244
*                     Removed the macro XIIC_RESET, XIic_Reset API should be
245
*                     used in its place.
246
*                     Removed the XIIC_CLEAR_STATS macro, XIic_ClearStats API
247
*                     should be used in its place.
248
*                     Removed the macro XIic_mEnterCriticalRegion,
249
*                     XIic_IntrGlobalDisable should be used in its place.
250
*                     Removed the macro XIic_mExitCriticalRegion,
251
*                     XIic_IntrGlobalEnable should be used in its place.
252
*                     Some of the macros have been renamed to remove _m from
253
*                     the name see the xiic_i.h and xiic_l.h file for further
254
*                     information (Example XIic_mClearIntr is now
255
*                     XIic_ClearIntr).
256
*                     Some of the macros have been renamed to be consistent,
257
*                     see the xiic_l.h file for further information
258
*                     (Example XIIC_WRITE_IIER is renamed as XIic_WriteIier).
259
*                     The driver has been updated to use the HAL APIs/macros
260
*                     (Example XASSERT_NONVOID is now Xil_AssertNonvoid)
261
* 2.01a ktn  04/09/10 Updated TxErrorhandler in xiic_intr.c to be called for
262
*                     Master Transmitter case based on Addressed As Slave (AAS)
263
*                     bit rather than MSMS bit(CR 540199).
264
* 2.02a sdm  10/08/10 Updated to disable the device at the end of the transfer,
265
*                     using Addressed As Slave (AAS) bit when addressed as
266
*                     slave in XIic_Send for CR565373.
267
* 2.03a rkv  01/25/11 Updated in NAAS interrupt handler to support data
268
*                     recieved less than FIFO size prior to NAAS interrupt.
269
*                     Fixed for CR590212.
270
* 2.04a sdm  07/22/11 Added IsSlaveSetAckOff flag to the instance structure.
271
*                     This flag is set when the Slave has set the Ack Off in the
272
*                     RecvSlaveData function (xiic_slave.c) and
273
*                     is cleared in the NotAddrAsSlaveHandler (xiic_slave.c)
274
*                     when the master has released the bus. This flag is
275
*                     to be used by slave applications for recovering when it
276
*                     has gone out of sync with the master for CR 615004.
277
*                     Removed a compiler warning in XIic_Send (xiic_l.c)
278
* 2.05a bss  02/05/12 Assigned RecvBufferPtr in XIic_MasterSend API and
279
*                     SendBufferPtr in XIic_MasterRecv to NULL in xiic_master.c
280
* 2.06a bss  02/14/13 Modified TxErrorHandler in xiic_intr.c to fix CR #686483
281
*                     Modified xiic_eeprom_example.c to fix CR# 683509.
282
*                     Modified bitwise OR to logical OR in
283
*                     XIic_InterruptHandler API in xiic_intr.c.
284
* 2.07a adk  18/04/13 Updated the code to avoid unused variable warnings
285
*                     when compiling with the -Wextra -Wall flags.
286
*                     Changes done in files xiic.c and xiic_i.h. CR:705001
287
* 2.08a adk  29/07/13 In Low level driver In repeated start condition the
288
*                     Direction of Tx bit must be disabled in recv condition
289
*                     It Fixes the CR:685759 Changes are done in the file
290
*                     xiic_l.c in the function XIic_Recv.
291
* 3.0   adk  19/12/13 Updated as per the New Tcl API's
292
* 3.1   adk  01/08/15 When configured as a slave return the actual number of
293
*                     bytes have been received/sent by the Master
294
*                     to the user callback (CR: 828504). Changes are made in the
295
*                     file xiic_slave.c.
296
* 3.2   sk   11/10/15 Used UINTPTR instead of u32 for Baseaddress CR# 867425.
297
*                     Changed the prototype of XIic_CfgInitialize API.
298
* 3.2   sd   18/02/16 In Low level driver in repeated start condition
299
*                     NACK for last byte is added. Changes are done in
300
*                     XIic_Recv for CR# 862303
301
* 3.3   sk   06/17/16 Added bus busy checks for slave send/recv and master
302
*                     send/recv.
303
* 3.3   als  06/27/16 XIic_IsIicBusy now a wrapper for XIic_CheckIsBusBusy.
304
* </pre>
305
*
306
******************************************************************************/
307
#ifndef XIIC_H                  /* prevent circular inclusions */
308
#define XIIC_H                  /* by using protection macros */
309
 
310
#ifdef __cplusplus
311
extern "C" {
312
#endif
313
 
314
/***************************** Include Files *********************************/
315
 
316
#include "xil_types.h"
317
#include "xil_assert.h"
318
#include "xstatus.h"
319
#include "xiic_l.h"
320
 
321
/************************** Constant Definitions *****************************/
322
 
323
/** @name Configuration options
324
 *
325
 * The following options may be specified or retrieved for the device and
326
 * enable/disable additional features of the IIC bus. Each of the options
327
 * are bit fields such that more than one may be specified.
328
 * @{
329
 */
330
/**
331
 * <pre>
332
 * XII_GENERAL_CALL_OPTION      The general call option allows an IIC slave to
333
 *                              recognized the general call address. The status
334
 *                              handler is called as usual indicating the device
335
 *                              has been addressed as a slave with a general
336
 *                              call. It is the application's responsibility to
337
 *                              perform any special processing for the general
338
 *                              call.
339
 *
340
 * XII_REPEATED_START_OPTION    The repeated start option allows multiple
341
 *                              messages to be sent/received on the IIC bus
342
 *                              without rearbitrating for the bus.  The messages
343
 *                              are sent as a series of messages such that the
344
 *                              option must be enabled before the 1st message of
345
 *                              the series, to prevent an stop condition from
346
 *                              being generated on the bus, and disabled before
347
 *                              the last message of the series, to allow the
348
 *                              stop condition to be generated.
349
 *
350
 * XII_SEND_10_BIT_OPTION       The send 10 bit option allows 10 bit addresses
351
 *                              to be sent on the bus when the device is a
352
 *                              master. The device can be configured to respond
353
 *                              as to 7 bit addresses even though it may be
354
 *                              communicating with other devices that support 10
355
 *                              bit addresses.  When this option is not enabled,
356
 *                              only 7 bit addresses are sent on the bus.
357
 *
358
 * </pre>
359
 */
360
#define XII_GENERAL_CALL_OPTION         0x00000001
361
#define XII_REPEATED_START_OPTION       0x00000002
362
#define XII_SEND_10_BIT_OPTION          0x00000004
363
 
364
/*@}*/
365
 
366
/** @name Status events
367
 *
368
 * The following status events occur during IIC bus processing and are passed
369
 * to the status callback. Each event is only valid during the appropriate
370
 * processing of the IIC bus. Each of these events are bit fields such that
371
 * more than one may be specified.
372
 * @{
373
 */
374
#define XII_BUS_NOT_BUSY_EVENT  0x00000001 /**< Bus transitioned to not busy */
375
#define XII_ARB_LOST_EVENT      0x00000002 /**< Arbitration was lost */
376
#define XII_SLAVE_NO_ACK_EVENT  0x00000004 /**< Slave did not ACK (had error) */
377
#define XII_MASTER_READ_EVENT   0x00000008 /**< Master reading from slave */
378
#define XII_MASTER_WRITE_EVENT  0x00000010 /**< Master writing to slave */
379
#define XII_GENERAL_CALL_EVENT  0x00000020 /**< General call to all slaves */
380
/*@}*/
381
 
382
 
383
/*
384
 * The following address types are used when setting and getting the addresses
385
 * of the driver. These are mutually exclusive such that only one or the other
386
 * may be specified.
387
 */
388
#define XII_ADDR_TO_SEND_TYPE    1 /**< Bus address of slave device */
389
#define XII_ADDR_TO_RESPOND_TYPE 2 /**< This device's bus address as slave */
390
 
391
/**************************** Type Definitions *******************************/
392
 
393
/**
394
 * This typedef contains configuration information for the device.
395
 */
396
typedef struct {
397
        u16 DeviceId;     /**< Unique ID  of device */
398
        UINTPTR BaseAddress;  /**< Device base address */
399
        int Has10BitAddr; /**< Does device have 10 bit address decoding */
400
        u8 GpOutWidth;    /**< Number of bits in general purpose output */
401
} XIic_Config;
402
 
403
/****************************************************************************/
404
/**
405
* This callback function data type is defined to handle the asynchronous
406
* processing of sent and received data of the IIC driver.  The application
407
* using this driver is expected to define a handler of this type to support
408
* interrupt driven mode. The handlers are called in an interrupt context such
409
* that minimal processing should be performed. The handler data type is
410
* utilized for both send and receive handlers.
411
*
412
* @param        CallBackRef is a callback reference passed in by the upper
413
*               layer when setting the callback functions, and passed back
414
*               to the upper layer when the callback is invoked. Its type is
415
*               unimportant to the driver  component, so it is a void pointer.
416
* @param        ByteCount indicates the number of bytes remaining to be sent or
417
*               received.  A value of zero indicates that the requested number
418
*               of bytes were sent or received.
419
*
420
******************************************************************************/
421
typedef void (*XIic_Handler) (void *CallBackRef, int ByteCount);
422
 
423
/******************************************************************************/
424
/**
425
* This callback function data type is defined to handle the asynchronous
426
* processing of status events of the IIC driver.  The application using
427
* this driver is expected to define a handler of this type to support
428
* interrupt driven mode. The handler is called in an interrupt context such
429
* that minimal processing should be performed.
430
*
431
* @param        CallBackRef is a callback reference passed in by the upper
432
*               layer when setting the callback functions, and passed back
433
*               to the upper layer when the callback is invoked. Its type is
434
*               unimportant to the driver component, so it is a void pointer.
435
* @param        StatusEvent indicates one or more status events that occurred.
436
*               See the definition of the status events above.
437
*
438
********************************************************************************/
439
typedef void (*XIic_StatusHandler) (void *CallBackRef, int StatusEvent);
440
 
441
/**
442
 * XIic statistics
443
 */
444
typedef struct {
445
        u8 ArbitrationLost;/**< Number of times arbitration was lost */
446
        u8 RepeatedStarts; /**< Number of repeated starts */
447
        u8 BusBusy;        /**< Number of times bus busy status returned */
448
        u8 RecvBytes;      /**< Number of bytes received */
449
        u8 RecvInterrupts; /**< Number of receive interrupts */
450
        u8 SendBytes;      /**< Number of transmit bytes received */
451
        u8 SendInterrupts; /**< Number of transmit interrupts */
452
        u8 TxErrors;       /**< Number of transmit errors (no ack) */
453
        u8 IicInterrupts;  /**< Number of IIC (device) interrupts */
454
} XIicStats;
455
 
456
/**
457
 * The XIic driver instance data. The user is required to allocate a
458
 * variable of this type for every IIC device in the system. A pointer
459
 * to a variable of this type is then passed to the driver API functions.
460
 */
461
typedef struct {
462
        XIicStats Stats;        /**< Statistics */
463
        UINTPTR BaseAddress;    /**< Device base address */
464
        int Has10BitAddr;       /**< TRUE when 10 bit addressing in design */
465
        int IsReady;            /**< Device is initialized and ready */
466
        int IsStarted;          /**< Device has been started */
467
        int AddrOfSlave;        /**< Slave Address writing to */
468
 
469
        u32 Options;            /**< Current operating options */
470
        u8 *SendBufferPtr;      /**< Buffer to send (state) */
471
        u8 *RecvBufferPtr;      /**< Buffer to receive (state) */
472
        u8 TxAddrMode;          /**< State of Tx Address transmission */
473
        int SendByteCount;      /**< Number of data bytes in buffer (state)  */
474
        int RecvByteCount;      /**< Number of empty bytes in buffer (state) */
475
 
476
        u32 BNBOnly;            /**< TRUE when BNB interrupt needs to */
477
                                /**< call callback  */
478
        u8 GpOutWidth;          /**< General purpose output width */
479
 
480
        XIic_StatusHandler StatusHandler; /**< Status Handler */
481
        void *StatusCallBackRef;  /**< Callback reference for status handler */
482
        XIic_Handler RecvHandler; /**< Receive Handler */
483
        void *RecvCallBackRef;    /**< Callback reference for Recv handler */
484
        XIic_Handler SendHandler; /**< Send Handler */
485
        void *SendCallBackRef;    /**< Callback reference for send handler */
486
        int IsDynamic;            /**< TRUE when Dynamic control is used */
487
        int IsSlaveSetAckOff;     /**< TRUE when Slave has set the ACK Off */
488
 
489
} XIic;
490
 
491
/***************** Macros (Inline Functions) Definitions *********************/
492
 
493
/*****************************************************************************
494
*
495
* This is a function which tells whether the I2C bus is busy or free.
496
*
497
* @param        InstancePtr points to the XIic instance to be worked on.
498
*
499
* @return
500
*               - TRUE if the bus is busy.
501
*               - FALSE if the bus is NOT busy.
502
*
503
* @note         None.
504
*
505
******************************************************************************/
506
static inline u32 XIic_IsIicBusy(XIic *InstancePtr)
507
{
508
        return XIic_CheckIsBusBusy(InstancePtr->BaseAddress);
509
}
510
 
511
/************************** Function Prototypes ******************************/
512
 
513
/*
514
 * Initialization functions in xiic_sinit.c
515
 */
516
int XIic_Initialize(XIic *InstancePtr, u16 DeviceId);
517
XIic_Config *XIic_LookupConfig(u16 DeviceId);
518
 
519
/*
520
 * Functions in xiic.c
521
 */
522
int XIic_CfgInitialize(XIic *InstancePtr, XIic_Config *Config,
523
                       UINTPTR EffectiveAddr);
524
 
525
int XIic_Start(XIic *InstancePtr);
526
int XIic_Stop(XIic *InstancePtr);
527
 
528
void XIic_Reset(XIic *InstancePtr);
529
 
530
int XIic_SetAddress(XIic *InstancePtr, int AddressType, int Address);
531
u16 XIic_GetAddress(XIic *InstancePtr, int AddressType);
532
 
533
int XIic_SetGpOutput(XIic *InstancePtr, u8 OutputValue);
534
int XIic_GetGpOutput(XIic *InstancePtr, u8 *OutputValuePtr);
535
 
536
u32 XIic_IsSlave(XIic *InstancePtr);
537
 
538
void XIic_SetRecvHandler(XIic *InstancePtr, void *CallBackRef,
539
                         XIic_Handler FuncPtr);
540
void XIic_SetSendHandler(XIic *InstancePtr, void *CallBackRef,
541
                         XIic_Handler FuncPtr);
542
void XIic_SetStatusHandler(XIic *InstancePtr, void *CallBackRef,
543
                           XIic_StatusHandler FuncPtr);
544
 
545
/*
546
 * Interrupt functions in xiic_intr.c
547
 */
548
void XIic_InterruptHandler(void *InstancePtr);
549
 
550
/*
551
 * Master send and receive functions in normal mode in xiic_master.c
552
 */
553
int XIic_MasterRecv(XIic *InstancePtr, u8 *RxMsgPtr, int ByteCount);
554
int XIic_MasterSend(XIic *InstancePtr, u8 *TxMsgPtr, int ByteCount);
555
 
556
/*
557
 * Master send and receive functions in dynamic mode in xiic_master.c
558
 */
559
int XIic_DynMasterRecv(XIic *InstancePtr, u8 *RxMsgPtr, u8 ByteCount);
560
int XIic_DynMasterSend(XIic *InstancePtr, u8 *TxMsgPtr, u8 ByteCount);
561
 
562
/*
563
 * Dynamic IIC Core Initialization.
564
 */
565
int XIic_DynamicInitialize(XIic *InstancePtr);
566
 
567
/*
568
 * Slave send and receive functions in xiic_slave.c
569
 */
570
void XIic_SlaveInclude(void);
571
int XIic_SlaveRecv(XIic *InstancePtr, u8 *RxMsgPtr, int ByteCount);
572
int XIic_SlaveSend(XIic *InstancePtr, u8 *TxMsgPtr, int ByteCount);
573
 
574
/*
575
 * Statistics functions in xiic_stats.c
576
 */
577
void XIic_GetStats(XIic *InstancePtr, XIicStats *StatsPtr);
578
void XIic_ClearStats(XIic *InstancePtr);
579
 
580
/*
581
 * Self test functions in xiic_selftest.c
582
 */
583
int XIic_SelfTest(XIic *InstancePtr);
584
 
585
/*
586
 * Bus busy Function in xiic.c
587
 */
588
u32 XIic_IsIicBusy(XIic *InstancePtr);
589
 
590
/*
591
 * Options functions in xiic_options.c
592
 */
593
void XIic_SetOptions(XIic *InstancePtr, u32 Options);
594
u32 XIic_GetOptions(XIic *InstancePtr);
595
 
596
/*
597
 * Multi-master functions in xiic_multi_master.c
598
 */
599
void XIic_MultiMasterInclude(void);
600
 
601
#ifdef __cplusplus
602
}
603
#endif
604
 
605
#endif /* end of protection macro */
606
/** @} */

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