OpenCores
URL https://opencores.org/ocsvn/xenie/xenie/trunk

Subversion Repositories xenie

[/] [xenie/] [trunk/] [examples/] [Eth_example/] [mb_fw/] [xenie_eth_test_womtd/] [src/] [timers.h] - Blame information for rev 4

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 4 DFC
/******************************************************************************
2
**
3
** (C) Copyright 2017 DFC Design, s.r.o., Brno, Czech Republic
4
** Author: Marek Kvas (m.kvas@dspfpga.com)
5
**
6
****************************************************************************
7
**
8
** This file is part of Xenia Ethernet Example project.
9
**
10
** Xenia Ethernet Example project is free software: you can
11
** redistribute it and/or modify it under the terms of
12
** the GNU Lesser General Public License as published by the Free
13
** Software Foundation, either version 3 of the License, or
14
** (at your option) any later version.
15
**
16
** Xenia Ethernet Example project is distributed in the hope that
17
** it will be useful, but WITHOUT ANY WARRANTY; without even
18
** the implied warranty of MERCHANTABILITY or FITNESS FOR A
19
** PARTICULAR PURPOSE.  See the GNU Lesser General Public License
20
** for more details.
21
**
22
** You should have received a copy of the GNU Lesser General Public
23
** License along with Xenia Ethernet Example project.  If not,
24
** see <http://www.gnu.org/licenses/>.
25
****************************************************************************
26
*/
27
 
28
#ifndef __TIMERS_H__
29
#define __TIMERS_H__
30
 
31
#include "xparameters.h"
32
#include "xtmrctr.h"
33
 
34
 
35
#define TIMER_FREQ                      XPAR_AXI_TIMER_0_CLOCK_FREQ_HZ
36
 
37
int timers_init(XTmrCtr* TmrCtrInstancePtr, u16 DeviceId);
38
void timers_udelay(u32 usDelay);
39
 
40
u32 timers_ms_now();
41
u32 timers_ms_elapsed(u32 start);
42
u32 timers_ms_elapsed_update(u32 *start);
43
u32 timers_ms_diff(u32 start, u32 stop);
44
 
45
#endif /* __TIMERS_H__ */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.