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DFC |
/******************************************************************************
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**
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** (C) Copyright 2017 DFC Design, s.r.o., Brno, Czech Republic
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** Author: Marek Kvas (m.kvas@dspfpga.com)
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**
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****************************************************************************
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**
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** This file is part of Xenia Ethernet Example project.
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**
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** Xenia Ethernet Example project is free software: you can
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** redistribute it and/or modify it under the terms of
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** the GNU Lesser General Public License as published by the Free
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** Software Foundation, either version 3 of the License, or
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** (at your option) any later version.
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**
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** Xenia Ethernet Example project is distributed in the hope that
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** it will be useful, but WITHOUT ANY WARRANTY; without even
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** the implied warranty of MERCHANTABILITY or FITNESS FOR A
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** PARTICULAR PURPOSE. See the GNU Lesser General Public License
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** for more details.
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**
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** You should have received a copy of the GNU Lesser General Public
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** License along with Xenia Ethernet Example project. If not,
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** see <http://www.gnu.org/licenses/>.
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****************************************************************************
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*/
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#include "sleep.h"
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#include "gpio.h"
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#include "udpip_rxaui.h"
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#include "eth_phy.h"
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void rxaui_core_reset()
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{
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/* Assert reset */
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gpio_set_out(GPIO0_BANK, GPIO0_RXAUI_RESET);
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usleep(10*1000);
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/* Deassert */
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gpio_clear_out(GPIO0_BANK, GPIO0_RXAUI_RESET);
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}
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void udp_ip_core_reset(int rst)
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{
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if (rst)
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gpio_clear_out(GPIO0_BANK, GPIO0_FRAME_GEN_NRST);
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else
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gpio_set_out(GPIO0_BANK, GPIO0_FRAME_GEN_NRST);
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}
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/*
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* Tell UDP/IP core what speed we are using.
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* If there is a mismatch between real link speed
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* and speed reported to UDP/IP core outgoing traffic
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* can be corrupted.
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*
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* Because of lack of synchronizers UDP/IP core should
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* be in reset during change
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*
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*/
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int udpip_core_set_speed(uint16_t phy_speed)
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{
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enum udp_ip_core_speed spd;
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int ret = 0;
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switch(phy_speed) {
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case PHY_SPEED_10M_FD:
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spd = spd_10M;
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break;
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case PHY_SPEED_100M_FD:
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spd = spd_100M;
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break;
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case PHY_SPEED_1GIG_FD:
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spd = spd_1G;
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break;
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case PHY_SPEED_10GIG_FD:
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spd = spd_10G;
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break;
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case PHY_SPEED_2P5GIG_FD:
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spd = spd_2G5;
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break;
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case PHY_SPEED_5GIG_FD:
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spd = spd_5G;
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break;
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default:
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spd = spd_10M;
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ret = -1;
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break;
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}
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/* Set speed */
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gpio_set_dir_field(GPIO4_BANK,GPIO4_DIR_LINK_SPEED_MASK,
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GPIO4_DIR_LINK_SPEED_SHIFT, spd);
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return ret;
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}
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/*
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* Set host MAC address, IP address and netmask for
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* UDP/IP core.
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* Because of lack of synchronizers UDP/IP core should
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* be in reset during change
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*/
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void udpip_core_set_host_info(u8* mac, u32 ip, u32 nemask)
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{
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/* MAC Address */
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gpio_set_field(GPIO4_BANK, GPIO4_HOST_MAC0_MASK,
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GPIO4_HOST_MAC0_SHIFT, mac[5] | (mac[4] << 8) |
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(mac[3] << 16) | (mac[2] << 24));
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gpio_set_dir_field(GPIO4_BANK, GPIO4_DIR_HOST_MAC1_MASK,
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GPIO4_DIR_HOST_MAC1_SHIFT, mac[1] | (mac[0] << 8));
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/* IP Address */
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gpio_set_field(GPIO5_BANK, GPIO5_HOST_IP_MASK, GPIO5_HOST_IP_SHIFT, ip);
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/* Netmask */
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gpio_set_dir_field(GPIO5_BANK, GPIO5_DIR_HOST_NETMASK_MASK,
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GPIO5_DIR_HOST_NETMASK_SHIFT, nemask);
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}
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