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#######################################################################
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# Clock frequencies and clock management #
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#######################################################################
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create_clock -period 6.40 [get_ports refclk_p]
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create_clock -period 6.40 [get_pins -of_objects [get_cells * -hierarchical -filter {REF_NAME=~ GTXE2_CHANNEL && NAME =~ *gt0*}] -filter {NAME =~ *TXOUTCLK}]
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set_false_path -to [get_cells -hierarchical -filter {NAME =~ */rxaui_block_i/reset_count_done_sync_i/sync_r_reg[0]}]
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set_false_path -to [get_cells -hierarchical -filter {NAME =~ */rxaui_block_i/plllocked_sync_i/sync_r_reg[0]}]
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##################################################################
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# MDIO-related constraints #
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##################################################################
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# set a false path from the mdc_in and mdc_in inputs to the first
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# stage of the sychronizer register
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set_false_path -to [get_cells -hierarchical -filter {NAME =~ */rxaui_0_core/*management_1/mdc_reg_reg[0]}]
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set_false_path -to [get_cells -hierarchical -filter {NAME =~ */rxaui_0_core/*management_1/mdio_in_reg_reg[0]}]
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# Constrain the MDIO to 2.5MHz. If you wish to overclock the MDIO
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# port you must alter this
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set_max_delay 400.000 -from [get_cells -hierarchical -filter {NAME =~ */rxaui_0_core/*management_1/mdio_interface_1/*_reg[*]}] -to [get_cells -hierarchical -filter {NAME =~ */rxaui_0_core/*management_1/*_reg[*]}]
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set_max_delay 400.000 -from [get_cells -hierarchical -filter {NAME =~ */rxaui_0_core/*management_1/mdio_interface_1/*_reg[*]}] -to [get_cells -hierarchical -filter {NAME =~ */rxaui_0_core/*management_1/*_reg}]
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set_max_delay 400.000 -from [get_cells -hierarchical -filter {NAME =~ */rxaui_0_core/*management_1/mdio_interface_1/*_reg}] -to [get_cells -hierarchical -filter {NAME =~ */rxaui_0_core/*management_1/*_reg[*]}]
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set_max_delay 400.000 -from [get_cells -hierarchical -filter {NAME =~ */rxaui_0_core/*management_1/mdio_interface_1/*_reg}] -to [get_cells -hierarchical -filter {NAME =~ */rxaui_0_core/*management_1/*_reg}]
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set_max_delay 400.000 -from [get_cells -hierarchical -filter {NAME =~ */rxaui_0_core/*management_1/mdio_interface_1/*_reg[*]}] -to [get_cells -hierarchical -filter {NAME =~ */rxaui_0_core/*management_1/mdio_interface_1/*_reg[*]}]
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set_max_delay 400.000 -from [get_cells -hierarchical -filter {NAME =~ */rxaui_0_core/*management_1/mdio_interface_1/*_reg[*]}] -to [get_cells -hierarchical -filter {NAME =~ */rxaui_0_core/*management_1/mdio_interface_1/*_reg}]
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set_max_delay 400.000 -from [get_cells -hierarchical -filter {NAME =~ */rxaui_0_core/*management_1/mdio_interface_1/*_reg}] -to [get_cells -hierarchical -filter {NAME =~ */rxaui_0_core/*management_1/mdio_interface_1/*_reg[*]}]
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set_max_delay 400.000 -from [get_cells -hierarchical -filter {NAME =~ */rxaui_0_core/*management_1/mdio_interface_1/*_reg}] -to [get_cells -hierarchical -filter {NAME =~ */rxaui_0_core/*management_1/mdio_interface_1/*_reg}]
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