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[/] [xgate/] [trunk/] [rtl/] [verilog/] [xgate_irq_encode.v] - Blame information for rev 72

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////////////////////////////////////////////////////////////////////////////////
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//
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//  Computer Operating Properly - XGATE interrupt encoder
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//
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//  Author: Bob Hayes
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//          rehayes@opencores.org
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//
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//  Downloaded from: http://www.opencores.org/projects/xgate.....
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//
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////////////////////////////////////////////////////////////////////////////////
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// Copyright (c) 2009, Robert Hayes
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//
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// This source file is free software: you can redistribute it and/or modify
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// it under the terms of the GNU Lesser General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// Supplemental terms.
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//     * Redistributions of source code must retain the above copyright
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//       notice, this list of conditions and the following disclaimer.
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//     * Neither the name of the <organization> nor the
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//       names of its contributors may be used to endorse or promote products
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//       derived from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY Robert Hayes ''AS IS'' AND ANY
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// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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// DISCLAIMED. IN NO EVENT SHALL Robert Hayes BE LIABLE FOR ANY
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// DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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// LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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// ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program.  If not, see <http://www.gnu.org/licenses/>.
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////////////////////////////////////////////////////////////////////////////////
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// 45678901234567890123456789012345678901234567890123456789012345678901234567890
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module xgate_irq_encode #(parameter MAX_CHANNEL = 127)    // Max XGATE Interrupt Channel Number
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(
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  output reg          [ 6:0] int_req,     // Encoded interrupt request to RISC
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  output     [MAX_CHANNEL:1] xgif,        // Interrupt outputs to Host
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  input      [MAX_CHANNEL:1] chan_req_i,  // XGATE Interrupt requests from peropherials
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  input      [MAX_CHANNEL:1] chan_bypass, // XGATE Interrupt bypass
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  input      [MAX_CHANNEL:1] xgif_status  // Interrupt outputs from RISC core
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);
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  wire [MAX_CHANNEL:1] chan_ena_gate;  // Ouptut of channel enable gating
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  // Pass non-bypassed interrupt inputs to XGATE RISC
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  assign chan_ena_gate = ~chan_bypass & chan_req_i;
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  // Set int_reg to the index of the index of the lowest chan_req_i input that is active
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  integer i = 0;
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  always @(chan_ena_gate)
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    begin
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      int_req = 0;
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        for (i = MAX_CHANNEL; i >= 1; i = i - 1)
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          if (chan_ena_gate[i] == 1'b1)
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            int_req = i;
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    end
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  // XGATE output interrupt mux
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  assign xgif = (chan_bypass & chan_req_i) | (~chan_bypass & xgif_status);
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endmodule  // xgate_irq_encode
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