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Bob Hayes -- August 10, 2010
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  SKIPJACK ENCRYPT/DECRYPT for xgate RISC processor core
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  Version 0.1 Basic SKIPJACK Encrypt and Decrypt modules for the Xgate
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   processor. These routines do the basic codebook encrypt and decrypt
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   functions, other modes of use such as output feedback,cipher feedback and
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   cipher block chaining can be added at the host code level or the routines
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   could be expanded to incorporate the required functionality.
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  This implementation is believed to be compliant with the SKIPJACK algorithm
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   as described in "SKIPJACK and KEA Algorithm Specifications" Version 2.0
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   dated 29 May 1998, which is available from the National Institute for
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   Standards and Technology:
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     http://csrc.nist.gov/groups/STM/cavp/documents/skipjack/skipjack.pdf
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  The algorithm encrypts a 64 bit block of data with an 80 bit key running
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   through the encryption loop 32 times. The encrypt/decrypt function has been
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   verified by running the key and plain text and cypher test given in the
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   specification document.(Some have noted that this only verifies about half
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   of the entries in the F Table.)
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  Basic encryption process takes approx. 6468 cycles
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  Basic decryption process takes approx. 6786 cycles
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 The code has several sections that are only needed for the Verilog test bench
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  and can be deleted in normal use. There is also some additional initialization
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  code that only needs to be done once and could be replaced by the host putting
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  the correct values in the appropriate RAM locations. These sections are marked
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  in the code. The starting address of the F Table in memory shouldn't be critical
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  although starting on a 256 byte boundary is convenient for debugging. The
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  algorithm variables use 8 bit address offset calculations so care should be
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  taken if the key is saved in a memory range that crosses an 8 bit addressing
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  boundary.
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