OpenCores
URL https://opencores.org/ocsvn/xge_mac/xge_mac/trunk

Subversion Repositories xge_mac

[/] [xge_mac/] [trunk/] [rtl/] [include/] [defines.v] - Blame information for rev 22

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 antanguay
//////////////////////////////////////////////////////////////////////
2
////                                                              ////
3
////  File name "defines.v"                                       ////
4
////                                                              ////
5
////  This file is part of the "10GE MAC" project                 ////
6
////  http://www.opencores.org/cores/xge_mac/                     ////
7
////                                                              ////
8
////  Author(s):                                                  ////
9
////      - A. Tanguay (antanguay@opencores.org)                  ////
10
////                                                              ////
11
//////////////////////////////////////////////////////////////////////
12
////                                                              ////
13
//// Copyright (C) 2008 AUTHORS. All rights reserved.             ////
14
////                                                              ////
15
//// This source file may be used and distributed without         ////
16
//// restriction provided that this copyright statement is not    ////
17
//// removed from the file and that any derivative work contains  ////
18
//// the original copyright notice and the associated disclaimer. ////
19
////                                                              ////
20
//// This source file is free software; you can redistribute it   ////
21
//// and/or modify it under the terms of the GNU Lesser General   ////
22
//// Public License as published by the Free Software Foundation; ////
23
//// either version 2.1 of the License, or (at your option) any   ////
24
//// later version.                                               ////
25
////                                                              ////
26
//// This source is distributed in the hope that it will be       ////
27
//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
28
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
29
//// PURPOSE.  See the GNU Lesser General Public License for more ////
30
//// details.                                                     ////
31
////                                                              ////
32
//// You should have received a copy of the GNU Lesser General    ////
33
//// Public License along with this source; if not, download it   ////
34
//// from http://www.opencores.org/lgpl.shtml                     ////
35
////                                                              ////
36
//////////////////////////////////////////////////////////////////////
37
 
38 22 antanguay
// Different synthesis option for FIFOs
39
// `define XIL
40 2 antanguay
 
41
// CPU Registers
42
 
43
`define CPUREG_CONFIG0      8'h00
44
`define CPUREG_INT_PENDING  8'h08
45
`define CPUREG_INT_STATUS   8'h0c
46
`define CPUREG_INT_MASK     8'h10
47
 
48
 
49
// Ethernet codes
50
 
51
`define IDLE       8'h07
52
`define PREAMBLE   8'h55
53
`define SEQUENCE   8'h9c
54
`define SFD        8'hd5
55
`define START      8'hfb
56 12 antanguay
`define TERMINATE  8'hfd
57 2 antanguay
`define ERROR      8'hfe
58
 
59
 
60
 
61
`define LINK_FAULT_OK      2'd0
62
`define LINK_FAULT_LOCAL   2'd1
63
`define LINK_FAULT_REMOTE  2'd2
64
 
65
`define FAULT_SEQ_LOCAL  1'b0
66
`define FAULT_SEQ_REMOTE 1'b1
67
 
68
`define LOCAL_FAULT   8'd1
69
`define REMOTE_FAULT  8'd2
70
 
71
`define PAUSE_FRAME   48'h010000c28001
72
 
73
`define LANE0        7:0
74
`define LANE1       15:8
75
`define LANE2      23:16
76
`define LANE3      31:24
77
`define LANE4      39:32
78
`define LANE5      47:40
79
`define LANE6      55:48
80
`define LANE7      63:56
81
 
82
 
83 6 antanguay
`define TXSTATUS_NONE       8'h0
84
`define TXSTATUS_EOP        3'd6
85
`define TXSTATUS_SOP        3'd7
86 2 antanguay
 
87 6 antanguay
`define RXSTATUS_NONE       8'h0
88
`define RXSTATUS_ERR        3'd5
89
`define RXSTATUS_EOP        3'd6
90
`define RXSTATUS_SOP        3'd7
91 2 antanguay
 
92
 
93
//
94
// FIFO Size: 8 * (2^AWIDTH) will be the size in bytes
95
//            7 --> 128 entries, 1024 bytes for data fifo
96
//
97
`define TX_DATA_FIFO_AWIDTH 7
98
`define RX_DATA_FIFO_AWIDTH 7
99
 
100
//
101
// FIFO Size: Holding FIFOs are 16 deep
102
//
103
`define TX_HOLD_FIFO_AWIDTH 4
104
`define RX_HOLD_FIFO_AWIDTH 4
105
 
106
 
107
// Memory types
108
`define MEM_AUTO_SMALL 1
109
`define MEM_AUTO_MEDIUM 2
110
 
111
 
112 12 antanguay
// Changed system packet interface to big endian (12/12/2009)
113
// Comment out to use legacy mode
114
`define BIGENDIAN

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.