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antanguay |
/**
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* 10 GE MAC Core verification environment monitor file.
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* @file: monitor.sv
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* @author: Pratik Mahajan
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* @par Contact: pratik@e-pigeonpost.com
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* @par Company: UCSC (SV 1896 Systemverilog for advanced verification course)
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*
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* @version: $LastChangedRevision$
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* @par Last Changed Date:
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* $LastChangedDate$
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* @par Last Changed By
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* $LastChangedBy$
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*/
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/**
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* Monitor class to collect packet from DUT (10 GE MAC Core) in test environment.
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* Monitor only communicate with receive interface of DUT and collects information
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* about packet, this information can be validated with expected results for error
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* checking and proper working of protocol.
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* @class monitor
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* @par virtual macCoreInterface to collect data from interface.
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*/
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class monitor;
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virtual macCoreInterface virtualMacCoreInterface; ///< virtual interface to connect class type to RTL / module type
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mailbox monitor2Scoreboard;
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const bit ASSERT = 1'b1; ///< to assert sequence while receiving packet from DUT
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const bit DEASSERT = 1'b0; ///< to de-assert sequence while receiving packet from DUT
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// packetFrame monitorPacket;
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/**
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* Constructor for monitor class -- main purpose is to connect design interface with monitor class virtual interface.
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* @param virtualInterface -- input to constructor passed down by env class
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* @return: NA (creates an object of type monitor and returns a handle)
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*/
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function new (virtual macCoreInterface virtualInterface,
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mailbox monitor2Scoreboard
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);
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this.virtualMacCoreInterface = virtualInterface;
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this.monitor2Scoreboard = monitor2Scoreboard;
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endfunction // new
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/**
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* Task to collect data from output of RTL from interface as bus.
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* collect_packet should follow protocol requirements specified in requirement specifications (unless it is used for error injection)
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* Protocol requirements:
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* Always check for receiveAvailable (need to do it in testcase or environment? but need to be running under forever)
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* if(receiveAvailable) start packet collect
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* assert receiveReadEnable
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* until receive is not complete
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* if receiveValid
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* if receiveStartOfPacket -- print/do nothing/start
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* packet.data = receiveData
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* if receiveEndOfPacket -- finish collecting packet
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* deassert receiveReadEnable
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* display some stuff
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*
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* MAY NEED TO LOOK IN OTHER FLAGS AS ERROR AND STUFF
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* creating new packet itself will take care of incrementing
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*/
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`define receivedPacket { receiveMacCore.receivedData[7], receiveMacCore.receivedData[6], receiveMacCore.receivedData[5], receiveMacCore.receivedData[4], receiveMacCore.receivedData[3], receiveMacCore.receivedData[2], receiveMacCore.receivedData[1], receiveMacCore.receivedData[0] }
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task collect_packet ();
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packet receiveMacCore; ///< object of type packet that will be collected from DUT.
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virtualMacCoreInterface.clockingTxRx.receiveReadEnable <= ASSERT;
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do begin
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receiveMacCore = new (RECEIVE);
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@(virtualMacCoreInterface.clockingTxRx);
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if (virtualMacCoreInterface.clockingTxRx.receiveValid) begin
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receiveMacCore.startOfPacket = virtualMacCoreInterface.clockingTxRx.receiveStartOfPacket;
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receiveMacCore.endOfPacket = virtualMacCoreInterface.clockingTxRx.receiveEndOfPacket;
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receiveMacCore.packetLengthModulus = virtualMacCoreInterface.clockingTxRx.receivePacketLengthModulus;
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if (virtualMacCoreInterface.clockingTxRx.receiveStartOfPacket) begin
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$display ("Starting to receive packet \n");
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end
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`receivedPacket = virtualMacCoreInterface.clockingTxRx.receivedData;
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receiveMacCore.print (RECEIVE);
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monitor2Scoreboard.put (receiveMacCore);
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end // if (virtualMacCoreInterface.clockingTxRx.receiveValid)
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end while (!virtualMacCoreInterface.clockingTxRx.receiveEndOfPacket); // UNMATCHED !!
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virtualMacCoreInterface.clockingTxRx.receiveReadEnable <= DEASSERT;
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endtask // collect_packet
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endclass // monitor
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