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[/] [xilinx_virtex_fp_library/] [trunk/] [GeneralPrecMAFMappedConversions/] [effective_op.v] - Blame information for rev 16

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1 16 constantin
`timescale 1ns / 1ps
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//////////////////////////////////////////////////////////////////////////////////
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// Company: 
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// Engineer: 
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// 
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// Create Date:    19:08:41 10/21/2013 
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// Design Name: 
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// Module Name:    effective_op 
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// Project Name: 
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// Target Devices: 
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// Tool versions: 
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// Description: 
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//
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// Dependencies: 
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//
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// Revision: 
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// Revision 0.01 - File Created
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// Additional Comments: 
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//
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//////////////////////////////////////////////////////////////////////////////////
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module effective_op(    input sign_a,
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                                                        input sign_b,
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                                                        input sign_c,
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                                                        input sub,
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                                                        output reg eff_sub);
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        wire [2:0] sign_string;
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        assign sign_string = {sub, sign_c, sign_a^sign_b};
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        always
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                @(*)
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        begin
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                case(sign_string)
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                        3'b000: eff_sub = 1'b0;
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                        3'b001: eff_sub = 1'b1;
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                        3'b010: eff_sub = 1'b1;
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                        3'b011: eff_sub = 1'b0;
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                        3'b100: eff_sub = 1'b1;
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                        3'b101: eff_sub = 1'b0;
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                        3'b110: eff_sub = 1'b0;
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                        3'b111: eff_sub = 1'b1;
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                        default:        eff_sub = 1'b0;
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                endcase
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        end
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endmodule

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