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eejlny |
JDF G
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PROJECT level1r
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DESIGN level1r
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DEVFAM virtex4
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DEVICE xc4vlx25
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DEVSPEED -10
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DEVPKG ff668
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DEVTOPLEVELMODULETYPE HDL
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DEVSIMULATOR Modelsim
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DEVGENERATEDSIMULATIONMODEL VHDL
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SOURCE ..\..\src\reg_temp.vhd
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SOURCE ..\..\src\tech_package.vhd
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SOURCE ..\..\src\mux_ram.vhd
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SOURCE ..\..\src\sync_ram_register.vhd
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SOURCE ..\..\src\location_equal.vhd
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#SOURCE ..\..\src\ff_finish_decoding.vhd
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SOURCE ..\..\src\out_register.vhd
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SOURCE ..\..\src\decode_mt_2.vhd
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SOURCE ..\..\src\decode4_16_inv.vhd
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SOURCE ..\..\src\decomp_assem_9.vhd
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SOURCE ..\..\src\decode_miss_2.vhd
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SOURCE ..\..\src\length_selection_2.vhd
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SOURCE ..\..\src\max_pbc_length_2.vhd
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SOURCE ..\..\src\mask_bit.vhd
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SOURCE ..\..\src\mask_word.vhd
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SOURCE ..\..\src\full_match_d.vhd
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SOURCE ..\..\src\miss_type_coder.vhd
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| 28 |
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SOURCE ..\..\src\decomp_decode_4.vhd
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SOURCE ..\..\src\latch6.vhd
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SOURCE ..\..\src\latch7.vhd
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SOURCE ..\..\src\latch133.vhd
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SOURCE ..\..\src\pointer_first.vhd
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SOURCE ..\..\src\pointer_1.vhd
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SOURCE ..\..\src\pointer_2.vhd
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SOURCE ..\..\src\pointer_3.vhd
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SOURCE ..\..\src\pointer_4.vhd
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SOURCE ..\..\src\pointer_5.vhd
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SOURCE ..\..\src\pointer_6.vhd
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SOURCE ..\..\src\pointer_7.vhd
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SOURCE ..\..\src\pointer_8.vhd
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SOURCE ..\..\src\pointer_9.vhd
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SOURCE ..\..\src\pointer_10.vhd
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SOURCE ..\..\src\pointer_11.vhd
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SOURCE ..\..\src\pointer_12.vhd
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SOURCE ..\..\src\pointer_13.vhd
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SOURCE ..\..\src\pointer_14.vhd
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SOURCE ..\..\src\pointer_15.vhd
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| 48 |
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SOURCE ..\..\src\pointer_array.vhd
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| 49 |
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SOURCE ..\..\src\buffer_counter_write_9bits.vhd
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| 50 |
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SOURCE ..\..\src\buffer_counter_read_9bits.vhd
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| 51 |
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SOURCE ..\..\src\crc_unit_c_32.vhd
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| 52 |
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SOURCE ..\..\src\crc_unit_d_32.vhd
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| 53 |
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#SOURCE ..\..\src\cam_bit_first.vhd
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| 54 |
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SOURCE ..\..\src\input_counter_9bits.vhd
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| 55 |
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#SOURCE ..\..\src\cam_byte_first.vhd
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| 56 |
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SOURCE ..\..\src\cam_bit.vhd
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| 57 |
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SOURCE ..\..\src\cam_byte.vhd
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| 58 |
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#SOURCE ..\..\src\cam_word_first.vhd
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| 59 |
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SOURCE ..\..\src\cam_word_zero.vhd
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| 60 |
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SOURCE ..\..\src\cam_array_zero.vhd
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| 61 |
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SOURCE ..\..\src\lc_assembler.vhd
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| 62 |
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SOURCE ..\..\src\mc_mux_3d.vhd
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| 63 |
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SOURCE ..\..\src\mc_mux_3c.vhd
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| 64 |
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SOURCE ..\..\src\mg_logic_2.vhd
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| 65 |
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SOURCE ..\..\src\mld_decode.vhd
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| 66 |
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SOURCE ..\..\src\mld_dprop_5.vhd
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| 67 |
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SOURCE ..\..\src\ob_assem.vhd
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| 68 |
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SOURCE ..\..\src\PIPELINE_R1_D.vhd
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| 69 |
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SOURCE ..\..\src\shift_literal.vhd
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| 70 |
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SOURCE ..\..\src\oda_cell_2_d.vhd
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SOURCE ..\..\src\oda_cell_2_d_1.vhd
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SOURCE ..\..\src\oda_cell_2.vhd
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| 73 |
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SOURCE ..\..\src\oda_register_d.vhd
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SOURCE ..\..\src\oda_register.vhd
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| 75 |
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SOURCE ..\..\src\PIPELINE_R2_D.vhd
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| 76 |
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SOURCE ..\..\src\rli_counter_d.vhd
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| 77 |
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SOURCE ..\..\src\rli_counter_c.vhd
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| 78 |
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SOURCE ..\..\src\RLI_DR.vhd
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| 79 |
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SOURCE ..\..\src\RLI_DCU.vhd
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| 80 |
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SOURCE ..\..\src\mt_coder.vhd
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| 81 |
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SOURCE ..\..\src\ob_assembler.vhd
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| 82 |
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SOURCE ..\..\src\ov_latch.vhd
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| 83 |
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SOURCE ..\..\src\pc_generate.vhd
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| 84 |
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SOURCE ..\..\src\nfl_counters2.vhd
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| 85 |
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SOURCE ..\..\src\mld_dprop.vhd
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| 86 |
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SOURCE ..\..\src\mld_logic_3_1_2.vhd
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| 87 |
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SOURCE ..\..\src\mld_logic_3_2_2.vhd
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| 88 |
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SOURCE ..\..\src\cm_assembler.vhd
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| 89 |
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SOURCE ..\..\src\cml_assembler.vhd
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| 90 |
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SOURCE ..\..\src\csm_c_2.vhd
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| 91 |
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SOURCE ..\..\src\csm_d.vhd
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| 92 |
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SOURCE ..\..\src\latch98.vhd
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| 93 |
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SOURCE ..\..\src\PIPELINE_R0.vhd
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| 94 |
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SOURCE ..\..\src\PIPELINE_R1.vhd
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| 95 |
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SOURCE ..\..\src\PIPELINE_R4.vhd
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| 96 |
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#SOURCE ..\..\src\ff_v3_delay.vhd
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| 97 |
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SOURCE ..\..\src\bsl_tc_2_c.vhd
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| 98 |
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SOURCE ..\..\src\bsl_tc_2_d.vhd
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| 99 |
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SOURCE ..\..\src\c_bs_counter_c.vhd
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| 100 |
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SOURCE ..\..\src\c_bs_counter_d.vhd
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| 101 |
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SOURCE ..\..\src\encode16_4.vhd
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| 102 |
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SOURCE ..\..\src\CODING_BUFFER_CU.vhd
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| 103 |
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SOURCE ..\..\src\decode_logic_pbc.vhd
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| 104 |
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SOURCE ..\..\src\sreg.vhd
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| 105 |
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SOURCE ..\..\src\count_delay.vhd
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| 106 |
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SOURCE ..\..\src\rli_cr.vhd
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| 107 |
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SOURCE ..\..\src\rli_ccu.vhd
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| 108 |
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SOURCE ..\..\src\rli_coding_logic.vhd
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| 109 |
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SOURCE ..\..\src\level2_4d_pbc.vhd
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| 110 |
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SOURCE ..\..\src\level2_4ca.vhd
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| 111 |
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SOURCE ..\..\src\DECODING_BUFFER_CU_2.vhd
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| 112 |
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SOURCE ..\..\src\BUFFER_COUNTER_READ.vhd
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| 113 |
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SOURCE ..\..\src\BUFFER_COUNTER_WRITE.vhd
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| 114 |
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SOURCE ..\..\src\DECODING_BUFFER_32_64_2.vhd
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| 115 |
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SOURCE ..\..\src\CODING_BUFFER_64_32.vhd
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| 116 |
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SOURCE ..\..\src\control_reg.vhd
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| 117 |
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SOURCE ..\..\src\reg_file_c.vhd
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| 118 |
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SOURCE ..\..\src\reg_file_d.vhd
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| 119 |
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SOURCE ..\..\src\parser.vhd
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| 120 |
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SOURCE ..\..\src\parser_register.vhd
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| 121 |
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SOURCE ..\..\src\parser_concatenator.vhd
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| 122 |
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SOURCE ..\..\src\parsing_unit.vhd
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| 123 |
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SOURCE ..\..\src\input_counter.vhd
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| 124 |
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SOURCE ..\..\src\input_buffer_cu.vhd
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| 125 |
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SOURCE ..\..\src\input_buffer_32_32.vhd
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| 126 |
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SOURCE ..\..\src\assembler.vhd
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| 127 |
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SOURCE ..\..\src\assembler_register.vhd
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| 128 |
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SOURCE ..\..\src\assembling_unit.vhd
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| 129 |
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SOURCE ..\..\src\output_buffer_cu.vhd
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| 130 |
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SOURCE ..\..\src\output_buffer_32_32.vhd
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| 131 |
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#SOURCE ..\..\src\crc_unit_c.vhd
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| 132 |
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#SOURCE ..\..\src\crc_unit_d.vhd
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| 133 |
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SOURCE ..\..\src\level1rc.vhd
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| 134 |
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SOURCE ..\..\src\level1rd.vhd
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| 135 |
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SOURCE ..\..\src\level1r.vhd
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| 136 |
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SOURCE ..\..\src\tb_level1cr.vhd
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| 137 |
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SUBLIB xil_lib VhdlLibrary vhdl
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| 138 |
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LIBFILE ..\..\lib\xil_lib\DP_RAM_XILINX_256.vhd xil_lib vhdl
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| 139 |
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LIBFILE ..\..\lib\xil_lib\DP_RAM_XILINX_512.vhd xil_lib vhdl
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| 140 |
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LIBFILE ..\..\lib\xil_lib\DP_RAM_XILINX_MASK.vhd xil_lib vhdl
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| 141 |
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LIBFILE ..\..\lib\xil_lib\xil_comp.vhd xil_lib vhdl
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| 142 |
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SUBLIB dzx VhdlLibrary vhdl
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| 143 |
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LIBFILE ..\..\lib\dzx\attributes_pkg.vhd dzx vhdl
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| 144 |
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LIBFILE ..\..\lib\dzx\bit_arith_pkg.vhd dzx vhdl
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| 145 |
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LIBFILE ..\..\lib\dzx\bit_arith_pkg_body.vhd dzx vhdl
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| 146 |
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LIBFILE ..\..\lib\dzx\bit_utils_pkg.vhd dzx vhdl
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| 147 |
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LIBFILE ..\..\lib\dzx\bit_utils_pkg_body.vhd dzx vhdl
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| 148 |
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SUBLIB work VhdlLibrary vhdl
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