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[/] [xmatchpro/] [trunk/] [xmw4-comdec/] [xmatch_sim7/] [isim/] [testbench_isim_beh.exe.sim/] [xilinxcorelib/] [a_3834233695_3212880686.c] - Blame information for rev 9

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/**********************************************************************/
/*   ____  ____                                                       */
/*  /   /\/   /                                                       */
/* /___/  \  /                                                        */
/* \   \   \/                                                       */
/*  \   \        Copyright (c) 2003-2009 Xilinx, Inc.                */
/*  /   /          All Right Reserved.                                 */
/* /---/   /\                                                         */
/* \   \  /  \                                                      */
/*  \___\/\___\                                                    */
/***********************************************************************/
 
/* This file is designed for use with ISim build 0x7708f090 */
 
#define XSI_HIDE_SYMBOL_SPEC true
#include "xsi.h"
#include <memory.h>
#ifdef __GNUC__
#include <stdlib.h>
#else
#include <malloc.h>
#define alloca _alloca
#endif
extern char *STD_STANDARD;
static const char *ng1 = "Function if_then_else ended without a return statement";
extern char *IEEE_P_2592010699;
static const char *ng3 = "Function map_ready_valid ended without a return statement";
 
unsigned char ieee_p_2592010699_sub_1690584930_503743352(char *, unsigned char );
 
 
int xilinxcorelib_a_3834233695_3212880686_sub_3672023036_3057020925(char *t1, unsigned char t2, int t3, int t4)
{
    char t5[128];
    char t6[16];
    char t10[8];
    int t0;
    char *t7;
    char *t8;
    char *t9;
    char *t11;
    char *t12;
    char *t13;
    char *t14;
    char *t15;
    unsigned char t16;
    char *t17;
    char *t18;
    int t19;
 
LAB0:    t7 = (t5 + 4U);
    t8 = ((STD_STANDARD) + 384);
    t9 = (t7 + 88U);
    *((char **)t9) = t8;
    t11 = (t7 + 56U);
    *((char **)t11) = t10;
    *((int *)t10) = 0;
    t12 = (t7 + 80U);
    *((unsigned int *)t12) = 4U;
    t13 = (t6 + 4U);
    *((unsigned char *)t13) = t2;
    t14 = (t6 + 5U);
    *((int *)t14) = t3;
    t15 = (t6 + 9U);
    *((int *)t15) = t4;
    t16 = (!(t2));
    if (t16 != 0)
        goto LAB2;
 
LAB4:    t8 = (t7 + 56U);
    t9 = *((char **)t8);
    t8 = (t9 + 0);
    *((int *)t8) = t3;
 
LAB3:    t8 = (t7 + 56U);
    t9 = *((char **)t8);
    t19 = *((int *)t9);
    t0 = t19;
 
LAB1:    return t0;
LAB2:    t17 = (t7 + 56U);
    t18 = *((char **)t17);
    t17 = (t18 + 0);
    *((int *)t17) = t4;
    goto LAB3;
 
LAB5:;
}
 
char *xilinxcorelib_a_3834233695_3212880686_sub_3999167911_3057020925(char *t1, char *t2, unsigned char t3, char *t4, char *t5, char *t6, char *t7)
{
    char t9[40];
    char *t0;
    char *t10;
    char *t11;
    unsigned char t12;
    char *t13;
    char *t14;
    unsigned char t15;
    char *t16;
    unsigned char t17;
    char *t18;
    unsigned int t19;
    char *t20;
    int t21;
    char *t22;
    int t23;
    char *t24;
    int t25;
    char *t26;
    char *t27;
    int t28;
    unsigned int t29;
 
LAB0:    t10 = (t9 + 4U);
    *((unsigned char *)t10) = t3;
    t11 = (t9 + 5U);
    t12 = (t4 != 0);
    if (t12 == 1)
        goto LAB3;
 
LAB2:    t13 = (t9 + 13U);
    *((char **)t13) = t5;
    t14 = (t9 + 21U);
    t15 = (t6 != 0);
    if (t15 == 1)
        goto LAB5;
 
LAB4:    t16 = (t9 + 29U);
    *((char **)t16) = t7;
    t17 = (!(t3));
    if (t17 != 0)
        goto LAB6;
 
LAB8:    t18 = (t5 + 12U);
    t19 = *((unsigned int *)t18);
    t19 = (t19 * 1U);
    t0 = xsi_get_transient_memory(t19);
    memcpy(t0, t4, t19);
    t20 = (t5 + 0U);
    t21 = *((int *)t20);
    t22 = (t5 + 4U);
    t23 = *((int *)t22);
    t24 = (t5 + 8U);
    t25 = *((int *)t24);
    t26 = (t2 + 0U);
    t27 = (t26 + 0U);
    *((int *)t27) = t21;
    t27 = (t26 + 4U);
    *((int *)t27) = t23;
    t27 = (t26 + 8U);
    *((int *)t27) = t25;
    t28 = (t23 - t21);
    t29 = (t28 * t25);
    t29 = (t29 + 1);
    t27 = (t26 + 12U);
    *((unsigned int *)t27) = t29;
 
LAB1:    return t0;
LAB3:    *((char **)t11) = t4;
    goto LAB2;
 
LAB5:    *((char **)t14) = t6;
    goto LAB4;
 
LAB6:    t18 = (t7 + 12U);
    t19 = *((unsigned int *)t18);
    t19 = (t19 * 1U);
    t0 = xsi_get_transient_memory(t19);
    memcpy(t0, t6, t19);
    t20 = (t7 + 0U);
    t21 = *((int *)t20);
    t22 = (t7 + 4U);
    t23 = *((int *)t22);
    t24 = (t7 + 8U);
    t25 = *((int *)t24);
    t26 = (t2 + 0U);
    t27 = (t26 + 0U);
    *((int *)t27) = t21;
    t27 = (t26 + 4U);
    *((int *)t27) = t23;
    t27 = (t26 + 8U);
    *((int *)t27) = t25;
    t28 = (t23 - t21);
    t29 = (t28 * t25);
    t29 = (t29 + 1);
    t27 = (t26 + 12U);
    *((unsigned int *)t27) = t29;
    goto LAB1;
 
LAB7:    xsi_error(ng1);
    t0 = 0;
    goto LAB1;
 
LAB9:    goto LAB7;
 
LAB10:    goto LAB7;
 
}
 
unsigned char xilinxcorelib_a_3834233695_3212880686_sub_2920649328_3057020925(char *t1, int t2, unsigned char t3, unsigned char t4, unsigned char t5)
{
    char t7[16];
    unsigned char t0;
    char *t8;
    char *t9;
    char *t10;
    char *t11;
    unsigned char t12;
    unsigned char t13;
 
LAB0:    t8 = (t7 + 4U);
    *((int *)t8) = t2;
    t9 = (t7 + 8U);
    *((unsigned char *)t9) = t3;
    t10 = (t7 + 9U);
    *((unsigned char *)t10) = t4;
    t11 = (t7 + 10U);
    *((unsigned char *)t11) = t5;
    t12 = (t2 == 5);
    if (t12 != 0)
        goto LAB2;
 
LAB4:    t12 = (t2 == 6);
    if (t12 != 0)
        goto LAB6;
 
LAB7:    t12 = ieee_p_2592010699_sub_1690584930_503743352(IEEE_P_2592010699, t5);
    t0 = t12;
 
LAB1:    return t0;
LAB2:    t13 = ieee_p_2592010699_sub_1690584930_503743352(IEEE_P_2592010699, t3);
    t0 = t13;
    goto LAB1;
 
LAB3:    xsi_error(ng3);
    t0 = 0;
    goto LAB1;
 
LAB5:    goto LAB3;
 
LAB6:    t13 = ieee_p_2592010699_sub_1690584930_503743352(IEEE_P_2592010699, t4);
    t0 = t13;
    goto LAB1;
 
LAB8:    goto LAB3;
 
LAB9:    goto LAB3;
 
}
 
static void xilinxcorelib_a_3834233695_3212880686_p_0(char *t0)
{
    char *t1;
    char *t2;
    unsigned char t3;
    unsigned char t4;
    char *t5;
    char *t6;
    char *t7;
    char *t8;
    char *t9;
 
LAB0:
LAB3:    t1 = (t0 + 7536U);
    t2 = *((char **)t1);
    t3 = *((unsigned char *)t2);
    t4 = ieee_p_2592010699_sub_1690584930_503743352(IEEE_P_2592010699, t3);
    t1 = (t0 + 63616);
    t5 = (t1 + 56U);
    t6 = *((char **)t5);
    t7 = (t6 + 56U);
    t8 = *((char **)t7);
    *((unsigned char *)t8) = t4;
    xsi_driver_first_trans_fast(t1);
 
LAB2:    t9 = (t0 + 63536);
    *((int *)t9) = 1;
 
LAB1:    return;
LAB4:    goto LAB2;
 
}
 
 
extern void xilinxcorelib_a_3834233695_3212880686_init()
{
        static char *pe[] = {(void *)xilinxcorelib_a_3834233695_3212880686_p_0};
        static char *se[] = {(void *)xilinxcorelib_a_3834233695_3212880686_sub_3672023036_3057020925,(void *)xilinxcorelib_a_3834233695_3212880686_sub_3999167911_3057020925,(void *)xilinxcorelib_a_3834233695_3212880686_sub_2920649328_3057020925};
        xsi_register_didat("xilinxcorelib_a_3834233695_3212880686", "isim/testbench_isim_beh.exe.sim/xilinxcorelib/a_3834233695_3212880686.didat");
        xsi_register_executes(pe);
        xsi_register_subprogram_executes(se);
}

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Subversion Repositories xmatchpro

[/] [xmatchpro/] [trunk/] [xmw4-comdec/] [xmatch_sim7/] [isim/] [testbench_isim_beh.exe.sim/] [xilinxcorelib/] [a_3834233695_3212880686.c] - Blame information for rev 9

Line No.	Rev	Author	Line
1	9	eejlny	`/**********************************************************************/`
2			`/* ____ ____ */`
3			`/* / /\/ / */`
4			`/* /___/ \ / */`
5			`/* \ \ \/ */`
6			`/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */`
7			`/* / / All Right Reserved. */`
8			`/* /---/ /\ */`
9			`/* \ \ / \ */`
10			`/* \___\/\___\ */`
11			`/***********************************************************************/`
12
13			`/* This file is designed for use with ISim build 0x7708f090 */`
14
15			`#define XSI_HIDE_SYMBOL_SPEC true`
16			`#include "xsi.h"`
17			`#include <memory.h>`
18			`#ifdef __GNUC__`
19			`#include <stdlib.h>`
20			`#else`
21			`#include <malloc.h>`
22			`#define alloca _alloca`
23			`#endif`
24			`extern char *STD_STANDARD;`
25			`static const char *ng1 = "Function if_then_else ended without a return statement";`
26			`extern char *IEEE_P_2592010699;`
27			`static const char *ng3 = "Function map_ready_valid ended without a return statement";`
28
29			`unsigned char ieee_p_2592010699_sub_1690584930_503743352(char *, unsigned char );`
30
31
32			`int xilinxcorelib_a_3834233695_3212880686_sub_3672023036_3057020925(char *t1, unsigned char t2, int t3, int t4)`
33			`{`
34			`char t5[128];`
35			`char t6[16];`
36			`char t10[8];`
37			`int t0;`
38			`char *t7;`
39			`char *t8;`
40			`char *t9;`
41			`char *t11;`
42			`char *t12;`
43			`char *t13;`
44			`char *t14;`
45			`char *t15;`
46			`unsigned char t16;`
47			`char *t17;`
48			`char *t18;`
49			`int t19;`
50
51			`LAB0: t7 = (t5 + 4U);`
52			`t8 = ((STD_STANDARD) + 384);`
53			`t9 = (t7 + 88U);`
54			`((char *)t9) = t8;`
55			`t11 = (t7 + 56U);`
56			`((char *)t11) = t10;`
57			`((int )t10) = 0;`
58			`t12 = (t7 + 80U);`
59			`((unsigned int )t12) = 4U;`
60			`t13 = (t6 + 4U);`
61			`((unsigned char )t13) = t2;`
62			`t14 = (t6 + 5U);`
63			`((int )t14) = t3;`
64			`t15 = (t6 + 9U);`
65			`((int )t15) = t4;`
66			`t16 = (!(t2));`
67			`if (t16 != 0)`
68			`goto LAB2;`
69
70			`LAB4: t8 = (t7 + 56U);`
71			`t9 = ((char *)t8);`
72			`t8 = (t9 + 0);`
73			`((int )t8) = t3;`
74
75			`LAB3: t8 = (t7 + 56U);`
76			`t9 = ((char *)t8);`
77			`t19 = ((int )t9);`
78			`t0 = t19;`
79
80			`LAB1: return t0;`
81			`LAB2: t17 = (t7 + 56U);`
82			`t18 = ((char *)t17);`
83			`t17 = (t18 + 0);`
84			`((int )t17) = t4;`
85			`goto LAB3;`
86
87			`LAB5:;`
88			`}`
89
90			`char xilinxcorelib_a_3834233695_3212880686_sub_3999167911_3057020925(char t1, char t2, unsigned char t3, char t4, char t5, char t6, char *t7)`
91			`{`
92			`char t9[40];`
93			`char *t0;`
94			`char *t10;`
95			`char *t11;`
96			`unsigned char t12;`
97			`char *t13;`
98			`char *t14;`
99			`unsigned char t15;`
100			`char *t16;`
101			`unsigned char t17;`
102			`char *t18;`
103			`unsigned int t19;`
104			`char *t20;`
105			`int t21;`
106			`char *t22;`
107			`int t23;`
108			`char *t24;`
109			`int t25;`
110			`char *t26;`
111			`char *t27;`
112			`int t28;`
113			`unsigned int t29;`
114
115			`LAB0: t10 = (t9 + 4U);`
116			`((unsigned char )t10) = t3;`
117			`t11 = (t9 + 5U);`
118			`t12 = (t4 != 0);`
119			`if (t12 == 1)`
120			`goto LAB3;`
121
122			`LAB2: t13 = (t9 + 13U);`
123			`((char *)t13) = t5;`
124			`t14 = (t9 + 21U);`
125			`t15 = (t6 != 0);`
126			`if (t15 == 1)`
127			`goto LAB5;`
128
129			`LAB4: t16 = (t9 + 29U);`
130			`((char *)t16) = t7;`
131			`t17 = (!(t3));`
132			`if (t17 != 0)`
133			`goto LAB6;`
134
135			`LAB8: t18 = (t5 + 12U);`
136			`t19 = ((unsigned int )t18);`
137			`t19 = (t19 * 1U);`
138			`t0 = xsi_get_transient_memory(t19);`
139			`memcpy(t0, t4, t19);`
140			`t20 = (t5 + 0U);`
141			`t21 = ((int )t20);`
142			`t22 = (t5 + 4U);`
143			`t23 = ((int )t22);`
144			`t24 = (t5 + 8U);`
145			`t25 = ((int )t24);`
146			`t26 = (t2 + 0U);`
147			`t27 = (t26 + 0U);`
148			`((int )t27) = t21;`
149			`t27 = (t26 + 4U);`
150			`((int )t27) = t23;`
151			`t27 = (t26 + 8U);`
152			`((int )t27) = t25;`
153			`t28 = (t23 - t21);`
154			`t29 = (t28 * t25);`
155			`t29 = (t29 + 1);`
156			`t27 = (t26 + 12U);`
157			`((unsigned int )t27) = t29;`
158
159			`LAB1: return t0;`
160			`LAB3: ((char *)t11) = t4;`
161			`goto LAB2;`
162
163			`LAB5: ((char *)t14) = t6;`
164			`goto LAB4;`
165
166			`LAB6: t18 = (t7 + 12U);`
167			`t19 = ((unsigned int )t18);`
168			`t19 = (t19 * 1U);`
169			`t0 = xsi_get_transient_memory(t19);`
170			`memcpy(t0, t6, t19);`
171			`t20 = (t7 + 0U);`
172			`t21 = ((int )t20);`
173			`t22 = (t7 + 4U);`
174			`t23 = ((int )t22);`
175			`t24 = (t7 + 8U);`
176			`t25 = ((int )t24);`
177			`t26 = (t2 + 0U);`
178			`t27 = (t26 + 0U);`
179			`((int )t27) = t21;`
180			`t27 = (t26 + 4U);`
181			`((int )t27) = t23;`
182			`t27 = (t26 + 8U);`
183			`((int )t27) = t25;`
184			`t28 = (t23 - t21);`
185			`t29 = (t28 * t25);`
186			`t29 = (t29 + 1);`
187			`t27 = (t26 + 12U);`
188			`((unsigned int )t27) = t29;`
189			`goto LAB1;`
190
191			`LAB7: xsi_error(ng1);`
192			`t0 = 0;`
193			`goto LAB1;`
194
195			`LAB9: goto LAB7;`
196
197			`LAB10: goto LAB7;`
198
199			`}`
200
201			`unsigned char xilinxcorelib_a_3834233695_3212880686_sub_2920649328_3057020925(char *t1, int t2, unsigned char t3, unsigned char t4, unsigned char t5)`
202			`{`
203			`char t7[16];`
204			`unsigned char t0;`
205			`char *t8;`
206			`char *t9;`
207			`char *t10;`
208			`char *t11;`
209			`unsigned char t12;`
210			`unsigned char t13;`
211
212			`LAB0: t8 = (t7 + 4U);`
213			`((int )t8) = t2;`
214			`t9 = (t7 + 8U);`
215			`((unsigned char )t9) = t3;`
216			`t10 = (t7 + 9U);`
217			`((unsigned char )t10) = t4;`
218			`t11 = (t7 + 10U);`
219			`((unsigned char )t11) = t5;`
220			`t12 = (t2 == 5);`
221			`if (t12 != 0)`
222			`goto LAB2;`
223
224			`LAB4: t12 = (t2 == 6);`
225			`if (t12 != 0)`
226			`goto LAB6;`
227
228			`LAB7: t12 = ieee_p_2592010699_sub_1690584930_503743352(IEEE_P_2592010699, t5);`
229			`t0 = t12;`
230
231			`LAB1: return t0;`
232			`LAB2: t13 = ieee_p_2592010699_sub_1690584930_503743352(IEEE_P_2592010699, t3);`
233			`t0 = t13;`
234			`goto LAB1;`
235
236			`LAB3: xsi_error(ng3);`
237			`t0 = 0;`
238			`goto LAB1;`
239
240			`LAB5: goto LAB3;`
241
242			`LAB6: t13 = ieee_p_2592010699_sub_1690584930_503743352(IEEE_P_2592010699, t4);`
243			`t0 = t13;`
244			`goto LAB1;`
245
246			`LAB8: goto LAB3;`
247
248			`LAB9: goto LAB3;`
249
250			`}`
251
252			`static void xilinxcorelib_a_3834233695_3212880686_p_0(char *t0)`
253			`{`
254			`char *t1;`
255			`char *t2;`
256			`unsigned char t3;`
257			`unsigned char t4;`
258			`char *t5;`
259			`char *t6;`
260			`char *t7;`
261			`char *t8;`
262			`char *t9;`
263
264			`LAB0:`
265			`LAB3: t1 = (t0 + 7536U);`
266			`t2 = ((char *)t1);`
267			`t3 = ((unsigned char )t2);`
268			`t4 = ieee_p_2592010699_sub_1690584930_503743352(IEEE_P_2592010699, t3);`
269			`t1 = (t0 + 63616);`
270			`t5 = (t1 + 56U);`
271			`t6 = ((char *)t5);`
272			`t7 = (t6 + 56U);`
273			`t8 = ((char *)t7);`
274			`((unsigned char )t8) = t4;`
275			`xsi_driver_first_trans_fast(t1);`
276
277			`LAB2: t9 = (t0 + 63536);`
278			`((int )t9) = 1;`
279
280			`LAB1: return;`
281			`LAB4: goto LAB2;`
282
283			`}`
284
285
286			`extern void xilinxcorelib_a_3834233695_3212880686_init()`
287			`{`
288			`static char pe[] = {(void )xilinxcorelib_a_3834233695_3212880686_p_0};`
289			`static char se[] = {(void )xilinxcorelib_a_3834233695_3212880686_sub_3672023036_3057020925,(void )xilinxcorelib_a_3834233695_3212880686_sub_3999167911_3057020925,(void )xilinxcorelib_a_3834233695_3212880686_sub_2920649328_3057020925};`
290			`xsi_register_didat("xilinxcorelib_a_3834233695_3212880686", "isim/testbench_isim_beh.exe.sim/xilinxcorelib/a_3834233695_3212880686.didat");`
291			`xsi_register_executes(pe);`
292			`xsi_register_subprogram_executes(se);`
293			`}`