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[/] [xucpu/] [trunk/] [VHDL/] [pipeline/] [memory_controller.vhdl] - Blame information for rev 39

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-- Copyright 2015, Jürgen Defurne
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--
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-- This file is part of the Experimental Unstable CPU System.
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--
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-- The Experimental Unstable CPU System Is free software: you can redistribute
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-- it and/or modify it under the terms of the GNU Lesser General Public License
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-- as published by the Free Software Foundation, either version 3 of the
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-- License, or (at your option) any later version.
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--
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-- The Experimental Unstable CPU System is distributed in the hope that it will
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-- be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser
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-- General Public License for more details.
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--
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-- You should have received a copy of the GNU Lesser General Public License
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-- along with Experimental Unstable CPU System. If not, see
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-- http://www.gnu.org/licenses/lgpl.txt.
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LIBRARY ieee;
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USE ieee.std_logic_1164.ALL;
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ENTITY memory_controller IS
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  PORT (
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    RST  : IN  STD_LOGIC;
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    CLK  : IN  STD_LOGIC;
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    SEL  : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
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    EN0  : OUT STD_LOGIC;
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    EN1  : OUT STD_LOGIC;
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    FULL : OUT STD_LOGIC;
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    PULL : IN  STD_LOGIC);
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END ENTITY memory_controller;

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