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[/] [xucpu/] [trunk/] [VHDL/] [rtl_alu/] [boole.vhdl] - Blame information for rev 12

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-- Copyright 2015, Jürgen Defurne
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--
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-- This file is part of the Experimental Unstable CPU System.
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--
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-- The Experimental Unstable CPU System Is free software: you can redistribute
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-- it and/or modify it under the terms of the GNU Lesser General Public License
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-- as published by the Free Software Foundation, either version 3 of the
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-- License, or (at your option) any later version.
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--
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-- The Experimental Unstable CPU System is distributed in the hope that it will
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-- be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser
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-- General Public License for more details.
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--
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-- You should have received a copy of the GNU Lesser General Public License
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-- along with Experimental Unstable CPU System. If not, see
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-- http://www.gnu.org/licenses/lgpl.txt.
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LIBRARY IEEE;
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USE IEEE.STD_LOGIC_1164.ALL;
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USE IEEE.numeric_std.ALL;
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ENTITY boole IS
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  PORT (
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    A   : IN  STD_LOGIC_VECTOR(15 DOWNTO 0);
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    B   : IN  STD_LOGIC_VECTOR(15 DOWNTO 0);
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    X   : OUT STD_LOGIC_VECTOR(15 DOWNTO 0);
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    SEL : IN  STD_LOGIC_VECTOR(3 DOWNTO 0));
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END boole;
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ARCHITECTURE dataflow OF boole IS
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  SIGNAL product : STD_LOGIC_VECTOR(31 DOWNTO 0);
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BEGIN  -- dataflow
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  product <= STD_LOGIC_VECTOR(UNSIGNED(A) * UNSIGNED(B));
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  WITH SEL SELECT
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    X <=
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    A        WHEN "0000",
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    NOT A    WHEN "0001",
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    B        WHEN "0010",
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    NOT B    WHEN "0011",
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    A AND B  WHEN "0100",
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    A OR B   WHEN "0101",
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    A NAND B WHEN "0110",
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    A NOR B  WHEN "0111",
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    A XOR B  WHEN "1000",
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    A XNOR B WHEN "1001",
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    STD_LOGIC_VECTOR(unsigned(A) + unsigned(B)) WHEN "1010",
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    STD_LOGIC_VECTOR(unsigned(A) - unsigned(B)) WHEN "1011",
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    product(15 DOWNTO 0) WHEN "1100",
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    product(31 DOWNTO 16) WHEN "1101",
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    A(0) & A(15 DOWNTO 1) WHEN "1110",
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    A(14 DOWNTO 0) & A(15) WHEN "1111";
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END dataflow;

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