Subversion Repositories xucpu

LIBRARY ieee;

USE ieee.std_logic_1164.ALL;

USE ieee.numeric_std.ALL;

ENTITY S2CPU IS

  PORT (

    CLK           : IN  STD_LOGIC;

    RST           : IN  STD_LOGIC;

    O_IF          : OUT STD_LOGIC;

    O_INSTR_ADDR  : OUT STD_LOGIC_VECTOR(14 DOWNTO 0);

    I_INSTRUCTION : IN  STD_LOGIC_VECTOR(15 DOWNTO 0);

    O_RD          : OUT STD_LOGIC;

    O_WR          : OUT STD_LOGIC;

    O_DATA_ADDR   : OUT STD_LOGIC_VECTOR(14 DOWNTO 0);

    O_DATA        : OUT STD_LOGIC_VECTOR(15 DOWNTO 0);

    I_DATA        : IN  STD_LOGIC_VECTOR(15 DOWNTO 0));

END ENTITY S2CPU;

ARCHITECTURE Structural OF S2CPU IS

  SIGNAL PC : INTEGER RANGE 0 TO 32767 := 0;

BEGIN  -- ARCHITECTURE Structural

  -- purpose: Let counter run to fetch instructions

  -- type   : combinational

  -- inputs : CLK,RST

  -- outputs: O_INSTR_ADDR

  IF1: PROCESS (CLK,RST) IS

  BEGIN  -- PROCESS IF1

    IF rising_edge(CLK) THEN

      IF rst = '1' THEN

        PC <= 0;

      ELSE

        IF PC = 32767 THEN

          PC <= 0;

        ELSE

          PC <= PC + 1;

        END IF;

      END IF;

    END IF;

  END PROCESS IF1;

  O_IF <= '1';

  O_INSTR_ADDR <= STD_LOGIC_VECTOR(to_unsigned(PC, 15));

END ARCHITECTURE Structural;