Subversion Repositories xulalx25soc

.PHONY: all

all:    datestamp verilated bit

# Could also depend upon load, if desired, but not necessary

BENCH := `find bench -name Makefile` `find bench -name "*.cpp"` `find bench -name "*.h"`

RTL   := `find rtl -name "*.v"` `find rtl -name Makefile`

NOTES := `find . -name "*.txt"` `find . -name "*.html"`

SW    := `find sw -name "*.cpp"` `find sw -name "*.h"`  \

        `find sw -name "*.sh"` `find sw -name "*.py"`   \

        `find sw -name "*.pl"` `find sw -name Makefile`

PROJ  := xilinx/xula.prj xilinx/xula.xise xilinx/xula.xst       \

        xilinx/xula.ut xilinx/Makefile

BIN  := `find xilinx -name "*.bit"`

CONSTRAINTS := xula.ucf

YYMMDD:=`date +%Y%m%d`

datestamp:      $(YYMMDD)-build.v

$(YYMMDD)-build.v:

        -rm -rf 2*-build.v

        perl xilinx/mkdatev.pl > $(YYMMDD)-build.v

        cd rtl; ln -fs ../$(YYMMDD)-build.v builddate.v

.PHONY: archive

archive:

        tar --transform s,^,$(YYMMDD)-xula/, -chjf $(YYMMDD)-xula.tjz $(BENCH) $(SW) $(RTL) $(NOTES) $(PROJ) $(BIN) $(CONSTRAINTS)

.PHONY: tare

tare:

        echo tar --transform s,^,$(YYMMDD)-xula/, -chjf $(YYMMDD)-xula.tjz $(BENCH) $(SW) $(RTL) $(NOTES) $(PROJ) $(BIN) $(CONSTRAINTS)

.PHONY: verilated

verilated:

        cd rtl ; make

.PHONY: bit

bit:

        cd xilinx ; make xula.bit

.PHONY: load

load:   bit

        xsload -b xula2-lx25 --fpga xilinx/xula.bit

.PHONY: xload

xload:

        xsload -b xula2-lx25 --fpga xilinx/toplevel.bit

.PHONY: timing

timing:

        cd xilinx ; make timing