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[/] [xulalx25soc/] [trunk/] [bench/] [asm/] [xulalink.x] - Blame information for rev 50

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Line No. Rev Author Line
1 36 dgisselq
/*******************************************************************************
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*
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* Filename:     zipcmod.x
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*
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* Project:      XuLA2-LX25 SoC
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*
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* Purpose:      This script provides a description of the XuLA2-LX25 SoC,
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*               and specifically the memory bus that the Zip CPU would see,
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*               for the purposes of where to place memory when linking.
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*
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* Creator:      Dan Gisselquist, Ph.D.
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*               Gisselquist Technology, LLC
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*
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********************************************************************************
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*
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* Copyright (C) 2016, Gisselquist Technology, LLC
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*
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* This program is free software (firmware): you can redistribute it and/or
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* modify it under the terms of  the GNU General Public License as published
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* by the Free Software Foundation, either version 3 of the License, or (at
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* your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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* FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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* for more details.
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*
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* License:      GPL, v3, as defined and found on www.gnu.org,
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*               http://www.gnu.org/licenses/gpl.html
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*
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*
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*******************************************************************************/
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ENTRY(_start)
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MEMORY
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{
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        blkram (wx) : ORIGIN = 0x002000, LENGTH = 0x002000
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        flash  (rx) : ORIGIN = 0x040000, LENGTH = 0x040000
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        sdram  (wx) : ORIGIN = 0x800000, LENGTH = 0x800000
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}
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_top_of_stack = ORIGIN(blkram) + LENGTH(blkram) - 1;
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SECTIONS
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{
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  . = 0x02000;
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  .rocode 0x02000 : { *(.start) *(.text)
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        *(.rodata)
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        *(.strings) } > blkram
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  .data : { *(.data) *(COMMON) *(.bss) } > blkram
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  _top_of_heap = 0xf00000;
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}

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