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[/] [xulalx25soc/] [trunk/] [bench/] [cpp/] [Makefile] - Blame information for rev 112

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1 75 dgisselq
################################################################################
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##
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## Filename:    Makefile
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##
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## Project:     XuLA2-LX25 SoC based upon the ZipCPU
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##
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## Purpose:     To coordinate the build of a cycle accurate, Verilator based,
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##              simulation of the busmaster module.  Access to the simulation
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##      is provided via the same software commands that will access the board,
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##      save that the parameters are a touch different.  (See the access
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##      software for more information ...)
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##
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## Creator:     Dan Gisselquist, Ph.D.
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##              Gisselquist Technology, LLC
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##
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################################################################################
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##
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## Copyright (C) 2015-2016, Gisselquist Technology, LLC
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##
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## This program is free software (firmware): you can redistribute it and/or
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## modify it under the terms of  the GNU General Public License as published
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## by the Free Software Foundation, either version 3 of the License, or (at
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## your option) any later version.
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##
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## This program is distributed in the hope that it will be useful, but WITHOUT
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## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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## for more details.
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##
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## You should have received a copy of the GNU General Public License along
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## with this program.  (It's in the $(ROOT)/doc directory, run make with no
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## target there if the PDF file isn't present.)  If not, see
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##  for a copy.
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##
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## License:     GPL, v3, as defined and found on www.gnu.org,
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##              http://www.gnu.org/licenses/gpl.html
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##
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##
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################################################################################
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##
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##
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.PHONY: all
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# Make certain the "all" target is the first and therefore the default target
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all:
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CXX      :=  g++
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OBJDIR   :=  obj-pc
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YYMMDD   := `date +%Y%m%d`
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VOBJDR   := ../../rtl/obj_dir
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VROOT    := /usr/share/verilator
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VINC     := -I$(VROOT)/include -I$(VOBJDR)
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CFLAGS   :=  -c -g -Wall -I. $(VINC)
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# Now return to the "all" target, and fill in some details
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all:    $(OBJDIR)/ programs archive
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# GFXFLAGS :=  `pkg-config gtkmm-3.0 --cflags`
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# GFXLIBS  :=  `pkg-config gtkmm-3.0 --cflags --libs`
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.PHONY: programs
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programs:       busmaster_tb
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.PHONY: clean
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clean:
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        rm -f busmaster_rb $(OBJDIR)/*.o
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$(OBJDIR)/:
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        @bash -c "if [ ! -e $(OBJDIR) ]; then mkdir -p $(OBJDIR); fi"
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CLSHEADERS:= qspiflashsim.h sdramsim.h sdspisim.h uartsim.h
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CLSSOURCES:= $(subst .h,.cpp,$(CLSHEADERS))
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CLSOBJECTS:= $(addprefix $(OBJDIR)/,$(subst .h,.o,$(CLSHEADERS)))
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SOURCES := $(CLSSOURCES)
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HEADERS := $(CLSHEADERS)
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$(OBJDIR)/%.o: %.cpp
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        $(CXX) $(CFLAGS) $< -o $@
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$(OBJDIR)/busmaster_tb.o: busmaster_tb.cpp pipecmdr.h sdramsim.h
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$(OBJDIR)/busmaster_tb.o: port.h $(VOBJDR)/Vbusmaster.h
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        $(CXX) $(CFLAGS) busmaster_tb.cpp -o $@
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$(OBJDIR)/verilated.o: $(VROOT)/include/verilated.cpp
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        $(CXX) $(CFLAGS) $< -o $@
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busmaster_tb: $(OBJDIR)/qspiflashsim.o $(OBJDIR)/sdspisim.o
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busmaster_tb: $(OBJDIR)/uartsim.o $(OBJDIR)/sdramsim.o
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busmaster_tb: $(OBJDIR)/verilated.o $(VOBJDR)/Vbusmaster__ALL.a
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busmaster_tb: $(OBJDIR)/busmaster_tb.o
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        $(CXX) -g -o $@ $^
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define  build-depends
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        @echo "Building dependency file"
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        @bash -c "if [ ! -e $(OBJDIR) ]; then mkdir -p $(OBJDIR); fi"
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        @$(CXX) $(CPPFLAGS) -MM $(SOURCES) > $(OBJDIR)/xdepends.txt
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        @sed -e 's/^.*.o: /$(OBJDIR)\/&/' < $(OBJDIR)/xdepends.txt > $(OBJDIR)/depends.txt
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        @rm $(OBJDIR)/xdepends.txt
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endef
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tags:   $(SOURCES) $(HEADERS)
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        @echo "Generating tags"
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        @ctags $(SOURCES) $(HEADERS)
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.PHONY: depends
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depends: tags
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        $(build-depends)
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.PHONY: archive
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archive:
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        tar --transform s,^,$(YYMMDD)-bench-cpp/, -chjf $(YYMMDD)-bench-cpp.tjz Makefile *.cpp *.h
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-include $(OBJDIR)/depends.txt

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