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[/] [xulalx25soc/] [trunk/] [rtl/] [Makefile] - Blame information for rev 2

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1 2 dgisselq
##########################################################################/
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##
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## Filename:    Makefile
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##
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## Project:     XuLA2 board
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##
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## Purpose:     To direct the Verilator build of the SoC sources.
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##
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##
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## Creator:     Dan Gisselquist, Ph.D.
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##              Gisselquist Technology, LLC
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##
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##########################################################################/
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##
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## Copyright (C) 2015, Gisselquist Technology, LLC
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##
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## This program is free software (firmware): you can redistribute it and/or
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## modify it under the terms of  the GNU General Public License as published
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## by the Free Software Foundation, either version 3 of the License, or (at
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## your option) any later version.
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##
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## This program is distributed in the hope that it will be useful, but WITHOUT
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## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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## for more details.
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##
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## License:     GPL, v3, as defined and found on www.gnu.org,
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##              http:##www.gnu.org/licenses/gpl.html
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##
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##
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##########################################################################/
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##
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##
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all:    test archive
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YYMMDD=`date +%Y%m%d`
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CXX   := g++
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FBDIR := .
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VDIRFB:= $(FBDIR)/obj_dir
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.PHONY: test
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test: $(VDIRFB)/Vbusmaster__ALL.a
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CPUDR := cpu
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CPUSOURCESnD := zipcpu.v cpuops.v pipefetch.v           \
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                        pfcache.v idecode.v                             \
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                        pipemem.v prefetch.v wbpriarbiter.v             \
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        zipsystem.v zipcounter.v zipjiffies.v ziptimer.v                \
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                wbdmac.v icontrol.v wbwatchdog.v
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CPUSOURCES := $(addprefix $(CPUDR)/,$(CPUSOURCESnD))
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JTAGBUS := wbufifo.v wbubus.v wbucompactlines.v                 \
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        wbucompress.v wbudecompress.v wbudeword.v wbuexec.v             \
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        wbuidleint.v wbuinput.v wbuoutput.v wbureadcw.v wbusixchar.v    \
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        wbutohex.v
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PERIPHERALS: wbgpio.v wbpwmaudio.v rxuart.v txuart.v rtcdate.v rtclight.v
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SOURCES := busmaster.v wbscope.v wbsdram.v                      \
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        ioslave.v rtclight.v    rtcdate.v               \
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        wbspiflash.v lldspi.v                                   \
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        $(CPUSOURCES) $(JTAGBUS) $(PERIPHERALS)
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$(VDIRFB)/Vbusmaster__ALL.a: $(VDIRFB)/Vbusmaster.h $(VDIRFB)/Vbusmaster.cpp
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$(VDIRFB)/Vbusmaster__ALL.a: $(VDIRFB)/Vbusmaster.mk
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$(VDIRFB)/Vbusmaster.h $(VDIRFB)/Vbusmaster.cpp $(VDIRFB)/Vbusmaster.mk: $(SOURCES)
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$(VDIRFB)/V%.cpp $(VDIRFB)/V%.h $(VDIRFB)/V%.mk: $(FBDIR)/%.v
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        verilator -cc -y $(CPUDR) $*.v
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$(VDIRFB)/V%__ALL.a: $(VDIRFB)/V%.mk
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        cd $(VDIRFB); make -f V$*.mk
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.PHONY:
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archive:
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        tar --transform s,^,$(YYMMDD)-rtl/, -chjf $(YYMMDD)-rtl.tjz Makefile *.v cpu/*.v
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.PHONY: clean
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clean:
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        rm -rf $(VDIRFB)/*.mk
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        rm -rf $(VDIRFB)/*.cpp
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        rm -rf $(VDIRFB)/*.h
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        rm -rf $(VDIRFB)/
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