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[/] [xulalx25soc/] [trunk/] [sw/] [zipdbg.cpp] - Blame information for rev 110

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////////////////////////////////////////////////////////////////////////////////
//
// Filename:    zipdbg.cpp
//
// Project:     XuLA2-LX25 SoC based upon the ZipCPU
//
// Purpose:     Provide a debugger to step through the ZipCPU assembler,
//              evaluate the ZipCPU's current state, modify registers as(if)
//      needed, etc.  All of this through the JTAG port of the XuLA2 board.
//
// Creator:     Dan Gisselquist, Ph.D.
//              Gisselquist Technology, LLC
//
////////////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2015-2016, Gisselquist Technology, LLC
//
// This program is free software (firmware): you can redistribute it and/or
// modify it under the terms of  the GNU General Public License as published
// by the Free Software Foundation, either version 3 of the License, or (at
// your option) any later version.
//
// This program is distributed in the hope that it will be useful, but WITHOUT
// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with this program.  (It's in the $(ROOT)/doc directory, run make with no
// target there if the PDF file isn't present.)  If not, see
// <http://www.gnu.org/licenses/> for a copy.
//
// License:     GPL, v3, as defined and found on www.gnu.org,
//              http://www.gnu.org/licenses/gpl.html
//
//
////////////////////////////////////////////////////////////////////////////////
//
//
// BUGS:
//      - No ability to verify CPU functionality (3rd party simulator)
//      - No ability to set/clear breakpoints
//
//
#include <stdlib.h>
#include <signal.h>
#include <time.h>
#include <unistd.h>
#include <string.h>
 
#include <ctype.h>
#include <ncurses.h>
 
#include "zopcodes.h"
#include "zparser.h"
#include "devbus.h"
#include "regdefs.h"
 
#include "usbi.h"
#include "port.h"
 
#define CMD_REG         0
#define CMD_DATA        1
#define CMD_HALT        (1<<10)
#define CMD_STALL       (1<<9)
#define CMD_STEP        (1<<8)
#define CMD_INT         (1<<7)
#define CMD_RESET       (1<<6)
 
#define KEY_ESCAPE      27
#define KEY_RETURN      10
#define CTRL(X)         ((X)&0x01f)
 
class   SPARSEMEM {
public:
        bool    m_valid;
        unsigned int    m_a, m_d;
};
 
bool    gbl_err = false;
class   ZIPSTATE {
public:
        bool            m_valid, m_gie, m_last_pc_valid;
        unsigned int    m_sR[16], m_uR[16];
        unsigned int    m_p[20];
        unsigned int    m_last_pc, m_pc, m_sp;
        SPARSEMEM       m_smem[5];
        SPARSEMEM       m_imem[5];
        ZIPSTATE(void) : m_valid(false), m_last_pc_valid(false) {}
 
        void    step(void) {
                m_last_pc_valid = true;
                m_last_pc = m_pc;
        }
};
 
// No particular "parameters" need definition or redefinition here.
class   ZIPPY : public DEVBUS {
        static  const   int     MAXERR;
        typedef DEVBUS::BUSW    BUSW;
        DEVBUS  *m_fpga;
        int     m_cursor;
        ZIPSTATE        m_state;
        bool    m_user_break, m_show_users_timers;
public:
        ZIPPY(DEVBUS *fpga) : m_fpga(fpga), m_cursor(0), m_user_break(false),
                m_show_users_timers(false) {}
 
        void    read_raw_state(void) {
                m_state.m_valid = false;
                for(int i=0; i<16; i++)
                        m_state.m_sR[i] = cmd_read(i);
                for(int i=0; i<16; i++)
                        m_state.m_uR[i] = cmd_read(i+16);
                for(int i=0; i<20; i++)
                        m_state.m_p[i]  = cmd_read(i+32);
 
                m_state.m_gie = (m_state.m_sR[14] & 0x020);
                m_state.m_pc  = (m_state.m_gie) ? (m_state.m_uR[15]):(m_state.m_sR[15]);
                m_state.m_sp  = (m_state.m_gie) ? (m_state.m_uR[13]):(m_state.m_sR[13]);
 
                if (m_state.m_last_pc_valid)
                        m_state.m_imem[0].m_a = m_state.m_last_pc;
                else
                        m_state.m_imem[0].m_a = m_state.m_pc - 1;
                try {
                        m_state.m_imem[0].m_d = readio(m_state.m_imem[0].m_a);
                        m_state.m_imem[0].m_valid = true;
                } catch(BUSERR be) {
                        m_state.m_imem[0].m_valid = false;
                }
                m_state.m_imem[1].m_a = m_state.m_pc;
                try {
                        m_state.m_imem[1].m_d = readio(m_state.m_imem[1].m_a);
                        m_state.m_imem[1].m_valid = true;
                } catch(BUSERR be) {
                        m_state.m_imem[1].m_valid = false;
                }
 
                for(int i=1; i<4; i++) {
                        if (!m_state.m_imem[i].m_valid) {
                                m_state.m_imem[i+1].m_valid = false;
                                m_state.m_imem[i+1].m_a = m_state.m_imem[i].m_a+1;
                                continue;
                        }
                        m_state.m_imem[i+1].m_a = zop_early_branch(
                                        m_state.m_imem[i].m_a,
                                        m_state.m_imem[i].m_d);
                        try {
                                m_state.m_imem[i+1].m_d = readio(m_state.m_imem[i+1].m_a);
                                m_state.m_imem[i+1].m_valid = true;
                        } catch(BUSERR be) {
                                m_state.m_imem[i+1].m_valid = false;
                        }
                }
 
                m_state.m_smem[0].m_a = m_state.m_sp;
                for(int i=1; i<5; i++)
                        m_state.m_smem[i].m_a = m_state.m_smem[i-1].m_a+1;
                for(int i=0; i<5; i++) {
                        m_state.m_smem[i].m_valid = true;
                        if (m_state.m_smem[i].m_a < 0x2000)
                                m_state.m_smem[i].m_valid = false;
                        else if (m_state.m_smem[i].m_a < 0x4000)
                                m_state.m_smem[i].m_valid = true;
                        else if (m_state.m_smem[i].m_a < 0x800000)
                                m_state.m_smem[i].m_valid = false;
                        else if (m_state.m_smem[i].m_a < 0x1000000)
                                m_state.m_smem[i].m_valid = true;
                        else
                                m_state.m_smem[i].m_valid = false;
                        if (m_state.m_smem[i].m_valid)
                        try {
                                m_state.m_smem[i].m_d = readio(m_state.m_smem[i].m_a);
                                m_state.m_smem[i].m_valid = true;
                        } catch(BUSERR be) {
                                m_state.m_smem[i].m_valid = false;
                        }
                }
                m_state.m_valid = true;
        }
 
        void    kill(void) { m_fpga->kill(); }
        void    close(void) { m_fpga->close(); }
        void    writeio(const BUSW a, const BUSW v) { m_fpga->writeio(a, v); }
        BUSW    readio(const BUSW a) { return m_fpga->readio(a); }
        void    readi(const BUSW a, const int len, BUSW *buf) {
                return m_fpga->readi(a, len, buf); }
        void    readz(const BUSW a, const int len, BUSW *buf) {
                return m_fpga->readz(a, len, buf); }
        void    writei(const BUSW a, const int len, const BUSW *buf) {
                return m_fpga->writei(a, len, buf); }
        void    writez(const BUSW a, const int len, const BUSW *buf) {
                return m_fpga->writez(a, len, buf); }
        bool    poll(void) { return m_fpga->poll(); }
        void    usleep(unsigned ms) { m_fpga->usleep(ms); }
        void    wait(void) { m_fpga->wait(); }
        bool    bus_err(void) const { return m_fpga->bus_err(); }
        void    reset_err(void) { m_fpga->reset_err(); }
        void    clear(void) { m_fpga->clear(); }
 
        void    reset(void) { writeio(R_ZIPCTRL, CPU_RESET|CPU_HALT); }
        void    step(void) { writeio(R_ZIPCTRL, CPU_STEP); m_state.step(); }
        void    go(void) { writeio(R_ZIPCTRL, CPU_GO); }
        void    halt(void) {    writeio(R_ZIPCTRL, CPU_HALT); }
        bool    stalled(void) { return ((readio(R_ZIPCTRL)&CPU_STALL)==0); }
 
        void    show_user_timers(bool v) {
                m_show_users_timers = v;
        }
 
        void    showval(int y, int x, const char *lbl, unsigned int v, bool c) {
                if (c)
                        mvprintw(y,x, ">%s> 0x%08x<", lbl, v);
                else
                        mvprintw(y,x, " %s: 0x%08x ", lbl, v);
        }
 
        void    dispreg(int y, int x, const char *n, unsigned int v, bool c) {
                // 4,4,8,1 = 17 of 20, +2 = 18
                if (c)
                        mvprintw(y, x, ">%s> 0x%08x<", n, v);
                else
                        mvprintw(y, x, " %s: 0x%08x ", n, v);
        }
 
        int     showins(int y, const char *lbl, const unsigned int pcidx) {
                char    la[80], lb[80];
                int     r = y-1;
 
                mvprintw(y, 0, "%s0x%08x", lbl, m_state.m_imem[pcidx].m_a);
 
                if (m_state.m_gie) attroff(A_BOLD);
                else    attron(A_BOLD);
 
                la[0] = '\0';
                lb[0] = '\0';
                if (m_state.m_imem[pcidx].m_valid) {
                        zipi_to_string(m_state.m_imem[pcidx].m_d, la, lb);
                        printw(" 0x%08x", m_state.m_imem[pcidx].m_d);
                        printw("  %-25s", la);
                        if (lb[0]) {
                                mvprintw(y-1, 0, "%s", lbl);
                                mvprintw(y-1, strlen(lbl)+10+3+8+2, "%-25s", lb);
                                r--;
                        }
                } else {
                        printw(" 0x--------  %-25s", "(Bus Error)");
                }
                attroff(A_BOLD);
 
                return r;
        }
 
        void    showstack(int y, const char *lbl, const unsigned int idx) {
                mvprintw(y, 27+26, "%s%08x ", lbl, m_state.m_smem[idx].m_a);
 
                if (m_state.m_gie) attroff(A_BOLD);
                else    attron(A_BOLD);
 
                if (m_state.m_smem[idx].m_valid)
                        printw("0x%08x", m_state.m_smem[idx].m_d);
                else
                        printw("(Bus Err)");
                attroff(A_BOLD);
        }
 
        unsigned int    cmd_read(unsigned int a) {
                int errcount = 0;
                unsigned int    s;
 
                writeio(R_ZIPCTRL, CMD_HALT|(a&0x3f));
                while((((s=readio(R_ZIPCTRL))&CPU_STALL)== 0)&&(errcount<MAXERR)
                                &&(!m_user_break))
                        errcount++;
                if (m_user_break) {
                        endwin();
                        exit(EXIT_SUCCESS);
                } else if (errcount >= MAXERR) {
                        endwin();
                        printf("ERR: errcount(%d) >= MAXERR on cmd_read(a=%2x)\n", errcount, a);
                        printf("ZIPCTRL = 0x%08x", s);
                        if ((s & 0x0200)==0) printf(" STALL");
                        if  (s & 0x0400) printf(" HALTED");
                        if ((s & 0x03000)==0x01000)
                                printf(" SW-HALT");
                        else {
                                if (s & 0x01000) printf(" SLEEPING");
                                if (s & 0x02000) printf(" GIE(UsrMode)");
                        } printf("\n");
                        exit(EXIT_FAILURE);
                }
                return readio(R_ZIPDATA);
        }
 
        void    cmd_write(unsigned int a, int v) {
                int errcount = 0;
                unsigned int    s;
 
                writeio(R_ZIPCTRL, CMD_HALT|(a&0x3f));
                while((((s=readio(R_ZIPCTRL))&CPU_STALL)== 0)&&(errcount<MAXERR)
                                &&(!m_user_break))
                        errcount++;
                if (m_user_break) {
                        endwin();
                        exit(EXIT_SUCCESS);
                } else if (errcount >= MAXERR) {
                        endwin();
                        printf("ERR: errcount(%d) >= MAXERR on cmd_read(a=%2x)\n", errcount, a);
                        printf("ZIPCTRL = 0x%08x", s);
                        if ((s & 0x0200)==0) printf(" STALL");
                        if  (s & 0x0400) printf(" HALTED");
                        if ((s & 0x03000)==0x01000)
                                printf(" SW-HALT");
                        else {
                                if (s & 0x01000) printf(" SLEEPING");
                                if (s & 0x02000) printf(" GIE(UsrMode)");
                        } printf("\n");
                        exit(EXIT_FAILURE);
                }
 
                writeio(R_ZIPDATA, (unsigned int)v);
        }
 
        void    read_state(void) {
                int     ln= 0;
                bool    gie;
 
                read_raw_state();
 
                if (m_cursor < 0)
                        m_cursor = 0;
                else if (m_cursor >= 44)
                        m_cursor = 43;
 
                mvprintw(ln,0, "Peripherals");
                mvprintw(ln,30,"%-50s", "CPU State: ");
                {
                        unsigned int v = readio(R_ZIPCTRL);
                        mvprintw(ln,41, "0x%08x ", v);
                        // if (v & 0x010000)
                                // printw("INT ");
                        if ((v & 0x003000) == 0x03000)
                                printw("Sleeping ");
                        else if (v & 0x001000)
                                printw("Halted ");
                        else if (v & 0x002000)
                                printw("User Mode ");
                        else
                                printw("Supervisor mode ");
                        if (v& 0x0200) {
                                v = m_state.m_sR[15];
 
                        } else printw("Stalled ");
                        // if (v & 0x008000)
                                // printw("Break-Enabled ");
                        // if (v & 0x000080)
                                // printw("PIC Enabled ");
                } ln++;
                showval(ln, 0, "PIC ", m_state.m_p[0], (m_cursor==0));
                showval(ln,20, "WDT ", m_state.m_p[1], (m_cursor==1));
                showval(ln,40, "WBUS", m_state.m_p[2], (m_cursor==2));
                showval(ln,60, "PIC2", m_state.m_p[3], (m_cursor==3));
                ln++;
                showval(ln, 0, "TMRA", m_state.m_p[4], (m_cursor==4));
                showval(ln,20, "TMRB", m_state.m_p[5], (m_cursor==5));
                showval(ln,40, "TMRC", m_state.m_p[6], (m_cursor==6));
                showval(ln,60, "JIF ", m_state.m_p[7], (m_cursor==7));
 
                ln++;
                if (!m_show_users_timers) {
                        showval(ln, 0, "MTSK", m_state.m_p[ 8], (m_cursor==8));
                        showval(ln,20, "MOST", m_state.m_p[ 9], (m_cursor==9));
                        showval(ln,40, "MPST", m_state.m_p[10], (m_cursor==10));
                        showval(ln,60, "MICT", m_state.m_p[11], (m_cursor==11));
                } else {
                        showval(ln, 0, "UTSK", m_state.m_p[12], (m_cursor==8));
                        showval(ln,20, "UMST", m_state.m_p[13], (m_cursor==9));
                        showval(ln,40, "UPST", m_state.m_p[14], (m_cursor==10));
                        showval(ln,60, "UICT", m_state.m_p[15], (m_cursor==11));
                }
 
                ln++;
                ln++;
                unsigned int cc = m_state.m_sR[14];
                gie = (cc & 0x020);
                if (gie)
                        attroff(A_BOLD);
                else
                        attron(A_BOLD);
                mvprintw(ln, 0, "Supervisor Registers");
                ln++;
 
                dispreg(ln, 0, "sR0 ", m_state.m_sR[0], (m_cursor==12));
                dispreg(ln,20, "sR1 ", m_state.m_sR[1], (m_cursor==13));
                dispreg(ln,40, "sR2 ", m_state.m_sR[2], (m_cursor==14));
                dispreg(ln,60, "sR3 ", m_state.m_sR[3], (m_cursor==15)); ln++;
 
                dispreg(ln, 0, "sR4 ", m_state.m_sR[4], (m_cursor==16));
                dispreg(ln,20, "sR5 ", m_state.m_sR[5], (m_cursor==17));
                dispreg(ln,40, "sR6 ", m_state.m_sR[6], (m_cursor==18));
                dispreg(ln,60, "sR7 ", m_state.m_sR[7], (m_cursor==19)); ln++;
 
                dispreg(ln, 0, "sR8 ", m_state.m_sR[ 8], (m_cursor==20));
                dispreg(ln,20, "sR9 ", m_state.m_sR[ 9], (m_cursor==21));
                dispreg(ln,40, "sR10", m_state.m_sR[10], (m_cursor==22));
                dispreg(ln,60, "sR11", m_state.m_sR[11], (m_cursor==23)); ln++;
 
                dispreg(ln, 0, "sR12", m_state.m_sR[12], (m_cursor==24));
                dispreg(ln,20, "sSP ", m_state.m_sR[13], (m_cursor==25));
 
                mvprintw(ln,40, "%ssCC :%s%s%s%s%s%s%s",
                        (m_cursor == 26)?">":" ",
                        (cc&0x1000)?"FE":"", // Floating point exception
                        (cc&0x0800)?"DV":"", // Division by zero
                        (cc&0x0400)?"BE":"", // Bus Error
                        (cc&0x0200)?"TP":"", // Trap
                        (cc&0x0100)?"IL":"", // Illegal instruction
                        (cc&0x0080)?"BK":"", // Break
                        ((gie==0)&&(cc&0x0010))?"HLT":""); // Halted
                mvprintw(ln,54,"%s%s%s%s",
                        (cc&8)?"V":" ",
                        (cc&4)?"N":" ",
                        (cc&2)?"C":" ",
                        (cc&1)?"Z":" ");
                dispreg(ln,60, "sPC ", m_state.m_sR[15], (m_cursor==27));
                ln++;
 
                if (gie)
                        attron(A_BOLD);
                else
                        attroff(A_BOLD);
                mvprintw(ln, 0, "User Registers"); ln++;
                dispreg(ln, 0, "uR0 ", m_state.m_uR[0], (m_cursor==28));
                dispreg(ln,20, "uR1 ", m_state.m_uR[1], (m_cursor==29));
                dispreg(ln,40, "uR2 ", m_state.m_uR[2], (m_cursor==30));
                dispreg(ln,60, "uR3 ", m_state.m_uR[3], (m_cursor==31)); ln++;
 
                dispreg(ln, 0, "uR4 ", m_state.m_uR[4], (m_cursor==32));
                dispreg(ln,20, "uR5 ", m_state.m_uR[5], (m_cursor==33));
                dispreg(ln,40, "uR6 ", m_state.m_uR[6], (m_cursor==34));
                dispreg(ln,60, "uR7 ", m_state.m_uR[7], (m_cursor==35)); ln++;
 
                dispreg(ln, 0, "uR8 ", m_state.m_uR[8], (m_cursor==36));
                dispreg(ln,20, "uR9 ", m_state.m_uR[9], (m_cursor==37));
                dispreg(ln,40, "uR10", m_state.m_uR[10], (m_cursor==38));
                dispreg(ln,60, "uR11", m_state.m_uR[11], (m_cursor==39)); ln++;
 
                dispreg(ln, 0, "uR12", m_state.m_uR[12], (m_cursor==40));
                dispreg(ln,20, "uSP ", m_state.m_uR[13], (m_cursor==41));
                cc = m_state.m_uR[14];
                mvprintw(ln,40, "%suCC :%s%s%s%s%s%s%s",
                        (m_cursor == 42)?">":" ",
                        (cc&0x1000)?"FE":"", // Floating point Exception
                        (cc&0x0800)?"DV":"", // Division by zero
                        (cc&0x0400)?"BE":"", // Bus Error
                        (cc&0x0200)?"TP":"", // Trap
                        (cc&0x0100)?"IL":"", // Illegal instruction
                        (cc&0x0040)?"ST":"", // Single-step
                        ((gie)&&(cc&0x0010))?"SL":""); // Sleep
                mvprintw(ln,54,"%s%s%s%s",
                        (cc&8)?"V":" ",
                        (cc&4)?"N":" ",
                        (cc&2)?"C":" ",
                        (cc&1)?"Z":" ");
                dispreg(ln,60, "uPC ", m_state.m_uR[15], (m_cursor==43));
 
                attroff(A_BOLD);
                ln+=3;
 
                showins(ln+4, " ", 0);
                {
                        int     lclln = ln+3;
                        for(int i=1; i<5; i++)
                                lclln = showins(lclln, (i==1)?">":" ", i);
                        for(int i=0; i<5; i++)
                                showstack(ln+i, (i==0)?">":" ", i);
                }
        }
 
        void    cursor_up(void) {
                if (m_cursor > 3)
                        m_cursor -= 4;
        } void  cursor_down(void) {
                if (m_cursor < 40)
                        m_cursor += 4;
        } void  cursor_left(void) {
                if (m_cursor > 0)
                        m_cursor--;
                else    m_cursor = 43;
        } void  cursor_right(void) {
                if (m_cursor < 43)
                        m_cursor++;
                else    m_cursor = 0;
        }
 
        int     cursor(void) { return m_cursor; }
};
 
const   int ZIPPY::MAXERR = 100000;
 
FPGA    *m_fpga;
 
void    get_value(ZIPPY *zip) {
        int     wy, wx, ra;
        int     c = zip->cursor();
 
        wx = (c & 0x03) * 20 + 9 + 1;
        wy = (c >> 2);
        if (wy >= 3+4)
                wy++;
        if (wy > 3)
                wy += 2;
        wy++;
 
        if (c >= 12)
                ra = c - 12;
        else
                ra = c + 32;
 
        bool    done = false;
        char    str[16];
        int     pos = 0; str[pos] = '\0';
        attron(A_NORMAL | A_UNDERLINE);
        mvprintw(wy, wx, "%-8s", "");
        while(!done) {
                int     chv = getch();
                switch(chv) {
                case KEY_ESCAPE:
                        pos = 0; str[pos] = '\0'; done = true;
                        break;
                case KEY_RETURN: case KEY_ENTER: case KEY_UP: case KEY_DOWN:
                        done = true;
                        break;
                case KEY_LEFT: case KEY_BACKSPACE:
                        if (pos > 0) pos--;
                        break;
                case KEY_CLEAR:
                        pos = 0;
                        break;
                case '0': case ' ': str[pos++] = '0'; break;
                case '1': str[pos++] = '1'; break;
                case '2': str[pos++] = '2'; break;
                case '3': str[pos++] = '3'; break;
                case '4': str[pos++] = '4'; break;
                case '5': str[pos++] = '5'; break;
                case '6': str[pos++] = '6'; break;
                case '7': str[pos++] = '7'; break;
                case '8': str[pos++] = '8'; break;
                case '9': str[pos++] = '9'; break;
                case 'A': case 'a': str[pos++] = 'A'; break;
                case 'B': case 'b': str[pos++] = 'B'; break;
                case 'C': case 'c': str[pos++] = 'C'; break;
                case 'D': case 'd': str[pos++] = 'D'; break;
                case 'E': case 'e': str[pos++] = 'E'; break;
                case 'F': case 'f': str[pos++] = 'F'; break;
                }
 
                if (pos > 8)
                        pos = 8;
                str[pos] = '\0';
 
                attron(A_NORMAL | A_UNDERLINE);
                mvprintw(wy, wx, "%-8s", str);
                if (pos > 0) {
                        attron(A_NORMAL | A_UNDERLINE | A_BLINK);
                        mvprintw(wy, wx+pos-1, "%c", str[pos-1]);
                }
                attrset(A_NORMAL);
        }
 
        if (pos > 0) {
                int     v;
                v = strtoul(str, NULL, 16);
                zip->cmd_write(ra, v);
        }
}
 
void    on_sigint(int v) {
        endwin();
 
        fprintf(stderr, "Interrupted!\n");
        exit(-2);
}
 
void    stall_screen(void) {
        erase();
        mvprintw(0,0, "CPU is stalled.  (Q to quit)\n");
}
 
int     main(int argc, char **argv) {
        // FPGAOPEN(m_fpga);
        ZIPPY   *zip; //
 
        int     skp=0, port = FPGAPORT;
        bool    use_usb = true;
 
        skp=1;
        for(int argn=0; argn<argc-skp; argn++) {
                if (argv[argn+skp][0] == '-') {
                        if (argv[argn+skp][1] == 'u')
                                use_usb = true;
                        else if (argv[argn+skp][1] == 'p') {
                                use_usb = false;
                                if (isdigit(argv[argn+skp][2]))
                                        port = atoi(&argv[argn+skp][2]);
                        }
                        skp++; argn--;
                } else
                        argv[argn] = argv[argn+skp];
        } argc -= skp;
 
        if (use_usb)
                m_fpga = new FPGA(new USBI());
        else
                m_fpga = new FPGA(new NETCOMMS(FPGAHOST, port));
        zip = new ZIPPY(m_fpga);
 
 
        initscr();
        raw();
        noecho();
        keypad(stdscr, true);
 
        signal(SIGINT, on_sigint);
 
        int     chv;
        bool    done = false;
 
        zip->halt();
        for(int i=0; (i<5)&&(zip->stalled()); i++)
                ;
        if (!zip->stalled())
                zip->read_state();
        else
                stall_screen();
        while((!done)&&(!gbl_err)) {
                chv = getch();
                switch(chv) {
                case 'g': case 'G':
                        m_fpga->writeio(R_ZIPCTRL, CPU_GO);
                        // We just released the CPU, so we're now done.
                        done = true;
                        break;
                case 'l': case 'L': case CTRL('L'):
                        redrawwin(stdscr);
                case 'm': case 'M':
                        zip->show_user_timers(false);
                        break;
                case 'q': case 'Q': case CTRL('C'):
                case KEY_CANCEL: case KEY_CLOSE: case KEY_EXIT:
                case KEY_ESCAPE:
                        done = true;
                        break;
                case 'r': case 'R':
                        zip->reset();
                        erase();
                        break;
                case 't': case 'T':
                case 's': case 'S':
                        zip->step();
                        break;
                case 'u': case 'U':
                        zip->show_user_timers(true);
                        break;
                case '\r': case  '\n':
                case KEY_IC: case KEY_ENTER:
                        get_value(zip);
                        break;
                case KEY_UP:
                        zip->cursor_up();
                        break;
                case KEY_DOWN:
                        zip->cursor_down();
                        break;
                case KEY_LEFT:
                        zip->cursor_left();
                        break;
                case KEY_RIGHT:
                        zip->cursor_right();
                        break;
                case ERR: case KEY_CLEAR:
                default:
                        ;
                }
 
                if ((done)||(gbl_err))
                        break;
                else if (zip->stalled())
                        stall_screen();
                else
                        zip->read_state();
        }
 
        endwin();
 
        if (gbl_err) {
                printf("Killed on error: could not access bus!\n");
                exit(-2);
        }
}
 

Line No.	Rev	Author	Line
1	76	dgisselq	`////////////////////////////////////////////////////////////////////////////////`
2	5	dgisselq	`//`
3	76	dgisselq	`// Filename: zipdbg.cpp`
4	5	dgisselq	`//`
5	76	dgisselq	`// Project: XuLA2-LX25 SoC based upon the ZipCPU`
6	5	dgisselq	`//`
7	76	dgisselq	`// Purpose: Provide a debugger to step through the ZipCPU assembler,`
8			`// evaluate the ZipCPU's current state, modify registers as(if)`
9			`// needed, etc. All of this through the JTAG port of the XuLA2 board.`
10	5	dgisselq	`//`
11			`// Creator: Dan Gisselquist, Ph.D.`
12	76	dgisselq	`// Gisselquist Technology, LLC`
13	5	dgisselq	`//`
14	76	dgisselq	`////////////////////////////////////////////////////////////////////////////////`
15	5	dgisselq	`//`
16	76	dgisselq	`// Copyright (C) 2015-2016, Gisselquist Technology, LLC`
17	5	dgisselq	`//`
18			`// This program is free software (firmware): you can redistribute it and/or`
19			`// modify it under the terms of the GNU General Public License as published`
20			`// by the Free Software Foundation, either version 3 of the License, or (at`
21			`// your option) any later version.`
22			`//`
23			`// This program is distributed in the hope that it will be useful, but WITHOUT`
24			`// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or`
25			`// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License`
26			`// for more details.`
27			`//`
28	76	dgisselq	`// You should have received a copy of the GNU General Public License along`
29			`// with this program. (It's in the $(ROOT)/doc directory, run make with no`
30			`// target there if the PDF file isn't present.) If not, see`
31			`// <http://www.gnu.org/licenses/> for a copy.`
32			`//`
33	5	dgisselq	`// License: GPL, v3, as defined and found on www.gnu.org,`
34			`// http://www.gnu.org/licenses/gpl.html`
35			`//`
36			`//`
37	76	dgisselq	`////////////////////////////////////////////////////////////////////////////////`
38	5	dgisselq	`//`
39			`//`
40	7	dgisselq	`// BUGS:`
41			`// - No ability to verify CPU functionality (3rd party simulator)`
42			`// - No ability to set/clear breakpoints`
43			`//`
44			`//`
45	5	dgisselq	`#include <stdlib.h>`
46			`#include <signal.h>`
47			`#include <time.h>`
48			`#include <unistd.h>`
49	7	dgisselq	`#include <string.h>`
50	5	dgisselq
51			`#include <ctype.h>`
52			`#include <ncurses.h>`
53
54			`#include "zopcodes.h"`
55			`#include "zparser.h"`
56			`#include "devbus.h"`
57			`#include "regdefs.h"`
58
59			`#include "usbi.h"`
60			`#include "port.h"`
61
62			`#define CMD_REG 0`
63			`#define CMD_DATA 1`
64			`#define CMD_HALT (1<<10)`
65			`#define CMD_STALL (1<<9)`
66			`#define CMD_STEP (1<<8)`
67			`#define CMD_INT (1<<7)`
68			`#define CMD_RESET (1<<6)`
69
70			`#define KEY_ESCAPE 27`
71			`#define KEY_RETURN 10`
72			`#define CTRL(X) ((X)&0x01f)`
73
74	7	dgisselq	`class SPARSEMEM {`
75			`public:`
76			`bool m_valid;`
77			`unsigned int m_a, m_d;`
78			`};`
79	5	dgisselq
80			`bool gbl_err = false;`
81	7	dgisselq	`class ZIPSTATE {`
82			`public:`
83			`bool m_valid, m_gie, m_last_pc_valid;`
84			`unsigned int m_sR[16], m_uR[16];`
85			`unsigned int m_p[20];`
86			`unsigned int m_last_pc, m_pc, m_sp;`
87			`SPARSEMEM m_smem[5];`
88			`SPARSEMEM m_imem[5];`
89			`ZIPSTATE(void) : m_valid(false), m_last_pc_valid(false) {}`
90	5	dgisselq
91	7	dgisselq	`void step(void) {`
92			`m_last_pc_valid = true;`
93			`m_last_pc = m_pc;`
94			`}`
95			`};`
96
97	5	dgisselq	`// No particular "parameters" need definition or redefinition here.`
98			`class ZIPPY : public DEVBUS {`
99	7	dgisselq	`static const int MAXERR;`
100	5	dgisselq	`typedef DEVBUS::BUSW BUSW;`
101			`DEVBUS *m_fpga;`
102			`int m_cursor;`
103	7	dgisselq	`ZIPSTATE m_state;`
104			`bool m_user_break, m_show_users_timers;`
105	5	dgisselq	`public:`
106	7	dgisselq	`ZIPPY(DEVBUS *fpga) : m_fpga(fpga), m_cursor(0), m_user_break(false),`
107			`m_show_users_timers(false) {}`
108	5	dgisselq
109	7	dgisselq	`void read_raw_state(void) {`
110			`m_state.m_valid = false;`
111			`for(int i=0; i<16; i++)`
112			`m_state.m_sR[i] = cmd_read(i);`
113			`for(int i=0; i<16; i++)`
114			`m_state.m_uR[i] = cmd_read(i+16);`
115			`for(int i=0; i<20; i++)`
116			`m_state.m_p[i] = cmd_read(i+32);`
117
118			`m_state.m_gie = (m_state.m_sR[14] & 0x020);`
119			`m_state.m_pc = (m_state.m_gie) ? (m_state.m_uR[15]):(m_state.m_sR[15]);`
120			`m_state.m_sp = (m_state.m_gie) ? (m_state.m_uR[13]):(m_state.m_sR[13]);`
121
122			`if (m_state.m_last_pc_valid)`
123			`m_state.m_imem[0].m_a = m_state.m_last_pc;`
124			`else`
125			`m_state.m_imem[0].m_a = m_state.m_pc - 1;`
126			`try {`
127			`m_state.m_imem[0].m_d = readio(m_state.m_imem[0].m_a);`
128			`m_state.m_imem[0].m_valid = true;`
129			`} catch(BUSERR be) {`
130			`m_state.m_imem[0].m_valid = false;`
131			`}`
132			`m_state.m_imem[1].m_a = m_state.m_pc;`
133			`try {`
134			`m_state.m_imem[1].m_d = readio(m_state.m_imem[1].m_a);`
135			`m_state.m_imem[1].m_valid = true;`
136			`} catch(BUSERR be) {`
137			`m_state.m_imem[1].m_valid = false;`
138			`}`
139
140			`for(int i=1; i<4; i++) {`
141			`if (!m_state.m_imem[i].m_valid) {`
142			`m_state.m_imem[i+1].m_valid = false;`
143			`m_state.m_imem[i+1].m_a = m_state.m_imem[i].m_a+1;`
144			`continue;`
145			`}`
146			`m_state.m_imem[i+1].m_a = zop_early_branch(`
147			`m_state.m_imem[i].m_a,`
148			`m_state.m_imem[i].m_d);`
149			`try {`
150			`m_state.m_imem[i+1].m_d = readio(m_state.m_imem[i+1].m_a);`
151			`m_state.m_imem[i+1].m_valid = true;`
152			`} catch(BUSERR be) {`
153			`m_state.m_imem[i+1].m_valid = false;`
154			`}`
155			`}`
156
157			`m_state.m_smem[0].m_a = m_state.m_sp;`
158			`for(int i=1; i<5; i++)`
159			`m_state.m_smem[i].m_a = m_state.m_smem[i-1].m_a+1;`
160			`for(int i=0; i<5; i++) {`
161	76	dgisselq	`m_state.m_smem[i].m_valid = true;`
162			`if (m_state.m_smem[i].m_a < 0x2000)`
163			`m_state.m_smem[i].m_valid = false;`
164			`else if (m_state.m_smem[i].m_a < 0x4000)`
165	110	dgisselq	`m_state.m_smem[i].m_valid = true;`
166	76	dgisselq	`else if (m_state.m_smem[i].m_a < 0x800000)`
167			`m_state.m_smem[i].m_valid = false;`
168			`else if (m_state.m_smem[i].m_a < 0x1000000)`
169			`m_state.m_smem[i].m_valid = true;`
170			`else`
171			`m_state.m_smem[i].m_valid = false;`
172			`if (m_state.m_smem[i].m_valid)`
173	7	dgisselq	`try {`
174			`m_state.m_smem[i].m_d = readio(m_state.m_smem[i].m_a);`
175			`m_state.m_smem[i].m_valid = true;`
176			`} catch(BUSERR be) {`
177			`m_state.m_smem[i].m_valid = false;`
178			`}`
179			`}`
180			`m_state.m_valid = true;`
181			`}`
182
183	5	dgisselq	`void kill(void) { m_fpga->kill(); }`
184			`void close(void) { m_fpga->close(); }`
185			`void writeio(const BUSW a, const BUSW v) { m_fpga->writeio(a, v); }`
186			`BUSW readio(const BUSW a) { return m_fpga->readio(a); }`
187			`void readi(const BUSW a, const int len, BUSW *buf) {`
188			`return m_fpga->readi(a, len, buf); }`
189			`void readz(const BUSW a, const int len, BUSW *buf) {`
190			`return m_fpga->readz(a, len, buf); }`
191			`void writei(const BUSW a, const int len, const BUSW *buf) {`
192			`return m_fpga->writei(a, len, buf); }`
193			`void writez(const BUSW a, const int len, const BUSW *buf) {`
194			`return m_fpga->writez(a, len, buf); }`
195			`bool poll(void) { return m_fpga->poll(); }`
196			`void usleep(unsigned ms) { m_fpga->usleep(ms); }`
197			`void wait(void) { m_fpga->wait(); }`
198			`bool bus_err(void) const { return m_fpga->bus_err(); }`
199			`void reset_err(void) { m_fpga->reset_err(); }`
200			`void clear(void) { m_fpga->clear(); }`
201
202			`void reset(void) { writeio(R_ZIPCTRL, CPU_RESET\|CPU_HALT); }`
203	7	dgisselq	`void step(void) { writeio(R_ZIPCTRL, CPU_STEP); m_state.step(); }`
204	5	dgisselq	`void go(void) { writeio(R_ZIPCTRL, CPU_GO); }`
205			`void halt(void) { writeio(R_ZIPCTRL, CPU_HALT); }`
206			`bool stalled(void) { return ((readio(R_ZIPCTRL)&CPU_STALL)==0); }`
207
208	7	dgisselq	`void show_user_timers(bool v) {`
209			`m_show_users_timers = v;`
210			`}`
211
212	5	dgisselq	`void showval(int y, int x, const char *lbl, unsigned int v, bool c) {`
213			`if (c)`
214			`mvprintw(y,x, ">%s> 0x%08x<", lbl, v);`
215			`else`
216			`mvprintw(y,x, " %s: 0x%08x ", lbl, v);`
217			`}`
218
219			`void dispreg(int y, int x, const char *n, unsigned int v, bool c) {`
220			`// 4,4,8,1 = 17 of 20, +2 = 18`
221			`if (c)`
222			`mvprintw(y, x, ">%s> 0x%08x<", n, v);`
223			`else`
224			`mvprintw(y, x, " %s: 0x%08x ", n, v);`
225			`}`
226
227	7	dgisselq	`int showins(int y, const char *lbl, const unsigned int pcidx) {`
228			`char la[80], lb[80];`
229			`int r = y-1;`
230	5	dgisselq
231	7	dgisselq	`mvprintw(y, 0, "%s0x%08x", lbl, m_state.m_imem[pcidx].m_a);`
232	5	dgisselq
233	7	dgisselq	`if (m_state.m_gie) attroff(A_BOLD);`
234	5	dgisselq	`else attron(A_BOLD);`
235
236	7	dgisselq	`la[0] = '\0';`
237			`lb[0] = '\0';`
238			`if (m_state.m_imem[pcidx].m_valid) {`
239			`zipi_to_string(m_state.m_imem[pcidx].m_d, la, lb);`
240			`printw(" 0x%08x", m_state.m_imem[pcidx].m_d);`
241			`printw(" %-25s", la);`
242			`if (lb[0]) {`
243			`mvprintw(y-1, 0, "%s", lbl);`
244			`mvprintw(y-1, strlen(lbl)+10+3+8+2, "%-25s", lb);`
245			`r--;`
246			`}`
247			`} else {`
248			`printw(" 0x-------- %-25s", "(Bus Error)");`
249	5	dgisselq	`}`
250			`attroff(A_BOLD);`
251	7	dgisselq
252			`return r;`
253	5	dgisselq	`}`
254
255	7	dgisselq	`void showstack(int y, const char *lbl, const unsigned int idx) {`
256			`mvprintw(y, 27+26, "%s%08x ", lbl, m_state.m_smem[idx].m_a);`
257
258			`if (m_state.m_gie) attroff(A_BOLD);`
259			`else attron(A_BOLD);`
260
261			`if (m_state.m_smem[idx].m_valid)`
262			`printw("0x%08x", m_state.m_smem[idx].m_d);`
263			`else`
264			`printw("(Bus Err)");`
265			`attroff(A_BOLD);`
266			`}`
267
268	5	dgisselq	`unsigned int cmd_read(unsigned int a) {`
269	7	dgisselq	`int errcount = 0;`
270			`unsigned int s;`
271	5	dgisselq
272			`writeio(R_ZIPCTRL, CMD_HALT\|(a&0x3f));`
273	7	dgisselq	`while((((s=readio(R_ZIPCTRL))&CPU_STALL)== 0)&&(errcount<MAXERR)`
274			`&&(!m_user_break))`
275	5	dgisselq	`errcount++;`
276	7	dgisselq	`if (m_user_break) {`
277			`endwin();`
278			`exit(EXIT_SUCCESS);`
279			`} else if (errcount >= MAXERR) {`
280			`endwin();`
281			`printf("ERR: errcount(%d) >= MAXERR on cmd_read(a=%2x)\n", errcount, a);`
282			`printf("ZIPCTRL = 0x%08x", s);`
283			`if ((s & 0x0200)==0) printf(" STALL");`
284			`if (s & 0x0400) printf(" HALTED");`
285			`if ((s & 0x03000)==0x01000)`
286			`printf(" SW-HALT");`
287			`else {`
288			`if (s & 0x01000) printf(" SLEEPING");`
289			`if (s & 0x02000) printf(" GIE(UsrMode)");`
290			`} printf("\n");`
291			`exit(EXIT_FAILURE);`
292	5	dgisselq	`}`
293	7	dgisselq	`return readio(R_ZIPDATA);`
294	5	dgisselq	`}`
295
296			`void cmd_write(unsigned int a, int v) {`
297	7	dgisselq	`int errcount = 0;`
298			`unsigned int s;`
299	5	dgisselq
300			`writeio(R_ZIPCTRL, CMD_HALT\|(a&0x3f));`
301	7	dgisselq	`while((((s=readio(R_ZIPCTRL))&CPU_STALL)== 0)&&(errcount<MAXERR)`
302			`&&(!m_user_break))`
303	5	dgisselq	`errcount++;`
304	7	dgisselq	`if (m_user_break) {`
305			`endwin();`
306			`exit(EXIT_SUCCESS);`
307			`} else if (errcount >= MAXERR) {`
308			`endwin();`
309			`printf("ERR: errcount(%d) >= MAXERR on cmd_read(a=%2x)\n", errcount, a);`
310			`printf("ZIPCTRL = 0x%08x", s);`
311			`if ((s & 0x0200)==0) printf(" STALL");`
312			`if (s & 0x0400) printf(" HALTED");`
313			`if ((s & 0x03000)==0x01000)`
314			`printf(" SW-HALT");`
315			`else {`
316			`if (s & 0x01000) printf(" SLEEPING");`
317			`if (s & 0x02000) printf(" GIE(UsrMode)");`
318			`} printf("\n");`
319			`exit(EXIT_FAILURE);`
320			`}`
321
322			`writeio(R_ZIPDATA, (unsigned int)v);`
323	5	dgisselq	`}`
324
325			`void read_state(void) {`
326			`int ln= 0;`
327			`bool gie;`
328
329	7	dgisselq	`read_raw_state();`
330
331	5	dgisselq	`if (m_cursor < 0)`
332			`m_cursor = 0;`
333			`else if (m_cursor >= 44)`
334			`m_cursor = 43;`
335
336			`mvprintw(ln,0, "Peripherals");`
337	7	dgisselq	`mvprintw(ln,30,"%-50s", "CPU State: ");`
338	5	dgisselq	`{`
339			`unsigned int v = readio(R_ZIPCTRL);`
340	7	dgisselq	`mvprintw(ln,41, "0x%08x ", v);`
341			`// if (v & 0x010000)`
342			`// printw("INT ");`
343	5	dgisselq	`if ((v & 0x003000) == 0x03000)`
344	7	dgisselq	`printw("Sleeping ");`
345			`else if (v & 0x001000)`
346	5	dgisselq	`printw("Halted ");`
347			`else if (v & 0x002000)`
348	7	dgisselq	`printw("User Mode ");`
349			`else`
350			`printw("Supervisor mode ");`
351			`if (v& 0x0200) {`
352			`v = m_state.m_sR[15];`
353
354			`} else printw("Stalled ");`
355			`// if (v & 0x008000)`
356			`// printw("Break-Enabled ");`
357			`// if (v & 0x000080)`
358			`// printw("PIC Enabled ");`
359	5	dgisselq	`} ln++;`
360	7	dgisselq	`showval(ln, 0, "PIC ", m_state.m_p[0], (m_cursor==0));`
361			`showval(ln,20, "WDT ", m_state.m_p[1], (m_cursor==1));`
362			`showval(ln,40, "WBUS", m_state.m_p[2], (m_cursor==2));`
363			`showval(ln,60, "PIC2", m_state.m_p[3], (m_cursor==3));`
364	5	dgisselq	`ln++;`
365	7	dgisselq	`showval(ln, 0, "TMRA", m_state.m_p[4], (m_cursor==4));`
366			`showval(ln,20, "TMRB", m_state.m_p[5], (m_cursor==5));`
367			`showval(ln,40, "TMRC", m_state.m_p[6], (m_cursor==6));`
368			`showval(ln,60, "JIF ", m_state.m_p[7], (m_cursor==7));`
369	5	dgisselq
370			`ln++;`
371	7	dgisselq	`if (!m_show_users_timers) {`
372	92	dgisselq	`showval(ln, 0, "MTSK", m_state.m_p[ 8], (m_cursor==8));`
373			`showval(ln,20, "MOST", m_state.m_p[ 9], (m_cursor==9));`
374			`showval(ln,40, "MPST", m_state.m_p[10], (m_cursor==10));`
375			`showval(ln,60, "MICT", m_state.m_p[11], (m_cursor==11));`
376	7	dgisselq	`} else {`
377	92	dgisselq	`showval(ln, 0, "UTSK", m_state.m_p[12], (m_cursor==8));`
378			`showval(ln,20, "UMST", m_state.m_p[13], (m_cursor==9));`
379			`showval(ln,40, "UPST", m_state.m_p[14], (m_cursor==10));`
380			`showval(ln,60, "UICT", m_state.m_p[15], (m_cursor==11));`
381	7	dgisselq	`}`
382	5	dgisselq
383			`ln++;`
384			`ln++;`
385	7	dgisselq	`unsigned int cc = m_state.m_sR[14];`
386	5	dgisselq	`gie = (cc & 0x020);`
387			`if (gie)`
388			`attroff(A_BOLD);`
389			`else`
390			`attron(A_BOLD);`
391			`mvprintw(ln, 0, "Supervisor Registers");`
392			`ln++;`
393
394	7	dgisselq	`dispreg(ln, 0, "sR0 ", m_state.m_sR[0], (m_cursor==12));`
395			`dispreg(ln,20, "sR1 ", m_state.m_sR[1], (m_cursor==13));`
396			`dispreg(ln,40, "sR2 ", m_state.m_sR[2], (m_cursor==14));`
397			`dispreg(ln,60, "sR3 ", m_state.m_sR[3], (m_cursor==15)); ln++;`
398	5	dgisselq
399	7	dgisselq	`dispreg(ln, 0, "sR4 ", m_state.m_sR[4], (m_cursor==16));`
400			`dispreg(ln,20, "sR5 ", m_state.m_sR[5], (m_cursor==17));`
401			`dispreg(ln,40, "sR6 ", m_state.m_sR[6], (m_cursor==18));`
402			`dispreg(ln,60, "sR7 ", m_state.m_sR[7], (m_cursor==19)); ln++;`
403	5	dgisselq
404	7	dgisselq	`dispreg(ln, 0, "sR8 ", m_state.m_sR[ 8], (m_cursor==20));`
405			`dispreg(ln,20, "sR9 ", m_state.m_sR[ 9], (m_cursor==21));`
406			`dispreg(ln,40, "sR10", m_state.m_sR[10], (m_cursor==22));`
407			`dispreg(ln,60, "sR11", m_state.m_sR[11], (m_cursor==23)); ln++;`
408	5	dgisselq
409	7	dgisselq	`dispreg(ln, 0, "sR12", m_state.m_sR[12], (m_cursor==24));`
410			`dispreg(ln,20, "sSP ", m_state.m_sR[13], (m_cursor==25));`
411	5	dgisselq
412	7	dgisselq	`mvprintw(ln,40, "%ssCC :%s%s%s%s%s%s%s",`
413			`(m_cursor == 26)?">":" ",`
414	31	dgisselq	`(cc&0x1000)?"FE":"", // Floating point exception`
415			`(cc&0x0800)?"DV":"", // Division by zero`
416			`(cc&0x0400)?"BE":"", // Bus Error`
417			`(cc&0x0200)?"TP":"", // Trap`
418			`(cc&0x0100)?"IL":"", // Illegal instruction`
419			`(cc&0x0080)?"BK":"", // Break`
420			`((gie==0)&&(cc&0x0010))?"HLT":""); // Halted`
421	7	dgisselq	`mvprintw(ln,54,"%s%s%s%s",`
422	5	dgisselq	`(cc&8)?"V":" ",`
423			`(cc&4)?"N":" ",`
424			`(cc&2)?"C":" ",`
425			`(cc&1)?"Z":" ");`
426	7	dgisselq	`dispreg(ln,60, "sPC ", m_state.m_sR[15], (m_cursor==27));`
427	5	dgisselq	`ln++;`
428
429			`if (gie)`
430			`attron(A_BOLD);`
431			`else`
432			`attroff(A_BOLD);`
433			`mvprintw(ln, 0, "User Registers"); ln++;`
434	7	dgisselq	`dispreg(ln, 0, "uR0 ", m_state.m_uR[0], (m_cursor==28));`
435			`dispreg(ln,20, "uR1 ", m_state.m_uR[1], (m_cursor==29));`
436			`dispreg(ln,40, "uR2 ", m_state.m_uR[2], (m_cursor==30));`
437			`dispreg(ln,60, "uR3 ", m_state.m_uR[3], (m_cursor==31)); ln++;`
438	5	dgisselq
439	7	dgisselq	`dispreg(ln, 0, "uR4 ", m_state.m_uR[4], (m_cursor==32));`
440			`dispreg(ln,20, "uR5 ", m_state.m_uR[5], (m_cursor==33));`
441			`dispreg(ln,40, "uR6 ", m_state.m_uR[6], (m_cursor==34));`
442			`dispreg(ln,60, "uR7 ", m_state.m_uR[7], (m_cursor==35)); ln++;`
443	5	dgisselq
444	7	dgisselq	`dispreg(ln, 0, "uR8 ", m_state.m_uR[8], (m_cursor==36));`
445			`dispreg(ln,20, "uR9 ", m_state.m_uR[9], (m_cursor==37));`
446			`dispreg(ln,40, "uR10", m_state.m_uR[10], (m_cursor==38));`
447			`dispreg(ln,60, "uR11", m_state.m_uR[11], (m_cursor==39)); ln++;`
448	5	dgisselq
449	7	dgisselq	`dispreg(ln, 0, "uR12", m_state.m_uR[12], (m_cursor==40));`
450			`dispreg(ln,20, "uSP ", m_state.m_uR[13], (m_cursor==41));`
451			`cc = m_state.m_uR[14];`
452			`mvprintw(ln,40, "%suCC :%s%s%s%s%s%s%s",`
453			`(m_cursor == 42)?">":" ",`
454	31	dgisselq	`(cc&0x1000)?"FE":"", // Floating point Exception`
455			`(cc&0x0800)?"DV":"", // Division by zero`
456			`(cc&0x0400)?"BE":"", // Bus Error`
457			`(cc&0x0200)?"TP":"", // Trap`
458			`(cc&0x0100)?"IL":"", // Illegal instruction`
459			`(cc&0x0040)?"ST":"", // Single-step`
460			`((gie)&&(cc&0x0010))?"SL":""); // Sleep`
461	7	dgisselq	`mvprintw(ln,54,"%s%s%s%s",`
462	5	dgisselq	`(cc&8)?"V":" ",`
463			`(cc&4)?"N":" ",`
464			`(cc&2)?"C":" ",`
465			`(cc&1)?"Z":" ");`
466	7	dgisselq	`dispreg(ln,60, "uPC ", m_state.m_uR[15], (m_cursor==43));`
467	5	dgisselq
468			`attroff(A_BOLD);`
469	7	dgisselq	`ln+=3;`
470	5	dgisselq
471	7	dgisselq	`showins(ln+4, " ", 0);`
472			`{`
473			`int lclln = ln+3;`
474			`for(int i=1; i<5; i++)`
475			`lclln = showins(lclln, (i==1)?">":" ", i);`
476			`for(int i=0; i<5; i++)`
477			`showstack(ln+i, (i==0)?">":" ", i);`
478			`}`
479	5	dgisselq	`}`
480
481			`void cursor_up(void) {`
482			`if (m_cursor > 3)`
483			`m_cursor -= 4;`
484			`} void cursor_down(void) {`
485			`if (m_cursor < 40)`
486			`m_cursor += 4;`
487			`} void cursor_left(void) {`
488			`if (m_cursor > 0)`
489			`m_cursor--;`
490			`else m_cursor = 43;`
491			`} void cursor_right(void) {`
492			`if (m_cursor < 43)`
493			`m_cursor++;`
494			`else m_cursor = 0;`
495			`}`
496
497			`int cursor(void) { return m_cursor; }`
498			`};`
499
500	7	dgisselq	`const int ZIPPY::MAXERR = 100000;`

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