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[/] [xulalx25soc/] [trunk/] [sw/] [zipdbg.cpp] - Blame information for rev 64

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1 5 dgisselq
///////////////////////////////////////////////////////////////////////////////
2
//
3
// Filename:    zipdbg.cpp
4
//
5
// Project:     Zip CPU -- a small, lightweight, RISC CPU soft core
6
//
7
// Purpose:     
8
//
9
//
10
// Creator:     Dan Gisselquist, Ph.D.
11
//              Gisselquist Tecnology, LLC
12
//
13
///////////////////////////////////////////////////////////////////////////////
14
//
15
// Copyright (C) 2015, Gisselquist Technology, LLC
16
//
17
// This program is free software (firmware): you can redistribute it and/or
18
// modify it under the terms of  the GNU General Public License as published
19
// by the Free Software Foundation, either version 3 of the License, or (at
20
// your option) any later version.
21
//
22
// This program is distributed in the hope that it will be useful, but WITHOUT
23
// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
24
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
25
// for more details.
26
//
27
// License:     GPL, v3, as defined and found on www.gnu.org,
28
//              http://www.gnu.org/licenses/gpl.html
29
//
30
//
31
///////////////////////////////////////////////////////////////////////////////
32
//
33
//
34 7 dgisselq
//
35
// BUGS:
36
//      - No ability to verify CPU functionality (3rd party simulator)
37
//      - No ability to set/clear breakpoints
38
//
39
//
40
//
41 5 dgisselq
#include <stdlib.h>
42
#include <signal.h>
43
#include <time.h>
44
#include <unistd.h>
45 7 dgisselq
#include <string.h>
46 5 dgisselq
 
47
#include <ctype.h>
48
#include <ncurses.h>
49
 
50
#include "zopcodes.h"
51
#include "zparser.h"
52
#include "devbus.h"
53
#include "regdefs.h"
54
 
55
#include "usbi.h"
56
#include "port.h"
57
 
58
#define CMD_REG         0
59
#define CMD_DATA        1
60
#define CMD_HALT        (1<<10)
61
#define CMD_STALL       (1<<9)
62
#define CMD_STEP        (1<<8)
63
#define CMD_INT         (1<<7)
64
#define CMD_RESET       (1<<6)
65
 
66
#define KEY_ESCAPE      27
67
#define KEY_RETURN      10
68
#define CTRL(X)         ((X)&0x01f)
69
 
70 7 dgisselq
class   SPARSEMEM {
71
public:
72
        bool    m_valid;
73
        unsigned int    m_a, m_d;
74
};
75 5 dgisselq
 
76
bool    gbl_err = false;
77 7 dgisselq
class   ZIPSTATE {
78
public:
79
        bool            m_valid, m_gie, m_last_pc_valid;
80
        unsigned int    m_sR[16], m_uR[16];
81
        unsigned int    m_p[20];
82
        unsigned int    m_last_pc, m_pc, m_sp;
83
        SPARSEMEM       m_smem[5];
84
        SPARSEMEM       m_imem[5];
85
        ZIPSTATE(void) : m_valid(false), m_last_pc_valid(false) {}
86 5 dgisselq
 
87 7 dgisselq
        void    step(void) {
88
                m_last_pc_valid = true;
89
                m_last_pc = m_pc;
90
        }
91
};
92
 
93 5 dgisselq
// No particular "parameters" need definition or redefinition here.
94
class   ZIPPY : public DEVBUS {
95 7 dgisselq
        static  const   int     MAXERR;
96 5 dgisselq
        typedef DEVBUS::BUSW    BUSW;
97
        DEVBUS  *m_fpga;
98
        int     m_cursor;
99 7 dgisselq
        ZIPSTATE        m_state;
100
        bool    m_user_break, m_show_users_timers;
101 5 dgisselq
public:
102 7 dgisselq
        ZIPPY(DEVBUS *fpga) : m_fpga(fpga), m_cursor(0), m_user_break(false),
103
                m_show_users_timers(false) {}
104 5 dgisselq
 
105 7 dgisselq
        void    read_raw_state(void) {
106
                m_state.m_valid = false;
107
                for(int i=0; i<16; i++)
108
                        m_state.m_sR[i] = cmd_read(i);
109
                for(int i=0; i<16; i++)
110
                        m_state.m_uR[i] = cmd_read(i+16);
111
                for(int i=0; i<20; i++)
112
                        m_state.m_p[i]  = cmd_read(i+32);
113
 
114
                m_state.m_gie = (m_state.m_sR[14] & 0x020);
115
                m_state.m_pc  = (m_state.m_gie) ? (m_state.m_uR[15]):(m_state.m_sR[15]);
116
                m_state.m_sp  = (m_state.m_gie) ? (m_state.m_uR[13]):(m_state.m_sR[13]);
117
 
118
                if (m_state.m_last_pc_valid)
119
                        m_state.m_imem[0].m_a = m_state.m_last_pc;
120
                else
121
                        m_state.m_imem[0].m_a = m_state.m_pc - 1;
122
                try {
123
                        m_state.m_imem[0].m_d = readio(m_state.m_imem[0].m_a);
124
                        m_state.m_imem[0].m_valid = true;
125
                } catch(BUSERR be) {
126
                        m_state.m_imem[0].m_valid = false;
127
                }
128
                m_state.m_imem[1].m_a = m_state.m_pc;
129
                try {
130
                        m_state.m_imem[1].m_d = readio(m_state.m_imem[1].m_a);
131
                        m_state.m_imem[1].m_valid = true;
132
                } catch(BUSERR be) {
133
                        m_state.m_imem[1].m_valid = false;
134
                }
135
 
136
                for(int i=1; i<4; i++) {
137
                        if (!m_state.m_imem[i].m_valid) {
138
                                m_state.m_imem[i+1].m_valid = false;
139
                                m_state.m_imem[i+1].m_a = m_state.m_imem[i].m_a+1;
140
                                continue;
141
                        }
142
                        m_state.m_imem[i+1].m_a = zop_early_branch(
143
                                        m_state.m_imem[i].m_a,
144
                                        m_state.m_imem[i].m_d);
145
                        try {
146
                                m_state.m_imem[i+1].m_d = readio(m_state.m_imem[i+1].m_a);
147
                                m_state.m_imem[i+1].m_valid = true;
148
                        } catch(BUSERR be) {
149
                                m_state.m_imem[i+1].m_valid = false;
150
                        }
151
                }
152
 
153
                m_state.m_smem[0].m_a = m_state.m_sp;
154
                for(int i=1; i<5; i++)
155
                        m_state.m_smem[i].m_a = m_state.m_smem[i-1].m_a+1;
156
                for(int i=0; i<5; i++) {
157
                        try {
158
                                m_state.m_smem[i].m_d = readio(m_state.m_smem[i].m_a);
159
                                m_state.m_smem[i].m_valid = true;
160
                        } catch(BUSERR be) {
161
                                m_state.m_smem[i].m_valid = false;
162
                        }
163
                }
164
                m_state.m_valid = true;
165
        }
166
 
167 5 dgisselq
        void    kill(void) { m_fpga->kill(); }
168
        void    close(void) { m_fpga->close(); }
169
        void    writeio(const BUSW a, const BUSW v) { m_fpga->writeio(a, v); }
170
        BUSW    readio(const BUSW a) { return m_fpga->readio(a); }
171
        void    readi(const BUSW a, const int len, BUSW *buf) {
172
                return m_fpga->readi(a, len, buf); }
173
        void    readz(const BUSW a, const int len, BUSW *buf) {
174
                return m_fpga->readz(a, len, buf); }
175
        void    writei(const BUSW a, const int len, const BUSW *buf) {
176
                return m_fpga->writei(a, len, buf); }
177
        void    writez(const BUSW a, const int len, const BUSW *buf) {
178
                return m_fpga->writez(a, len, buf); }
179
        bool    poll(void) { return m_fpga->poll(); }
180
        void    usleep(unsigned ms) { m_fpga->usleep(ms); }
181
        void    wait(void) { m_fpga->wait(); }
182
        bool    bus_err(void) const { return m_fpga->bus_err(); }
183
        void    reset_err(void) { m_fpga->reset_err(); }
184
        void    clear(void) { m_fpga->clear(); }
185
 
186
        void    reset(void) { writeio(R_ZIPCTRL, CPU_RESET|CPU_HALT); }
187 7 dgisselq
        void    step(void) { writeio(R_ZIPCTRL, CPU_STEP); m_state.step(); }
188 5 dgisselq
        void    go(void) { writeio(R_ZIPCTRL, CPU_GO); }
189
        void    halt(void) {    writeio(R_ZIPCTRL, CPU_HALT); }
190
        bool    stalled(void) { return ((readio(R_ZIPCTRL)&CPU_STALL)==0); }
191
 
192 7 dgisselq
        void    show_user_timers(bool v) {
193
                m_show_users_timers = v;
194
        }
195
 
196 5 dgisselq
        void    showval(int y, int x, const char *lbl, unsigned int v, bool c) {
197
                if (c)
198
                        mvprintw(y,x, ">%s> 0x%08x<", lbl, v);
199
                else
200
                        mvprintw(y,x, " %s: 0x%08x ", lbl, v);
201
        }
202
 
203
        void    dispreg(int y, int x, const char *n, unsigned int v, bool c) {
204
                // 4,4,8,1 = 17 of 20, +2 = 18
205
                if (c)
206
                        mvprintw(y, x, ">%s> 0x%08x<", n, v);
207
                else
208
                        mvprintw(y, x, " %s: 0x%08x ", n, v);
209
        }
210
 
211 7 dgisselq
        int     showins(int y, const char *lbl, const unsigned int pcidx) {
212
                char    la[80], lb[80];
213
                int     r = y-1;
214 5 dgisselq
 
215 7 dgisselq
                mvprintw(y, 0, "%s0x%08x", lbl, m_state.m_imem[pcidx].m_a);
216 5 dgisselq
 
217 7 dgisselq
                if (m_state.m_gie) attroff(A_BOLD);
218 5 dgisselq
                else    attron(A_BOLD);
219
 
220 7 dgisselq
                la[0] = '\0';
221
                lb[0] = '\0';
222
                if (m_state.m_imem[pcidx].m_valid) {
223
                        zipi_to_string(m_state.m_imem[pcidx].m_d, la, lb);
224
                        printw(" 0x%08x", m_state.m_imem[pcidx].m_d);
225
                        printw("  %-25s", la);
226
                        if (lb[0]) {
227
                                mvprintw(y-1, 0, "%s", lbl);
228
                                mvprintw(y-1, strlen(lbl)+10+3+8+2, "%-25s", lb);
229
                                r--;
230
                        }
231
                } else {
232
                        printw(" 0x--------  %-25s", "(Bus Error)");
233 5 dgisselq
                }
234
                attroff(A_BOLD);
235 7 dgisselq
 
236
                return r;
237 5 dgisselq
        }
238
 
239 7 dgisselq
        void    showstack(int y, const char *lbl, const unsigned int idx) {
240
                mvprintw(y, 27+26, "%s%08x ", lbl, m_state.m_smem[idx].m_a);
241
 
242
                if (m_state.m_gie) attroff(A_BOLD);
243
                else    attron(A_BOLD);
244
 
245
                if (m_state.m_smem[idx].m_valid)
246
                        printw("0x%08x", m_state.m_smem[idx].m_d);
247
                else
248
                        printw("(Bus Err)");
249
                attroff(A_BOLD);
250
        }
251
 
252 5 dgisselq
        unsigned int    cmd_read(unsigned int a) {
253 7 dgisselq
                int errcount = 0;
254
                unsigned int    s;
255 5 dgisselq
 
256
                writeio(R_ZIPCTRL, CMD_HALT|(a&0x3f));
257 7 dgisselq
                while((((s=readio(R_ZIPCTRL))&CPU_STALL)== 0)&&(errcount<MAXERR)
258
                                &&(!m_user_break))
259 5 dgisselq
                        errcount++;
260 7 dgisselq
                if (m_user_break) {
261
                        endwin();
262
                        exit(EXIT_SUCCESS);
263
                } else if (errcount >= MAXERR) {
264
                        endwin();
265
                        printf("ERR: errcount(%d) >= MAXERR on cmd_read(a=%2x)\n", errcount, a);
266
                        printf("ZIPCTRL = 0x%08x", s);
267
                        if ((s & 0x0200)==0) printf(" STALL");
268
                        if  (s & 0x0400) printf(" HALTED");
269
                        if ((s & 0x03000)==0x01000)
270
                                printf(" SW-HALT");
271
                        else {
272
                                if (s & 0x01000) printf(" SLEEPING");
273
                                if (s & 0x02000) printf(" GIE(UsrMode)");
274
                        } printf("\n");
275
                        exit(EXIT_FAILURE);
276 5 dgisselq
                }
277 7 dgisselq
                return readio(R_ZIPDATA);
278 5 dgisselq
        }
279
 
280
        void    cmd_write(unsigned int a, int v) {
281 7 dgisselq
                int errcount = 0;
282
                unsigned int    s;
283 5 dgisselq
 
284
                writeio(R_ZIPCTRL, CMD_HALT|(a&0x3f));
285 7 dgisselq
                while((((s=readio(R_ZIPCTRL))&CPU_STALL)== 0)&&(errcount<MAXERR)
286
                                &&(!m_user_break))
287 5 dgisselq
                        errcount++;
288 7 dgisselq
                if (m_user_break) {
289
                        endwin();
290
                        exit(EXIT_SUCCESS);
291
                } else if (errcount >= MAXERR) {
292
                        endwin();
293
                        printf("ERR: errcount(%d) >= MAXERR on cmd_read(a=%2x)\n", errcount, a);
294
                        printf("ZIPCTRL = 0x%08x", s);
295
                        if ((s & 0x0200)==0) printf(" STALL");
296
                        if  (s & 0x0400) printf(" HALTED");
297
                        if ((s & 0x03000)==0x01000)
298
                                printf(" SW-HALT");
299
                        else {
300
                                if (s & 0x01000) printf(" SLEEPING");
301
                                if (s & 0x02000) printf(" GIE(UsrMode)");
302
                        } printf("\n");
303
                        exit(EXIT_FAILURE);
304
                }
305
 
306
                writeio(R_ZIPDATA, (unsigned int)v);
307 5 dgisselq
        }
308
 
309
        void    read_state(void) {
310
                int     ln= 0;
311
                bool    gie;
312
 
313 7 dgisselq
                read_raw_state();
314
 
315 5 dgisselq
                if (m_cursor < 0)
316
                        m_cursor = 0;
317
                else if (m_cursor >= 44)
318
                        m_cursor = 43;
319
 
320
                mvprintw(ln,0, "Peripherals");
321 7 dgisselq
                mvprintw(ln,30,"%-50s", "CPU State: ");
322 5 dgisselq
                {
323
                        unsigned int v = readio(R_ZIPCTRL);
324 7 dgisselq
                        mvprintw(ln,41, "0x%08x ", v);
325
                        // if (v & 0x010000)
326
                                // printw("INT ");
327 5 dgisselq
                        if ((v & 0x003000) == 0x03000)
328 7 dgisselq
                                printw("Sleeping ");
329
                        else if (v & 0x001000)
330 5 dgisselq
                                printw("Halted ");
331
                        else if (v & 0x002000)
332 7 dgisselq
                                printw("User Mode ");
333
                        else
334
                                printw("Supervisor mode ");
335
                        if (v& 0x0200) {
336
                                v = m_state.m_sR[15];
337
 
338
                        } else printw("Stalled ");
339
                        // if (v & 0x008000)
340
                                // printw("Break-Enabled ");
341
                        // if (v & 0x000080)
342
                                // printw("PIC Enabled ");
343 5 dgisselq
                } ln++;
344 7 dgisselq
                showval(ln, 0, "PIC ", m_state.m_p[0], (m_cursor==0));
345
                showval(ln,20, "WDT ", m_state.m_p[1], (m_cursor==1));
346
                showval(ln,40, "WBUS", m_state.m_p[2], (m_cursor==2));
347
                showval(ln,60, "PIC2", m_state.m_p[3], (m_cursor==3));
348 5 dgisselq
                ln++;
349 7 dgisselq
                showval(ln, 0, "TMRA", m_state.m_p[4], (m_cursor==4));
350
                showval(ln,20, "TMRB", m_state.m_p[5], (m_cursor==5));
351
                showval(ln,40, "TMRC", m_state.m_p[6], (m_cursor==6));
352
                showval(ln,60, "JIF ", m_state.m_p[7], (m_cursor==7));
353 5 dgisselq
 
354
                ln++;
355 7 dgisselq
                if (!m_show_users_timers) {
356
                        showval(ln, 0, "MTSK", m_state.m_p[12], (m_cursor==8));
357
                        showval(ln,20, "MOST", m_state.m_p[13], (m_cursor==9));
358
                        showval(ln,40, "MPST", m_state.m_p[14], (m_cursor==10));
359
                        showval(ln,60, "MICT", m_state.m_p[15], (m_cursor==11));
360
                } else {
361
                        showval(ln, 0, "UTSK", m_state.m_p[ 8], (m_cursor==8));
362
                        showval(ln,20, "UMST", m_state.m_p[ 9], (m_cursor==9));
363
                        showval(ln,40, "UPST", m_state.m_p[10], (m_cursor==10));
364
                        showval(ln,60, "UICT", m_state.m_p[11], (m_cursor==11));
365
                }
366 5 dgisselq
 
367
                ln++;
368
                ln++;
369 7 dgisselq
                unsigned int cc = m_state.m_sR[14];
370 5 dgisselq
                gie = (cc & 0x020);
371
                if (gie)
372
                        attroff(A_BOLD);
373
                else
374
                        attron(A_BOLD);
375
                mvprintw(ln, 0, "Supervisor Registers");
376
                ln++;
377
 
378 7 dgisselq
                dispreg(ln, 0, "sR0 ", m_state.m_sR[0], (m_cursor==12));
379
                dispreg(ln,20, "sR1 ", m_state.m_sR[1], (m_cursor==13));
380
                dispreg(ln,40, "sR2 ", m_state.m_sR[2], (m_cursor==14));
381
                dispreg(ln,60, "sR3 ", m_state.m_sR[3], (m_cursor==15)); ln++;
382 5 dgisselq
 
383 7 dgisselq
                dispreg(ln, 0, "sR4 ", m_state.m_sR[4], (m_cursor==16));
384
                dispreg(ln,20, "sR5 ", m_state.m_sR[5], (m_cursor==17));
385
                dispreg(ln,40, "sR6 ", m_state.m_sR[6], (m_cursor==18));
386
                dispreg(ln,60, "sR7 ", m_state.m_sR[7], (m_cursor==19)); ln++;
387 5 dgisselq
 
388 7 dgisselq
                dispreg(ln, 0, "sR8 ", m_state.m_sR[ 8], (m_cursor==20));
389
                dispreg(ln,20, "sR9 ", m_state.m_sR[ 9], (m_cursor==21));
390
                dispreg(ln,40, "sR10", m_state.m_sR[10], (m_cursor==22));
391
                dispreg(ln,60, "sR11", m_state.m_sR[11], (m_cursor==23)); ln++;
392 5 dgisselq
 
393 7 dgisselq
                dispreg(ln, 0, "sR12", m_state.m_sR[12], (m_cursor==24));
394
                dispreg(ln,20, "sSP ", m_state.m_sR[13], (m_cursor==25));
395 5 dgisselq
 
396 7 dgisselq
                mvprintw(ln,40, "%ssCC :%s%s%s%s%s%s%s",
397
                        (m_cursor == 26)?">":" ",
398 31 dgisselq
                        (cc&0x1000)?"FE":"", // Floating point exception
399
                        (cc&0x0800)?"DV":"", // Division by zero
400
                        (cc&0x0400)?"BE":"", // Bus Error
401
                        (cc&0x0200)?"TP":"", // Trap
402
                        (cc&0x0100)?"IL":"", // Illegal instruction
403
                        (cc&0x0080)?"BK":"", // Break
404
                        ((gie==0)&&(cc&0x0010))?"HLT":""); // Halted
405 7 dgisselq
                mvprintw(ln,54,"%s%s%s%s",
406 5 dgisselq
                        (cc&8)?"V":" ",
407
                        (cc&4)?"N":" ",
408
                        (cc&2)?"C":" ",
409
                        (cc&1)?"Z":" ");
410 7 dgisselq
                dispreg(ln,60, "sPC ", m_state.m_sR[15], (m_cursor==27));
411 5 dgisselq
                ln++;
412
 
413
                if (gie)
414
                        attron(A_BOLD);
415
                else
416
                        attroff(A_BOLD);
417
                mvprintw(ln, 0, "User Registers"); ln++;
418 7 dgisselq
                dispreg(ln, 0, "uR0 ", m_state.m_uR[0], (m_cursor==28));
419
                dispreg(ln,20, "uR1 ", m_state.m_uR[1], (m_cursor==29));
420
                dispreg(ln,40, "uR2 ", m_state.m_uR[2], (m_cursor==30));
421
                dispreg(ln,60, "uR3 ", m_state.m_uR[3], (m_cursor==31)); ln++;
422 5 dgisselq
 
423 7 dgisselq
                dispreg(ln, 0, "uR4 ", m_state.m_uR[4], (m_cursor==32));
424
                dispreg(ln,20, "uR5 ", m_state.m_uR[5], (m_cursor==33));
425
                dispreg(ln,40, "uR6 ", m_state.m_uR[6], (m_cursor==34));
426
                dispreg(ln,60, "uR7 ", m_state.m_uR[7], (m_cursor==35)); ln++;
427 5 dgisselq
 
428 7 dgisselq
                dispreg(ln, 0, "uR8 ", m_state.m_uR[8], (m_cursor==36));
429
                dispreg(ln,20, "uR9 ", m_state.m_uR[9], (m_cursor==37));
430
                dispreg(ln,40, "uR10", m_state.m_uR[10], (m_cursor==38));
431
                dispreg(ln,60, "uR11", m_state.m_uR[11], (m_cursor==39)); ln++;
432 5 dgisselq
 
433 7 dgisselq
                dispreg(ln, 0, "uR12", m_state.m_uR[12], (m_cursor==40));
434
                dispreg(ln,20, "uSP ", m_state.m_uR[13], (m_cursor==41));
435
                cc = m_state.m_uR[14];
436
                mvprintw(ln,40, "%suCC :%s%s%s%s%s%s%s",
437
                        (m_cursor == 42)?">":" ",
438 31 dgisselq
                        (cc&0x1000)?"FE":"", // Floating point Exception
439
                        (cc&0x0800)?"DV":"", // Division by zero
440
                        (cc&0x0400)?"BE":"", // Bus Error
441
                        (cc&0x0200)?"TP":"", // Trap
442
                        (cc&0x0100)?"IL":"", // Illegal instruction
443
                        (cc&0x0040)?"ST":"", // Single-step
444
                        ((gie)&&(cc&0x0010))?"SL":""); // Sleep
445 7 dgisselq
                mvprintw(ln,54,"%s%s%s%s",
446 5 dgisselq
                        (cc&8)?"V":" ",
447
                        (cc&4)?"N":" ",
448
                        (cc&2)?"C":" ",
449
                        (cc&1)?"Z":" ");
450 7 dgisselq
                dispreg(ln,60, "uPC ", m_state.m_uR[15], (m_cursor==43));
451 5 dgisselq
 
452
                attroff(A_BOLD);
453 7 dgisselq
                ln+=3;
454 5 dgisselq
 
455 7 dgisselq
                showins(ln+4, " ", 0);
456
                {
457
                        int     lclln = ln+3;
458
                        for(int i=1; i<5; i++)
459
                                lclln = showins(lclln, (i==1)?">":" ", i);
460
                        for(int i=0; i<5; i++)
461
                                showstack(ln+i, (i==0)?">":" ", i);
462
                }
463 5 dgisselq
        }
464
 
465
        void    cursor_up(void) {
466
                if (m_cursor > 3)
467
                        m_cursor -= 4;
468
        } void  cursor_down(void) {
469
                if (m_cursor < 40)
470
                        m_cursor += 4;
471
        } void  cursor_left(void) {
472
                if (m_cursor > 0)
473
                        m_cursor--;
474
                else    m_cursor = 43;
475
        } void  cursor_right(void) {
476
                if (m_cursor < 43)
477
                        m_cursor++;
478
                else    m_cursor = 0;
479
        }
480
 
481
        int     cursor(void) { return m_cursor; }
482
};
483
 
484 7 dgisselq
const   int ZIPPY::MAXERR = 100000;
485
 
486 5 dgisselq
FPGA    *m_fpga;
487
 
488
void    get_value(ZIPPY *zip) {
489
        int     wy, wx, ra;
490
        int     c = zip->cursor();
491
 
492
        wx = (c & 0x03) * 20 + 9 + 1;
493
        wy = (c >> 2);
494
        if (wy >= 3+4)
495
                wy++;
496
        if (wy > 3)
497
                wy += 2;
498
        wy++;
499
 
500
        if (c >= 12)
501
                ra = c - 12;
502
        else
503
                ra = c + 32;
504
 
505
        bool    done = false;
506
        char    str[16];
507
        int     pos = 0; str[pos] = '\0';
508 7 dgisselq
        attron(A_NORMAL | A_UNDERLINE);
509
        mvprintw(wy, wx, "%-8s", "");
510 5 dgisselq
        while(!done) {
511
                int     chv = getch();
512
                switch(chv) {
513
                case KEY_ESCAPE:
514
                        pos = 0; str[pos] = '\0'; done = true;
515
                        break;
516
                case KEY_RETURN: case KEY_ENTER: case KEY_UP: case KEY_DOWN:
517
                        done = true;
518
                        break;
519
                case KEY_LEFT: case KEY_BACKSPACE:
520
                        if (pos > 0) pos--;
521
                        break;
522
                case KEY_CLEAR:
523
                        pos = 0;
524
                        break;
525
                case '0': case ' ': str[pos++] = '0'; break;
526
                case '1': str[pos++] = '1'; break;
527
                case '2': str[pos++] = '2'; break;
528
                case '3': str[pos++] = '3'; break;
529
                case '4': str[pos++] = '4'; break;
530
                case '5': str[pos++] = '5'; break;
531
                case '6': str[pos++] = '6'; break;
532
                case '7': str[pos++] = '7'; break;
533
                case '8': str[pos++] = '8'; break;
534
                case '9': str[pos++] = '9'; break;
535
                case 'A': case 'a': str[pos++] = 'A'; break;
536
                case 'B': case 'b': str[pos++] = 'B'; break;
537
                case 'C': case 'c': str[pos++] = 'C'; break;
538
                case 'D': case 'd': str[pos++] = 'D'; break;
539
                case 'E': case 'e': str[pos++] = 'E'; break;
540
                case 'F': case 'f': str[pos++] = 'F'; break;
541
                }
542
 
543
                if (pos > 8)
544
                        pos = 8;
545
                str[pos] = '\0';
546
 
547
                attron(A_NORMAL | A_UNDERLINE);
548
                mvprintw(wy, wx, "%-8s", str);
549
                if (pos > 0) {
550
                        attron(A_NORMAL | A_UNDERLINE | A_BLINK);
551
                        mvprintw(wy, wx+pos-1, "%c", str[pos-1]);
552
                }
553
                attrset(A_NORMAL);
554
        }
555
 
556
        if (pos > 0) {
557
                int     v;
558
                v = strtoul(str, NULL, 16);
559
                zip->cmd_write(ra, v);
560
        }
561
}
562
 
563
void    on_sigint(int v) {
564
        endwin();
565
 
566
        fprintf(stderr, "Interrupted!\n");
567
        exit(-2);
568
}
569
 
570 7 dgisselq
void    stall_screen(void) {
571
        erase();
572
        mvprintw(0,0, "CPU is stalled.  (Q to quit)\n");
573
}
574
 
575 5 dgisselq
int     main(int argc, char **argv) {
576
        // FPGAOPEN(m_fpga);
577
        ZIPPY   *zip; //
578
 
579
        int     skp=0, port = FPGAPORT;
580
        bool    use_usb = true;
581
 
582
        skp=1;
583
        for(int argn=0; argn<argc-skp; argn++) {
584
                if (argv[argn+skp][0] == '-') {
585
                        if (argv[argn+skp][1] == 'u')
586
                                use_usb = true;
587
                        else if (argv[argn+skp][1] == 'p') {
588
                                use_usb = false;
589
                                if (isdigit(argv[argn+skp][2]))
590
                                        port = atoi(&argv[argn+skp][2]);
591
                        }
592
                        skp++; argn--;
593
                } else
594
                        argv[argn] = argv[argn+skp];
595
        } argc -= skp;
596
 
597
        if (use_usb)
598
                m_fpga = new FPGA(new USBI());
599
        else
600
                m_fpga = new FPGA(new NETCOMMS(FPGAHOST, port));
601
        zip = new ZIPPY(m_fpga);
602
 
603
 
604
        initscr();
605
        raw();
606
        noecho();
607
        keypad(stdscr, true);
608
 
609
        signal(SIGINT, on_sigint);
610
 
611
        int     chv;
612
        bool    done = false;
613
 
614
        zip->halt();
615
        for(int i=0; (i<5)&&(zip->stalled()); i++)
616
                ;
617
        if (!zip->stalled())
618
                zip->read_state();
619 7 dgisselq
        else
620
                stall_screen();
621 5 dgisselq
        while((!done)&&(!gbl_err)) {
622
                chv = getch();
623
                switch(chv) {
624
                case 'g': case 'G':
625
                        m_fpga->writeio(R_ZIPCTRL, CPU_GO);
626
                        // We just released the CPU, so we're now done.
627
                        done = true;
628
                        break;
629
                case 'l': case 'L': case CTRL('L'):
630
                        redrawwin(stdscr);
631 7 dgisselq
                case 'm': case 'M':
632
                        zip->show_user_timers(false);
633 5 dgisselq
                        break;
634
                case 'q': case 'Q': case CTRL('C'):
635
                case KEY_CANCEL: case KEY_CLOSE: case KEY_EXIT:
636
                case KEY_ESCAPE:
637
                        done = true;
638
                        break;
639
                case 'r': case 'R':
640
                        zip->reset();
641
                        erase();
642
                        break;
643 7 dgisselq
                case 't': case 'T':
644 5 dgisselq
                case 's': case 'S':
645
                        zip->step();
646
                        break;
647 7 dgisselq
                case 'u': case 'U':
648
                        zip->show_user_timers(true);
649
                        break;
650
                case '\r': case  '\n':
651 5 dgisselq
                case KEY_IC: case KEY_ENTER:
652
                        get_value(zip);
653
                        break;
654
                case KEY_UP:
655
                        zip->cursor_up();
656
                        break;
657
                case KEY_DOWN:
658
                        zip->cursor_down();
659
                        break;
660
                case KEY_LEFT:
661
                        zip->cursor_left();
662
                        break;
663
                case KEY_RIGHT:
664
                        zip->cursor_right();
665
                        break;
666
                case ERR: case KEY_CLEAR:
667
                default:
668
                        ;
669
                }
670
 
671 7 dgisselq
                if ((done)||(gbl_err))
672
                        break;
673
                else if (zip->stalled())
674
                        stall_screen();
675
                else
676
                        zip->read_state();
677 5 dgisselq
        }
678
 
679
        endwin();
680
 
681
        if (gbl_err) {
682
                printf("Killed on error: could not access bus!\n");
683
                exit(-2);
684
        }
685
}
686
 

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