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[/] [yac/] [trunk/] [yac.yaml] - Blame information for rev 10

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1 10 feddischso 
SOCM_CORE
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v_socm: 0.1.1
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name: yac
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id: yac,v0
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description: 'Yet Another CORDIC Core'
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date: '2015'
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license: 'LGPL v3'
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licensefile: ''
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author: 'Christian Haettich'
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authormail: 'feddischson@opencores.org'
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vccmd: 'git clone https://github.com/feddischson/yac.git'
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toplevel: cordic_iterative_wb
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interfaces:
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  :wb_ifc: SOCM_IFC
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    name: Wishbone IFC
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    dir: 1
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    id: wishbone_sl,b3
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    ports:
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      :adr_i: SOCM_PORT
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        len: 32
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        spc_ref: adr
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      :bte_i: SOCM_PORT
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        len: 2
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        spc_ref: bte
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      :cti_i: SOCM_PORT
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        len: 3
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        spc_ref: cti
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      :cyc_i: SOCM_PORT
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        len: 1
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        spc_ref: cyc
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      :dat_i: SOCM_PORT
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        len: 32
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        spc_ref: dat_o
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      :sel_i: SOCM_PORT
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        len: 4
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        spc_ref: sel
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      :stb_i: SOCM_PORT
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        len: 1
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        spc_ref: stb
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      :we_i: SOCM_PORT
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        len: 1
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        spc_ref: we
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      :ack_o: SOCM_PORT
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        len: 1
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        spc_ref: ack
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      :dat_o: SOCM_PORT
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        len: 32
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        spc_ref: dat_i
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      :clk_i: SOCM_PORT
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        len: 1
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        spc_ref: clk
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      :rst_i: SOCM_PORT
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        len: 1
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        spc_ref: rst
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# :irq_ifc: SOCM_IFC
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#   name: IRQ IFC
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#   dir: 1
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#   id: single,1
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#   ports:
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#     :irq_o: SOCM_PORT
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#       len: 1
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#       spc_ref: single
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functions: {}
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inst_parameters:
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  :WB_ADR_WIDTH: SOCM_PARAM
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    type: natural
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    default: 0
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    min: 0
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    max: 0
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    visible: true
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    editable: false
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    description: ''
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  :N_ENTRIES: SOCM_PARAM
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    type: natural
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    default: 0
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    min: 0
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    max: 0
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    visible: true
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    editable: false
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    description: ''
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  :A_WIDTH: SOCM_PARAM
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    type: natural
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    default: 0
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    min: 0
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    max: 0
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    visible: true
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    editable: false
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    description: ''
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  :XY_WIDTH: SOCM_PARAM
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    type: natural
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    default: 0
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    min: 0
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    max: 0
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    visible: true
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    editable: false
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    description: ''
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  :GUARD_BITS: SOCM_PARAM
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    type: natural
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    default: 0
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    min: 0
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    max: 0
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    visible: true
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    editable: false
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    description: ''
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  :RM_GAIN: SOCM_PARAM
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    type: natural
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    default: 0
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    min: 0
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    max: 0
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    visible: true
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    editable: false
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    description: ''
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static_parameters: {}
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hdlfiles:
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  cordic_iterative_int: SOCM_HDL_FILE
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    path: rtl/vhdl/cordic_iterative_int.vhd
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    use_syn: true
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    use_sys_sim: true
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    use_mod_sim: true
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    type: vhdl
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  cordic_iterative_pkg: SOCM_HDL_FILE
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    path: rtl/vhdl/cordic_iterative_pkg.vhd
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    use_syn: true
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    use_sys_sim: true
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    use_mod_sim: true
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    type: vhdl
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  cordic_iterative_tb: SOCM_HDL_FILE
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    path: rtl/vhdl/cordic_iterative_tb.vhd
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    use_syn: false
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    use_sys_sim: true
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    use_mod_sim: true
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    type: vhdl
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  cordic_iterative_wb: SOCM_HDL_FILE
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    path: rtl/vhdl/cordic_iterative_wb.vhd
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    use_syn: true
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    use_sys_sim: false
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    use_mod_sim: false
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    type: vhdl

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