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https://opencores.org/ocsvn/yacc/yacc/trunk
[/] [yacc/] [trunk/] [bench/] [verilog/] [register_write_pipeline.do] - Blame information for rev 4
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tak.sugawa |
add wave -noupdate -format Literal -radix ascii yacc_test.cpu.d1.inst
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add wave -noupdate -format Literal -radix ascii yacc_test.cpu.d1.instD1
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add wave -noupdate -format Logic yacc_test.cpu.pipe.clock
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add wave -noupdate -format Literal -offset 0 -radix symbolic yacc_test.cpu.d1.destination_addrD1
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add wave -noupdate -format Literal -offset 0 -radix symbolic yacc_test.cpu.pipe.dest_addrD2
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add wave -noupdate -format Literal -offset 0 -radix symbolic yacc_test.cpu.pipe.dadrD3
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add wave -noupdate -format Literal -offset 0 -radix symbolic yacc_test.cpu.pipe.dadrD4
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add wave -noupdate -format Literal -offset 0 -radix symbolic yacc_test.cpu.pipe.dadrD5
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add wave -noupdate -format Literal -offset 0 -radix symbolic yacc_test.cpu.pipe.source_addr
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| 10 |
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add wave -noupdate -format Literal -offset 0 -radix symbolic yacc_test.cpu.pipe.target_addr
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| 11 |
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configure wave -namecolwidth 150
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| 12 |
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configure wave -valuecolwidth 100
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configure wave -justifyvalue left
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configure wave -signalnamewidth 0
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configure wave -snapdistance 10
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configure wave -datasetprefix 0
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| 17 |
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configure wave -rowmargin 4
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| 18 |
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configure wave -childrowmargin 2
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| 19 |
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configure wave -gridoffset 0
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| 20 |
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configure wave -gridperiod 1
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configure wave -griddelta 40
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| 22 |
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configure wave -timeline 0
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