URL
https://opencores.org/ocsvn/yacc/yacc/trunk
[/] [yacc/] [trunk/] [doc/] [delay_sim.htm] - Blame information for rev 4
Details |
Compare with Previous |
View Log
| Line No. |
Rev |
Author |
Line |
| 1 |
2 |
tak.sugawa |
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
|
| 2 |
|
|
<HTML>
|
| 3 |
|
|
<HEAD>
|
| 4 |
|
|
<META http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
| 5 |
|
|
<META name="GENERATOR" content="IBM WebSphere Studio Homepage Builder Version 9.0.2.0 for Windows">
|
| 6 |
|
|
<META http-equiv="Content-Style-Type" content="text/css">
|
| 7 |
|
|
<TITLE></TITLE>
|
| 8 |
|
|
</HEAD>
|
| 9 |
|
|
<BODY>
|
| 10 |
|
|
<P><B>6 Post-Layout Gate Simulation</B><BR>
|
| 11 |
|
|
<B>6.1 Spartan3 Gate Simulation</B><BR>
|
| 12 |
|
|
<BR>
|
| 13 |
|
|
Memory Collision Errors are frequently reported as follows. <BR>
|
| 14 |
|
|
</P>
|
| 15 |
|
|
<P><IMG src="xilinx_gatesim2.png" width="783" height="734" border="0"><BR>
|
| 16 |
|
|
<BR>
|
| 17 |
|
|
Since this messages are meaningless for YACC. I checked disable warning
|
| 18 |
|
|
option in coregen generation. However situation was the same. There is
|
| 19 |
|
|
no help for it , I changed primitive description temporally as follows.<BR>
|
| 20 |
|
|
<BR>
|
| 21 |
|
|
parameter
|
| 22 |
|
|
SIM_COLLISION_CHECK = "NONE";//All ORIG TAK
|
| 23 |
|
|
Apr.12.2005<BR>
|
| 24 |
|
|
<BR>
|
| 25 |
|
|
<BR>
|
| 26 |
|
|
<IMG src="xilinx_gate_sim1.png" width="783" height="734" border="0"><BR>
|
| 27 |
|
|
Note:<BR>
|
| 28 |
|
|
SDF Error Messages are due to transitional state of simulator at
|
| 29 |
|
|
initial power on sequence.<BR>
|
| 30 |
|
|
<BR>
|
| 31 |
|
|
<BR>
|
| 32 |
|
|
<BR>
|
| 33 |
|
|
<BR>
|
| 34 |
|
|
<B>6.2 Stratix2</B><BR>
|
| 35 |
|
|
<BR>
|
| 36 |
|
|
Run Test Bench at 165MHz.<BR>
|
| 37 |
|
|
<IMG src="stratix2_gatesim.png" width="783" height="715" border="0"><BR>
|
| 38 |
|
|
<BR>
|
| 39 |
|
|
<BR>
|
| 40 |
|
|
<B>6.3 Cyclone</B><BR>
|
| 41 |
|
|
<BR>
|
| 42 |
|
|
Run test bench at 104MHz<BR>
|
| 43 |
|
|
<IMG src="cyclone_gate_sim.png" width="783" height="715" border="0"></P>
|
| 44 |
|
|
</BODY>
|
| 45 |
|
|
</HTML>
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.