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[/] [yacc/] [trunk/] [syn/] [altera/] [yacc.asm.rpt] - Blame information for rev 4

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Line No. Rev Author Line
1 2 tak.sugawa
Assembler report for yacc
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Thu Apr 14 20:59:32 2005
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Version 4.2 Build 178 01/19/2005 Service Pack 1 SJ Web Edition
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---------------------
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; Table of Contents ;
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---------------------
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  1. Legal Notice
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  2. Assembler Summary
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  3. Assembler Settings
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  4. Assembler Generated Files
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  5. Assembler Device Options: F:/yacc/syn/altera/yacc.sof
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  6. Assembler Device Options: F:/yacc/syn/altera/yacc.pof
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  7. Assembler Messages
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----------------
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; Legal Notice ;
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----------------
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Copyright (C) 1991-2005 Altera Corporation
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Any  megafunction  design,  and related netlist (encrypted  or  decrypted),
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support information,  device programming or simulation file,  and any other
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associated  documentation or information  provided by  Altera  or a partner
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under  Altera's   Megafunction   Partnership   Program  may  be  used  only
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to program  PLD  devices (but not masked  PLD  devices) from  Altera.   Any
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other  use  of such  megafunction  design,  netlist,  support  information,
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device programming or simulation file,  or any other  related documentation
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or information  is prohibited  for  any  other purpose,  including, but not
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limited to  modification,  reverse engineering,  de-compiling, or use  with
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any other  silicon devices,  unless such use is  explicitly  licensed under
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a separate agreement with  Altera  or a megafunction partner.  Title to the
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intellectual property,  including patents,  copyrights,  trademarks,  trade
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secrets,  or maskworks,  embodied in any such megafunction design, netlist,
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support  information,  device programming or simulation file,  or any other
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related documentation or information provided by  Altera  or a megafunction
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partner, remains with Altera, the megafunction partner, or their respective
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licensors. No other licenses, including any licenses needed under any third
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party's intellectual property, are provided herein.
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+---------------------------------------------------------------+
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; Assembler Summary                                             ;
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+-----------------------+---------------------------------------+
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; Assembler Status      ; Successful - Thu Apr 14 20:59:31 2005 ;
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; Revision Name         ; yacc                                  ;
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; Top-level Entity Name ; yacc                                  ;
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; Family                ; Cyclone                               ;
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; Device                ; EP1C12Q240C6                          ;
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+-----------------------+---------------------------------------+
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+------------------------------------------------------------------------------------------------------------------+
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; Assembler Settings                                                                                               ;
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+---------------------------------------------------------------------------------------+----------+---------------+
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; Option                                                                                ; Setting  ; Default Value ;
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+---------------------------------------------------------------------------------------+----------+---------------+
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; Use smart compilation                                                                 ; Normal   ; Normal        ;
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; Generate Serial Vector Format File (.svf) for Target Device                           ; Off      ; Off           ;
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; Generate In System Configuration File (.isc) for Target Device                        ; Off      ; Off           ;
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; Generate a JEDEC STAPL Format File (.jam) for Target Device                           ; Off      ; Off           ;
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; Generate an uncompressed Jam STAPL Byte Code 2.0 File (.jbc) for Target Device        ; Off      ; Off           ;
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; Generate a compressed Jam STAPL Byte Code 2.0 File (.jbc) for Target Device           ; On       ; On            ;
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; Generate Serial Vector Format File (.svf) For Configuration Device                    ; Off      ; Off           ;
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; Generate In System Configuration File (.isc) For Configuration Device                 ; Off      ; Off           ;
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; Generate a JEDEC STAPL Format File (.jam)For Configuration Device                     ; Off      ; Off           ;
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; Generate an uncompressed Jam STAPL Byte Code 2.0 File (.jbc) For Configuration Device ; Off      ; Off           ;
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; Generate a compressed Jam STAPL Byte Code 2.0 File (.jbc) For Configuration Device    ; On       ; On            ;
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; Generate Hexadecimal (Intel-format) Output File (.hexout) For Configuration Device    ; Off      ; Off           ;
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; Generate compressed bitstreams                                                        ; on       ; on            ;
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; Compression mode                                                                      ; Off      ; Off           ;
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; Clock source for configuration device                                                 ; Internal ; Internal      ;
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; Clock frequency of the configuration device                                           ; 10 MHz   ; 10 MHz        ;
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; Divide clock frequency by                                                             ; 1        ; 1             ;
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; JTAG user code for target device                                                      ; Ffffffff ; Ffffffff      ;
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; Auto user code                                                                        ; off      ; off           ;
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; Use configuration device                                                              ; On       ; On            ;
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; Configuration device                                                                  ; Auto     ; Auto          ;
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; JTAG user code for configuration device                                               ; Ffffffff ; Ffffffff      ;
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; Configuration device auto user code                                                   ; off      ; off           ;
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; Auto-increment JTAG user code for multiple configuration devices                      ; On       ; On            ;
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; Generate Tabular Text File (.ttf) For Target Device                                   ; Off      ; Off           ;
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; Generate Raw Binary File (.rbf) For Target Device                                     ; Off      ; Off           ;
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; Generate Hexadecimal (Intel-Format) Output File (.hexout) for Target Device           ; Off      ; Off           ;
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; Hexadecimal Output File start address                                                 ; 0        ; 0             ;
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; Hexadecimal Output File count direction                                               ; Up       ; Up            ;
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; Release clears before tri-states                                                      ; off      ; off           ;
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; Auto-restart configuration after error                                                ; On       ; On            ;
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+---------------------------------------------------------------------------------------+----------+---------------+
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+-----------------------------+
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; Assembler Generated Files   ;
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+-----------------------------+
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; File Name                   ;
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+-----------------------------+
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; F:/yacc/syn/altera/yacc.sof ;
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; F:/yacc/syn/altera/yacc.pof ;
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+-----------------------------+
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+-------------------------------------------------------+
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; Assembler Device Options: F:/yacc/syn/altera/yacc.sof ;
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+----------------+--------------------------------------+
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; Option         ; Setting                              ;
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+----------------+--------------------------------------+
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; Device         ; EP1C12Q240C6                         ;
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; JTAG usercode  ; 0xFFFFFFFF                           ;
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; Checksum       ; 0x004338A4                           ;
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+----------------+--------------------------------------+
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+-------------------------------------------------------+
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; Assembler Device Options: F:/yacc/syn/altera/yacc.pof ;
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+----------------+--------------------------------------+
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; Option         ; Setting                              ;
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+----------------+--------------------------------------+
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; Device         ; EPCS4                                ;
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; JTAG usercode  ; 0xFFFFFFFF                           ;
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; Checksum       ; 0x067B7A51                           ;
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+----------------+--------------------------------------+
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+--------------------+
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; Assembler Messages ;
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+--------------------+
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Info: *******************************************************************
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Info: Running Quartus II Assembler
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    Info: Version 4.2 Build 178 01/19/2005 Service Pack 1 SJ Web Edition
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    Info: Processing started: Thu Apr 14 20:59:05 2005
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Info: Command: quartus_asm --lower_priority --import_settings_files=off --export_settings_files=off yacc -c yacc
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Info: Quartus II Assembler was successful. 0 errors, 0 warnings
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    Info: Processing ended: Thu Apr 14 20:59:31 2005
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    Info: Elapsed time: 00:00:27
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